2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/bootmem.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/mc146818rtc.h>
16 #include <linux/bitops.h>
17 #include <linux/acpi.h>
18 #include <linux/module.h>
22 #include <asm/mpspec.h>
23 #include <asm/pgalloc.h>
24 #include <asm/io_apic.h>
25 #include <asm/proto.h>
27 #include <asm/bios_ebda.h>
29 #include <mach_apic.h>
31 #include <mach_apicdef.h>
32 #include <mach_mpparse.h>
35 /* Have we found an MP table */
39 * Various Linux-internal data structures created from the
42 #if defined (CONFIG_MCA) || defined (CONFIG_EISA)
43 int mp_bus_id_to_type[MAX_MP_BUSSES];
46 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
47 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
49 static int mp_current_pci_id;
52 * Intel MP BIOS table parsing routines:
56 * Checksum an MP configuration block.
59 static int __init mpf_checksum(unsigned char *mp, int len)
69 #ifdef CONFIG_X86_NUMAQ
71 * Have to match translation table entries to main table entries by counter
72 * hence the mpc_record variable .... can't see a less disgusting way of
76 static int mpc_record;
77 static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY]
81 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
84 char *bootup_cpu = "";
86 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
90 #ifdef CONFIG_X86_NUMAQ
91 apicid = mpc_apic_id(m, translation_table[mpc_record]);
93 apicid = m->mpc_apicid;
95 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
96 bootup_cpu = " (Bootup-CPU)";
97 boot_cpu_physical_apicid = m->mpc_apicid;
100 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
101 generic_processor_info(apicid, m->mpc_apicver);
104 static void __init MP_bus_info(struct mpc_config_bus *m)
108 memcpy(str, m->mpc_bustype, 6);
111 #ifdef CONFIG_X86_NUMAQ
112 mpc_oem_bus_info(m, str, translation_table[mpc_record]);
114 printk(KERN_INFO "Bus #%d is %s\n", m->mpc_busid, str);
117 #if MAX_MP_BUSSES < 256
118 if (m->mpc_busid >= MAX_MP_BUSSES) {
119 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
120 " is too large, max. supported is %d\n",
121 m->mpc_busid, str, MAX_MP_BUSSES - 1);
126 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
127 set_bit(m->mpc_busid, mp_bus_not_pci);
128 #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
129 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
131 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
132 #ifdef CONFIG_X86_NUMAQ
133 mpc_oem_pci_bus(m, translation_table[mpc_record]);
135 clear_bit(m->mpc_busid, mp_bus_not_pci);
136 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
138 #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
139 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
140 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
141 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
142 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
143 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA;
146 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
149 #ifdef CONFIG_X86_IO_APIC
151 static int bad_ioapic(unsigned long address)
153 if (nr_ioapics >= MAX_IO_APICS) {
154 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
155 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
156 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
159 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
160 " found in table, skipping!\n");
166 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
168 if (!(m->mpc_flags & MPC_APIC_USABLE))
171 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
172 m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
174 if (bad_ioapic(m->mpc_apicaddr))
177 mp_ioapics[nr_ioapics].mp_apicaddr = m->mpc_apicaddr;
178 mp_ioapics[nr_ioapics].mp_apicid = m->mpc_apicid;
179 mp_ioapics[nr_ioapics].mp_type = m->mpc_type;
180 mp_ioapics[nr_ioapics].mp_apicver = m->mpc_apicver;
181 mp_ioapics[nr_ioapics].mp_flags = m->mpc_flags;
185 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
187 printk(KERN_INFO "Int: type %d, pol %d, trig %d, bus %02x,"
188 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
189 m->mpc_irqtype, m->mpc_irqflag & 3,
190 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
191 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
192 mp_irqs[mp_irq_entries].mp_dstapic = m->mpc_dstapic;
193 mp_irqs[mp_irq_entries].mp_type = m->mpc_type;
194 mp_irqs[mp_irq_entries].mp_irqtype = m->mpc_irqtype;
195 mp_irqs[mp_irq_entries].mp_irqflag = m->mpc_irqflag;
196 mp_irqs[mp_irq_entries].mp_srcbus = m->mpc_srcbus;
197 mp_irqs[mp_irq_entries].mp_srcbusirq = m->mpc_srcbusirq;
198 mp_irqs[mp_irq_entries].mp_dstirq = m->mpc_dstirq;
199 if (++mp_irq_entries == MAX_IRQ_SOURCES)
200 panic("Max # of irq sources exceeded!!\n");
205 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
207 printk(KERN_INFO "Lint: type %d, pol %d, trig %d, bus %02x,"
208 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
209 m->mpc_irqtype, m->mpc_irqflag & 3,
210 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
211 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
214 #ifdef CONFIG_X86_NUMAQ
215 static void __init MP_translation_info(struct mpc_config_translation *m)
218 "Translation: record %d, type %d, quad %d, global %d, local %d\n",
219 mpc_record, m->trans_type, m->trans_quad, m->trans_global,
222 if (mpc_record >= MAX_MPC_ENTRY)
223 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
225 translation_table[mpc_record] = m; /* stash this for later */
226 if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
227 node_set_online(m->trans_quad);
231 * Read/parse the MPC oem tables
234 static void __init smp_read_mpc_oem(struct mp_config_oemtable *oemtable,
235 unsigned short oemsize)
237 int count = sizeof(*oemtable); /* the header size */
238 unsigned char *oemptr = ((unsigned char *)oemtable) + count;
241 printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n",
243 if (memcmp(oemtable->oem_signature, MPC_OEM_SIGNATURE, 4)) {
245 "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
246 oemtable->oem_signature[0], oemtable->oem_signature[1],
247 oemtable->oem_signature[2], oemtable->oem_signature[3]);
250 if (mpf_checksum((unsigned char *)oemtable, oemtable->oem_length)) {
251 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
254 while (count < oemtable->oem_length) {
258 struct mpc_config_translation *m =
259 (struct mpc_config_translation *)oemptr;
260 MP_translation_info(m);
261 oemptr += sizeof(*m);
269 "Unrecognised OEM table entry type! - %d\n",
277 static inline void mps_oem_check(struct mp_config_table *mpc, char *oem,
280 if (strncmp(oem, "IBM NUMA", 8))
281 printk("Warning! May not be a NUMA-Q system!\n");
283 smp_read_mpc_oem((struct mp_config_oemtable *)mpc->mpc_oemptr,
286 #endif /* CONFIG_X86_NUMAQ */
292 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
296 int count = sizeof(*mpc);
297 unsigned char *mpt = ((unsigned char *)mpc) + count;
299 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
300 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
301 mpc->mpc_signature[0], mpc->mpc_signature[1],
302 mpc->mpc_signature[2], mpc->mpc_signature[3]);
305 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
306 printk(KERN_ERR "MPTABLE: checksum error!\n");
309 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
310 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
314 if (!mpc->mpc_lapic) {
315 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
318 memcpy(oem, mpc->mpc_oem, 8);
320 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
322 memcpy(str, mpc->mpc_productid, 12);
326 mps_oem_check(mpc, oem, str);
328 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
330 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
332 /* save the local APIC address, it might be non-default */
334 mp_lapic_addr = mpc->mpc_lapic;
340 * Now process the configuration blocks.
342 #ifdef CONFIG_X86_NUMAQ
345 while (count < mpc->mpc_length) {
349 struct mpc_config_processor *m =
350 (struct mpc_config_processor *)mpt;
351 /* ACPI may have already provided this data */
353 MP_processor_info(m);
360 struct mpc_config_bus *m =
361 (struct mpc_config_bus *)mpt;
369 #ifdef CONFIG_X86_IO_APIC
370 struct mpc_config_ioapic *m =
371 (struct mpc_config_ioapic *)mpt;
374 mpt += sizeof(struct mpc_config_ioapic);
375 count += sizeof(struct mpc_config_ioapic);
380 #ifdef CONFIG_X86_IO_APIC
381 struct mpc_config_intsrc *m =
382 (struct mpc_config_intsrc *)mpt;
386 mpt += sizeof(struct mpc_config_intsrc);
387 count += sizeof(struct mpc_config_intsrc);
392 struct mpc_config_lintsrc *m =
393 (struct mpc_config_lintsrc *)mpt;
401 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
402 printk(KERN_ERR "type %x\n", *mpt);
403 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
404 1, mpc, mpc->mpc_length, 1);
405 count = mpc->mpc_length;
408 #ifdef CONFIG_X86_NUMAQ
412 setup_apic_routing();
414 printk(KERN_ERR "MPTABLE: no processors registered!\n");
415 return num_processors;
418 #ifdef CONFIG_X86_IO_APIC
420 static int __init ELCR_trigger(unsigned int irq)
424 port = 0x4d0 + (irq >> 3);
425 return (inb(port) >> (irq & 7)) & 1;
428 static void __init construct_default_ioirq_mptable(int mpc_default_type)
430 struct mpc_config_intsrc intsrc;
432 int ELCR_fallback = 0;
434 intsrc.mpc_type = MP_INTSRC;
435 intsrc.mpc_irqflag = 0; /* conforming */
436 intsrc.mpc_srcbus = 0;
437 intsrc.mpc_dstapic = mp_ioapics[0].mp_apicid;
439 intsrc.mpc_irqtype = mp_INT;
442 * If true, we have an ISA/PCI system with no IRQ entries
443 * in the MP table. To prevent the PCI interrupts from being set up
444 * incorrectly, we try to use the ELCR. The sanity check to see if
445 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
446 * never be level sensitive, so we simply see if the ELCR agrees.
447 * If it does, we assume it's valid.
449 if (mpc_default_type == 5) {
450 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
451 "falling back to ELCR\n");
453 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
455 printk(KERN_ERR "ELCR contains invalid data... "
459 "Using ELCR to identify PCI interrupts\n");
464 for (i = 0; i < 16; i++) {
465 switch (mpc_default_type) {
467 if (i == 0 || i == 13)
468 continue; /* IRQ0 & IRQ13 not connected */
472 continue; /* IRQ2 is never connected */
477 * If the ELCR indicates a level-sensitive interrupt, we
478 * copy that information over to the MP table in the
479 * irqflag field (level sensitive, active high polarity).
482 intsrc.mpc_irqflag = 13;
484 intsrc.mpc_irqflag = 0;
487 intsrc.mpc_srcbusirq = i;
488 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
489 MP_intsrc_info(&intsrc);
492 intsrc.mpc_irqtype = mp_ExtINT;
493 intsrc.mpc_srcbusirq = 0;
494 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
495 MP_intsrc_info(&intsrc);
500 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
502 struct mpc_config_processor processor;
503 struct mpc_config_bus bus;
504 #ifdef CONFIG_X86_IO_APIC
505 struct mpc_config_ioapic ioapic;
507 struct mpc_config_lintsrc lintsrc;
508 int linttypes[2] = { mp_ExtINT, mp_NMI };
512 * local APIC has default address
514 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
517 * 2 CPUs, numbered 0 & 1.
519 processor.mpc_type = MP_PROCESSOR;
520 /* Either an integrated APIC or a discrete 82489DX. */
521 processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
522 processor.mpc_cpuflag = CPU_ENABLED;
523 processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
524 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
525 processor.mpc_featureflag = boot_cpu_data.x86_capability[0];
526 processor.mpc_reserved[0] = 0;
527 processor.mpc_reserved[1] = 0;
528 for (i = 0; i < 2; i++) {
529 processor.mpc_apicid = i;
530 MP_processor_info(&processor);
533 bus.mpc_type = MP_BUS;
535 switch (mpc_default_type) {
537 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
542 memcpy(bus.mpc_bustype, "ISA ", 6);
547 memcpy(bus.mpc_bustype, "EISA ", 6);
551 memcpy(bus.mpc_bustype, "MCA ", 6);
554 if (mpc_default_type > 4) {
556 memcpy(bus.mpc_bustype, "PCI ", 6);
560 #ifdef CONFIG_X86_IO_APIC
561 ioapic.mpc_type = MP_IOAPIC;
562 ioapic.mpc_apicid = 2;
563 ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
564 ioapic.mpc_flags = MPC_APIC_USABLE;
565 ioapic.mpc_apicaddr = 0xFEC00000;
566 MP_ioapic_info(&ioapic);
569 * We set up most of the low 16 IO-APIC pins according to MPS rules.
571 construct_default_ioirq_mptable(mpc_default_type);
573 lintsrc.mpc_type = MP_LINTSRC;
574 lintsrc.mpc_irqflag = 0; /* conforming */
575 lintsrc.mpc_srcbusid = 0;
576 lintsrc.mpc_srcbusirq = 0;
577 lintsrc.mpc_destapic = MP_APIC_ALL;
578 for (i = 0; i < 2; i++) {
579 lintsrc.mpc_irqtype = linttypes[i];
580 lintsrc.mpc_destapiclint = i;
581 MP_lintsrc_info(&lintsrc);
585 static struct intel_mp_floating *mpf_found;
588 * Scan the memory blocks for an SMP configuration block.
590 static void __init __get_smp_config(unsigned early)
592 struct intel_mp_floating *mpf = mpf_found;
594 if (acpi_lapic && early)
597 * ACPI supports both logical (e.g. Hyper-Threading) and physical
598 * processors, where MPS only supports physical.
600 if (acpi_lapic && acpi_ioapic) {
601 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
604 } else if (acpi_lapic)
605 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
606 "configuration information\n");
608 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
609 mpf->mpf_specification);
610 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
611 if (mpf->mpf_feature2 & (1 << 7)) {
612 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
615 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
620 * Now see if we need to read further.
622 if (mpf->mpf_feature1 != 0) {
625 * local APIC has default address
627 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
631 printk(KERN_INFO "Default MP configuration #%d\n",
633 construct_default_ISA_mptable(mpf->mpf_feature1);
635 } else if (mpf->mpf_physptr) {
638 * Read the physical hardware table. Anything here will
639 * override the defaults.
641 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
642 smp_found_config = 0;
644 "BIOS bug, MP table errors detected!...\n");
645 printk(KERN_ERR "... disabling SMP support. "
646 "(tell your hw vendor)\n");
652 #ifdef CONFIG_X86_IO_APIC
654 * If there are no explicit MP IRQ entries, then we are
655 * broken. We set up most of the low 16 IO-APIC pins to
656 * ISA defaults and hope it will work.
658 if (!mp_irq_entries) {
659 struct mpc_config_bus bus;
661 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
662 "using default mptable. "
663 "(tell your hw vendor)\n");
665 bus.mpc_type = MP_BUS;
667 memcpy(bus.mpc_bustype, "ISA ", 6);
670 construct_default_ioirq_mptable(0);
677 printk(KERN_INFO "Processors: %d\n", num_processors);
679 * Only use the first configuration found.
683 void __init early_get_smp_config(void)
688 void __init get_smp_config(void)
693 static int __init smp_scan_config(unsigned long base, unsigned long length,
696 unsigned int *bp = phys_to_virt(base);
697 struct intel_mp_floating *mpf;
699 printk(KERN_DEBUG "Scan SMP from %p for %ld bytes.\n", bp, length);
700 BUILD_BUG_ON(sizeof(*mpf) != 16);
703 mpf = (struct intel_mp_floating *)bp;
704 if ((*bp == SMP_MAGIC_IDENT) &&
705 (mpf->mpf_length == 1) &&
706 !mpf_checksum((unsigned char *)bp, 16) &&
707 ((mpf->mpf_specification == 1)
708 || (mpf->mpf_specification == 4))) {
710 smp_found_config = 1;
713 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
714 mpf, virt_to_phys(mpf));
715 reserve_bootmem(virt_to_phys(mpf), PAGE_SIZE,
717 if (mpf->mpf_physptr) {
719 * We cannot access to MPC table to compute
720 * table size yet, as only few megabytes from
721 * the bottom is mapped now.
722 * PC-9800's MPC table places on the very last
723 * of physical memory; so that simply reserving
724 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
725 * in reserve_bootmem.
727 unsigned long size = PAGE_SIZE;
728 unsigned long end = max_low_pfn * PAGE_SIZE;
729 if (mpf->mpf_physptr + size > end)
730 size = end - mpf->mpf_physptr;
731 reserve_bootmem(mpf->mpf_physptr, size,
739 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
740 if (mpf->mpf_physptr)
741 reserve_bootmem_generic(mpf->mpf_physptr,
752 static void __init __find_smp_config(unsigned reserve)
754 unsigned int address;
757 * FIXME: Linux assumes you have 640K of base ram..
758 * this continues the error...
760 * 1) Scan the bottom 1K for a signature
761 * 2) Scan the top 1K of base RAM
762 * 3) Scan the 64K of bios
764 if (smp_scan_config(0x0, 0x400, reserve) ||
765 smp_scan_config(639 * 0x400, 0x400, reserve) ||
766 smp_scan_config(0xF0000, 0x10000, reserve))
769 * If it is an SMP machine we should know now, unless the
770 * configuration is in an EISA/MCA bus machine with an
771 * extended bios data area.
773 * there is a real-mode segmented pointer pointing to the
774 * 4K EBDA area at 0x40E, calculate and scan it here.
776 * NOTE! There are Linux loaders that will corrupt the EBDA
777 * area, and as such this kind of SMP config may be less
778 * trustworthy, simply because the SMP table may have been
779 * stomped on during early boot. These loaders are buggy and
782 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
785 address = get_bios_ebda();
787 smp_scan_config(address, 0x400, reserve);
790 void __init early_find_smp_config(void)
792 __find_smp_config(0);
795 void __init find_smp_config(void)
797 __find_smp_config(1);