2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/bootmem.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/mc146818rtc.h>
16 #include <linux/bitops.h>
17 #include <linux/acpi.h>
18 #include <linux/module.h>
22 #include <asm/mpspec.h>
23 #include <asm/pgalloc.h>
24 #include <asm/io_apic.h>
25 #include <asm/proto.h>
27 #include <asm/bios_ebda.h>
29 #include <mach_apic.h>
31 #include <mach_apicdef.h>
32 #include <mach_mpparse.h>
36 * Various Linux-internal data structures created from the
39 #if defined (CONFIG_MCA) || defined (CONFIG_EISA)
40 int mp_bus_id_to_type[MAX_MP_BUSSES];
43 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
44 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
46 static int mp_current_pci_id;
49 * Intel MP BIOS table parsing routines:
53 * Checksum an MP configuration block.
56 static int __init mpf_checksum(unsigned char *mp, int len)
66 #ifdef CONFIG_X86_NUMAQ
68 * Have to match translation table entries to main table entries by counter
69 * hence the mpc_record variable .... can't see a less disgusting way of
73 static int mpc_record;
74 static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY]
78 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
81 char *bootup_cpu = "";
83 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
87 #ifdef CONFIG_X86_NUMAQ
88 apicid = mpc_apic_id(m, translation_table[mpc_record]);
90 apicid = m->mpc_apicid;
92 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
93 bootup_cpu = " (Bootup-CPU)";
94 boot_cpu_physical_apicid = m->mpc_apicid;
97 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
98 generic_processor_info(apicid, m->mpc_apicver);
101 static void __init MP_bus_info(struct mpc_config_bus *m)
105 memcpy(str, m->mpc_bustype, 6);
108 #ifdef CONFIG_X86_NUMAQ
109 mpc_oem_bus_info(m, str, translation_table[mpc_record]);
111 printk(KERN_INFO "Bus #%d is %s\n", m->mpc_busid, str);
114 #if MAX_MP_BUSSES < 256
115 if (m->mpc_busid >= MAX_MP_BUSSES) {
116 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
117 " is too large, max. supported is %d\n",
118 m->mpc_busid, str, MAX_MP_BUSSES - 1);
123 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
124 set_bit(m->mpc_busid, mp_bus_not_pci);
125 #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
126 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
128 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
129 #ifdef CONFIG_X86_NUMAQ
130 mpc_oem_pci_bus(m, translation_table[mpc_record]);
132 clear_bit(m->mpc_busid, mp_bus_not_pci);
133 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
135 #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
136 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
137 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
138 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
139 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
140 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA;
143 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
146 #ifdef CONFIG_X86_IO_APIC
148 static int bad_ioapic(unsigned long address)
150 if (nr_ioapics >= MAX_IO_APICS) {
151 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
152 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
153 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
156 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
157 " found in table, skipping!\n");
163 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
165 if (!(m->mpc_flags & MPC_APIC_USABLE))
168 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
169 m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
171 if (bad_ioapic(m->mpc_apicaddr))
174 mp_ioapics[nr_ioapics].mp_apicaddr = m->mpc_apicaddr;
175 mp_ioapics[nr_ioapics].mp_apicid = m->mpc_apicid;
176 mp_ioapics[nr_ioapics].mp_type = m->mpc_type;
177 mp_ioapics[nr_ioapics].mp_apicver = m->mpc_apicver;
178 mp_ioapics[nr_ioapics].mp_flags = m->mpc_flags;
182 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
184 printk(KERN_INFO "Int: type %d, pol %d, trig %d, bus %02x,"
185 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
186 m->mpc_irqtype, m->mpc_irqflag & 3,
187 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
188 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
189 mp_irqs[mp_irq_entries].mp_dstapic = m->mpc_dstapic;
190 mp_irqs[mp_irq_entries].mp_type = m->mpc_type;
191 mp_irqs[mp_irq_entries].mp_irqtype = m->mpc_irqtype;
192 mp_irqs[mp_irq_entries].mp_irqflag = m->mpc_irqflag;
193 mp_irqs[mp_irq_entries].mp_srcbus = m->mpc_srcbus;
194 mp_irqs[mp_irq_entries].mp_srcbusirq = m->mpc_srcbusirq;
195 mp_irqs[mp_irq_entries].mp_dstirq = m->mpc_dstirq;
196 if (++mp_irq_entries == MAX_IRQ_SOURCES)
197 panic("Max # of irq sources exceeded!!\n");
202 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
204 printk(KERN_INFO "Lint: type %d, pol %d, trig %d, bus %02x,"
205 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
206 m->mpc_irqtype, m->mpc_irqflag & 3,
207 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
208 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
211 #ifdef CONFIG_X86_NUMAQ
212 static void __init MP_translation_info(struct mpc_config_translation *m)
215 "Translation: record %d, type %d, quad %d, global %d, local %d\n",
216 mpc_record, m->trans_type, m->trans_quad, m->trans_global,
219 if (mpc_record >= MAX_MPC_ENTRY)
220 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
222 translation_table[mpc_record] = m; /* stash this for later */
223 if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
224 node_set_online(m->trans_quad);
228 * Read/parse the MPC oem tables
231 static void __init smp_read_mpc_oem(struct mp_config_oemtable *oemtable,
232 unsigned short oemsize)
234 int count = sizeof(*oemtable); /* the header size */
235 unsigned char *oemptr = ((unsigned char *)oemtable) + count;
238 printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n",
240 if (memcmp(oemtable->oem_signature, MPC_OEM_SIGNATURE, 4)) {
242 "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
243 oemtable->oem_signature[0], oemtable->oem_signature[1],
244 oemtable->oem_signature[2], oemtable->oem_signature[3]);
247 if (mpf_checksum((unsigned char *)oemtable, oemtable->oem_length)) {
248 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
251 while (count < oemtable->oem_length) {
255 struct mpc_config_translation *m =
256 (struct mpc_config_translation *)oemptr;
257 MP_translation_info(m);
258 oemptr += sizeof(*m);
266 "Unrecognised OEM table entry type! - %d\n",
274 static inline void mps_oem_check(struct mp_config_table *mpc, char *oem,
277 if (strncmp(oem, "IBM NUMA", 8))
278 printk("Warning! May not be a NUMA-Q system!\n");
280 smp_read_mpc_oem((struct mp_config_oemtable *)mpc->mpc_oemptr,
283 #endif /* CONFIG_X86_NUMAQ */
289 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
293 int count = sizeof(*mpc);
294 unsigned char *mpt = ((unsigned char *)mpc) + count;
296 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
297 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
298 mpc->mpc_signature[0], mpc->mpc_signature[1],
299 mpc->mpc_signature[2], mpc->mpc_signature[3]);
302 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
303 printk(KERN_ERR "MPTABLE: checksum error!\n");
306 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
307 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
311 if (!mpc->mpc_lapic) {
312 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
315 memcpy(oem, mpc->mpc_oem, 8);
317 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
319 memcpy(str, mpc->mpc_productid, 12);
323 mps_oem_check(mpc, oem, str);
325 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
327 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
329 /* save the local APIC address, it might be non-default */
331 mp_lapic_addr = mpc->mpc_lapic;
337 * Now process the configuration blocks.
339 #ifdef CONFIG_X86_NUMAQ
342 while (count < mpc->mpc_length) {
346 struct mpc_config_processor *m =
347 (struct mpc_config_processor *)mpt;
348 /* ACPI may have already provided this data */
350 MP_processor_info(m);
357 struct mpc_config_bus *m =
358 (struct mpc_config_bus *)mpt;
366 #ifdef CONFIG_X86_IO_APIC
367 struct mpc_config_ioapic *m =
368 (struct mpc_config_ioapic *)mpt;
371 mpt += sizeof(struct mpc_config_ioapic);
372 count += sizeof(struct mpc_config_ioapic);
377 #ifdef CONFIG_X86_IO_APIC
378 struct mpc_config_intsrc *m =
379 (struct mpc_config_intsrc *)mpt;
383 mpt += sizeof(struct mpc_config_intsrc);
384 count += sizeof(struct mpc_config_intsrc);
389 struct mpc_config_lintsrc *m =
390 (struct mpc_config_lintsrc *)mpt;
398 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
399 printk(KERN_ERR "type %x\n", *mpt);
400 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
401 1, mpc, mpc->mpc_length, 1);
402 count = mpc->mpc_length;
405 #ifdef CONFIG_X86_NUMAQ
409 setup_apic_routing();
411 printk(KERN_ERR "MPTABLE: no processors registered!\n");
412 return num_processors;
415 #ifdef CONFIG_X86_IO_APIC
417 static int __init ELCR_trigger(unsigned int irq)
421 port = 0x4d0 + (irq >> 3);
422 return (inb(port) >> (irq & 7)) & 1;
425 static void __init construct_default_ioirq_mptable(int mpc_default_type)
427 struct mpc_config_intsrc intsrc;
429 int ELCR_fallback = 0;
431 intsrc.mpc_type = MP_INTSRC;
432 intsrc.mpc_irqflag = 0; /* conforming */
433 intsrc.mpc_srcbus = 0;
434 intsrc.mpc_dstapic = mp_ioapics[0].mp_apicid;
436 intsrc.mpc_irqtype = mp_INT;
439 * If true, we have an ISA/PCI system with no IRQ entries
440 * in the MP table. To prevent the PCI interrupts from being set up
441 * incorrectly, we try to use the ELCR. The sanity check to see if
442 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
443 * never be level sensitive, so we simply see if the ELCR agrees.
444 * If it does, we assume it's valid.
446 if (mpc_default_type == 5) {
447 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
448 "falling back to ELCR\n");
450 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
452 printk(KERN_ERR "ELCR contains invalid data... "
456 "Using ELCR to identify PCI interrupts\n");
461 for (i = 0; i < 16; i++) {
462 switch (mpc_default_type) {
464 if (i == 0 || i == 13)
465 continue; /* IRQ0 & IRQ13 not connected */
469 continue; /* IRQ2 is never connected */
474 * If the ELCR indicates a level-sensitive interrupt, we
475 * copy that information over to the MP table in the
476 * irqflag field (level sensitive, active high polarity).
479 intsrc.mpc_irqflag = 13;
481 intsrc.mpc_irqflag = 0;
484 intsrc.mpc_srcbusirq = i;
485 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
486 MP_intsrc_info(&intsrc);
489 intsrc.mpc_irqtype = mp_ExtINT;
490 intsrc.mpc_srcbusirq = 0;
491 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
492 MP_intsrc_info(&intsrc);
497 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
499 struct mpc_config_processor processor;
500 struct mpc_config_bus bus;
501 #ifdef CONFIG_X86_IO_APIC
502 struct mpc_config_ioapic ioapic;
504 struct mpc_config_lintsrc lintsrc;
505 int linttypes[2] = { mp_ExtINT, mp_NMI };
509 * local APIC has default address
511 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
514 * 2 CPUs, numbered 0 & 1.
516 processor.mpc_type = MP_PROCESSOR;
517 /* Either an integrated APIC or a discrete 82489DX. */
518 processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
519 processor.mpc_cpuflag = CPU_ENABLED;
520 processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
521 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
522 processor.mpc_featureflag = boot_cpu_data.x86_capability[0];
523 processor.mpc_reserved[0] = 0;
524 processor.mpc_reserved[1] = 0;
525 for (i = 0; i < 2; i++) {
526 processor.mpc_apicid = i;
527 MP_processor_info(&processor);
530 bus.mpc_type = MP_BUS;
532 switch (mpc_default_type) {
534 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
539 memcpy(bus.mpc_bustype, "ISA ", 6);
544 memcpy(bus.mpc_bustype, "EISA ", 6);
548 memcpy(bus.mpc_bustype, "MCA ", 6);
551 if (mpc_default_type > 4) {
553 memcpy(bus.mpc_bustype, "PCI ", 6);
557 #ifdef CONFIG_X86_IO_APIC
558 ioapic.mpc_type = MP_IOAPIC;
559 ioapic.mpc_apicid = 2;
560 ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
561 ioapic.mpc_flags = MPC_APIC_USABLE;
562 ioapic.mpc_apicaddr = 0xFEC00000;
563 MP_ioapic_info(&ioapic);
566 * We set up most of the low 16 IO-APIC pins according to MPS rules.
568 construct_default_ioirq_mptable(mpc_default_type);
570 lintsrc.mpc_type = MP_LINTSRC;
571 lintsrc.mpc_irqflag = 0; /* conforming */
572 lintsrc.mpc_srcbusid = 0;
573 lintsrc.mpc_srcbusirq = 0;
574 lintsrc.mpc_destapic = MP_APIC_ALL;
575 for (i = 0; i < 2; i++) {
576 lintsrc.mpc_irqtype = linttypes[i];
577 lintsrc.mpc_destapiclint = i;
578 MP_lintsrc_info(&lintsrc);
582 static struct intel_mp_floating *mpf_found;
585 * Scan the memory blocks for an SMP configuration block.
587 static void __init __get_smp_config(unsigned early)
589 struct intel_mp_floating *mpf = mpf_found;
591 if (acpi_lapic && early)
594 * ACPI supports both logical (e.g. Hyper-Threading) and physical
595 * processors, where MPS only supports physical.
597 if (acpi_lapic && acpi_ioapic) {
598 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
601 } else if (acpi_lapic)
602 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
603 "configuration information\n");
605 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
606 mpf->mpf_specification);
607 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
608 if (mpf->mpf_feature2 & (1 << 7)) {
609 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
612 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
617 * Now see if we need to read further.
619 if (mpf->mpf_feature1 != 0) {
622 * local APIC has default address
624 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
628 printk(KERN_INFO "Default MP configuration #%d\n",
630 construct_default_ISA_mptable(mpf->mpf_feature1);
632 } else if (mpf->mpf_physptr) {
635 * Read the physical hardware table. Anything here will
636 * override the defaults.
638 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
639 #ifdef CONFIG_X86_LOCAL_APIC
640 smp_found_config = 0;
643 "BIOS bug, MP table errors detected!...\n");
644 printk(KERN_ERR "... disabling SMP support. "
645 "(tell your hw vendor)\n");
651 #ifdef CONFIG_X86_IO_APIC
653 * If there are no explicit MP IRQ entries, then we are
654 * broken. We set up most of the low 16 IO-APIC pins to
655 * ISA defaults and hope it will work.
657 if (!mp_irq_entries) {
658 struct mpc_config_bus bus;
660 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
661 "using default mptable. "
662 "(tell your hw vendor)\n");
664 bus.mpc_type = MP_BUS;
666 memcpy(bus.mpc_bustype, "ISA ", 6);
669 construct_default_ioirq_mptable(0);
676 printk(KERN_INFO "Processors: %d\n", num_processors);
678 * Only use the first configuration found.
682 void __init early_get_smp_config(void)
687 void __init get_smp_config(void)
692 static int __init smp_scan_config(unsigned long base, unsigned long length,
695 unsigned int *bp = phys_to_virt(base);
696 struct intel_mp_floating *mpf;
698 printk(KERN_DEBUG "Scan SMP from %p for %ld bytes.\n", bp, length);
699 BUILD_BUG_ON(sizeof(*mpf) != 16);
702 mpf = (struct intel_mp_floating *)bp;
703 if ((*bp == SMP_MAGIC_IDENT) &&
704 (mpf->mpf_length == 1) &&
705 !mpf_checksum((unsigned char *)bp, 16) &&
706 ((mpf->mpf_specification == 1)
707 || (mpf->mpf_specification == 4))) {
708 #ifdef CONFIG_X86_LOCAL_APIC
709 smp_found_config = 1;
713 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
714 mpf, virt_to_phys(mpf));
715 reserve_bootmem(virt_to_phys(mpf), PAGE_SIZE,
717 if (mpf->mpf_physptr) {
719 * We cannot access to MPC table to compute
720 * table size yet, as only few megabytes from
721 * the bottom is mapped now.
722 * PC-9800's MPC table places on the very last
723 * of physical memory; so that simply reserving
724 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
725 * in reserve_bootmem.
727 unsigned long size = PAGE_SIZE;
728 unsigned long end = max_low_pfn * PAGE_SIZE;
729 if (mpf->mpf_physptr + size > end)
730 size = end - mpf->mpf_physptr;
731 reserve_bootmem(mpf->mpf_physptr, size,
739 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
740 if (mpf->mpf_physptr)
741 reserve_bootmem_generic(mpf->mpf_physptr,
752 static void __init __find_smp_config(unsigned reserve)
754 unsigned int address;
757 * FIXME: Linux assumes you have 640K of base ram..
758 * this continues the error...
760 * 1) Scan the bottom 1K for a signature
761 * 2) Scan the top 1K of base RAM
762 * 3) Scan the 64K of bios
764 if (smp_scan_config(0x0, 0x400, reserve) ||
765 smp_scan_config(639 * 0x400, 0x400, reserve) ||
766 smp_scan_config(0xF0000, 0x10000, reserve))
769 * If it is an SMP machine we should know now, unless the
770 * configuration is in an EISA/MCA bus machine with an
771 * extended bios data area.
773 * there is a real-mode segmented pointer pointing to the
774 * 4K EBDA area at 0x40E, calculate and scan it here.
776 * NOTE! There are Linux loaders that will corrupt the EBDA
777 * area, and as such this kind of SMP config may be less
778 * trustworthy, simply because the SMP table may have been
779 * stomped on during early boot. These loaders are buggy and
782 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
785 address = get_bios_ebda();
787 smp_scan_config(address, 0x400, reserve);
790 void __init early_find_smp_config(void)
792 __find_smp_config(0);
795 void __init find_smp_config(void)
797 __find_smp_config(1);