1 #include <linux/clocksource.h>
2 #include <linux/clockchips.h>
3 #include <linux/delay.h>
4 #include <linux/errno.h>
5 #include <linux/hpet.h>
6 #include <linux/init.h>
7 #include <linux/sysdev.h>
10 #include <asm/fixmap.h>
12 #include <asm/i8253.h>
15 #define HPET_MASK CLOCKSOURCE_MASK(32)
20 #define FSEC_PER_NSEC 1000000L
23 * HPET address is set in acpi/boot.c, when an ACPI entry exists
25 unsigned long hpet_address;
26 static void __iomem *hpet_virt_address;
28 unsigned long hpet_readl(unsigned long a)
30 return readl(hpet_virt_address + a);
33 static inline void hpet_writel(unsigned long d, unsigned long a)
35 writel(d, hpet_virt_address + a);
39 #include <asm/pgtable.h>
42 static inline void hpet_set_mapping(void)
44 hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
46 __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
50 static inline void hpet_clear_mapping(void)
52 iounmap(hpet_virt_address);
53 hpet_virt_address = NULL;
57 * HPET command line enable / disable
59 static int boot_hpet_disable;
62 static int __init hpet_setup(char* str)
65 if (!strncmp("disable", str, 7))
66 boot_hpet_disable = 1;
67 if (!strncmp("force", str, 5))
72 __setup("hpet=", hpet_setup);
74 static int __init disable_hpet(char *str)
76 boot_hpet_disable = 1;
79 __setup("nohpet", disable_hpet);
81 static inline int is_hpet_capable(void)
83 return (!boot_hpet_disable && hpet_address);
87 * HPET timer interrupt enable / disable
89 static int hpet_legacy_int_enabled;
92 * is_hpet_enabled - check whether the hpet timer interrupt is enabled
94 int is_hpet_enabled(void)
96 return is_hpet_capable() && hpet_legacy_int_enabled;
98 EXPORT_SYMBOL_GPL(is_hpet_enabled);
101 * When the hpet driver (/dev/hpet) is enabled, we need to reserve
102 * timer 0 and timer 1 in case of RTC emulation.
105 static void hpet_reserve_platform_timers(unsigned long id)
107 struct hpet __iomem *hpet = hpet_virt_address;
108 struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
109 unsigned int nrtimers, i;
112 nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
114 memset(&hd, 0, sizeof (hd));
115 hd.hd_phys_address = hpet_address;
116 hd.hd_address = hpet;
117 hd.hd_nirqs = nrtimers;
118 hd.hd_flags = HPET_DATA_PLATFORM;
119 hpet_reserve_timer(&hd, 0);
121 #ifdef CONFIG_HPET_EMULATE_RTC
122 hpet_reserve_timer(&hd, 1);
125 hd.hd_irq[0] = HPET_LEGACY_8254;
126 hd.hd_irq[1] = HPET_LEGACY_RTC;
128 for (i = 2; i < nrtimers; timer++, i++) {
129 hd.hd_irq[i] = (readl(&timer->hpet_config) & Tn_INT_ROUTE_CNF_MASK) >>
130 Tn_INT_ROUTE_CNF_SHIFT;
137 static void hpet_reserve_platform_timers(unsigned long id) { }
143 static unsigned long hpet_period;
145 static void hpet_legacy_set_mode(enum clock_event_mode mode,
146 struct clock_event_device *evt);
147 static int hpet_legacy_next_event(unsigned long delta,
148 struct clock_event_device *evt);
151 * The hpet clock event device
153 static struct clock_event_device hpet_clockevent = {
155 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
156 .set_mode = hpet_legacy_set_mode,
157 .set_next_event = hpet_legacy_next_event,
163 static void hpet_start_counter(void)
165 unsigned long cfg = hpet_readl(HPET_CFG);
167 cfg &= ~HPET_CFG_ENABLE;
168 hpet_writel(cfg, HPET_CFG);
169 hpet_writel(0, HPET_COUNTER);
170 hpet_writel(0, HPET_COUNTER + 4);
171 cfg |= HPET_CFG_ENABLE;
172 hpet_writel(cfg, HPET_CFG);
175 static void hpet_resume_device(void)
180 static void hpet_restart_counter(void)
182 hpet_resume_device();
183 hpet_start_counter();
186 static void hpet_enable_legacy_int(void)
188 unsigned long cfg = hpet_readl(HPET_CFG);
190 cfg |= HPET_CFG_LEGACY;
191 hpet_writel(cfg, HPET_CFG);
192 hpet_legacy_int_enabled = 1;
195 static void hpet_legacy_clockevent_register(void)
197 /* Start HPET legacy interrupts */
198 hpet_enable_legacy_int();
201 * The mult factor is defined as (include/linux/clockchips.h)
202 * mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
203 * hpet_period is in units of femtoseconds (per cycle), so
204 * mult/2^shift = cyc/ns = 10^6/hpet_period
205 * mult = (10^6 * 2^shift)/hpet_period
206 * mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
208 hpet_clockevent.mult = div_sc((unsigned long) FSEC_PER_NSEC,
209 hpet_period, hpet_clockevent.shift);
210 /* Calculate the min / max delta */
211 hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
213 hpet_clockevent.min_delta_ns = clockevent_delta2ns(0x30,
217 * Start hpet with the boot cpu mask and make it
218 * global after the IO_APIC has been initialized.
220 hpet_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
221 clockevents_register_device(&hpet_clockevent);
222 global_clock_event = &hpet_clockevent;
223 printk(KERN_DEBUG "hpet clockevent registered\n");
226 static void hpet_legacy_set_mode(enum clock_event_mode mode,
227 struct clock_event_device *evt)
229 unsigned long cfg, cmp, now;
233 case CLOCK_EVT_MODE_PERIODIC:
234 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * hpet_clockevent.mult;
235 delta >>= hpet_clockevent.shift;
236 now = hpet_readl(HPET_COUNTER);
237 cmp = now + (unsigned long) delta;
238 cfg = hpet_readl(HPET_T0_CFG);
239 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
240 HPET_TN_SETVAL | HPET_TN_32BIT;
241 hpet_writel(cfg, HPET_T0_CFG);
243 * The first write after writing TN_SETVAL to the
244 * config register sets the counter value, the second
245 * write sets the period.
247 hpet_writel(cmp, HPET_T0_CMP);
249 hpet_writel((unsigned long) delta, HPET_T0_CMP);
252 case CLOCK_EVT_MODE_ONESHOT:
253 cfg = hpet_readl(HPET_T0_CFG);
254 cfg &= ~HPET_TN_PERIODIC;
255 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
256 hpet_writel(cfg, HPET_T0_CFG);
259 case CLOCK_EVT_MODE_UNUSED:
260 case CLOCK_EVT_MODE_SHUTDOWN:
261 cfg = hpet_readl(HPET_T0_CFG);
262 cfg &= ~HPET_TN_ENABLE;
263 hpet_writel(cfg, HPET_T0_CFG);
266 case CLOCK_EVT_MODE_RESUME:
267 hpet_enable_legacy_int();
272 static int hpet_legacy_next_event(unsigned long delta,
273 struct clock_event_device *evt)
277 cnt = hpet_readl(HPET_COUNTER);
279 hpet_writel(cnt, HPET_T0_CMP);
281 return ((long)(hpet_readl(HPET_COUNTER) - cnt ) > 0) ? -ETIME : 0;
285 * Clock source related code
287 static cycle_t read_hpet(void)
289 return (cycle_t)hpet_readl(HPET_COUNTER);
293 static cycle_t __vsyscall_fn vread_hpet(void)
295 return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
299 static struct clocksource clocksource_hpet = {
305 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
306 .resume = hpet_restart_counter,
312 static int hpet_clocksource_register(void)
317 /* Start the counter */
318 hpet_start_counter();
320 /* Verify whether hpet counter works */
325 * We don't know the TSC frequency yet, but waiting for
326 * 200000 TSC cycles is safe:
333 } while ((now - start) < 200000UL);
335 if (t1 == read_hpet()) {
337 "HPET counter not counting. HPET disabled\n");
342 * The definition of mult is (include/linux/clocksource.h)
343 * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
344 * so we first need to convert hpet_period to ns/cyc units:
345 * mult/2^shift = ns/cyc = hpet_period/10^6
346 * mult = (hpet_period * 2^shift)/10^6
347 * mult = (hpet_period << shift)/FSEC_PER_NSEC
349 clocksource_hpet.mult = div_sc(hpet_period, FSEC_PER_NSEC, HPET_SHIFT);
351 clocksource_register(&clocksource_hpet);
357 * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
359 int __init hpet_enable(void)
363 if (!is_hpet_capable())
369 * Read the period and check for a sane value:
371 hpet_period = hpet_readl(HPET_PERIOD);
372 if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
376 * Read the HPET ID register to retrieve the IRQ routing
377 * information and the number of channels
379 id = hpet_readl(HPET_ID);
381 #ifdef CONFIG_HPET_EMULATE_RTC
383 * The legacy routing mode needs at least two channels, tick timer
384 * and the rtc emulation channel.
386 if (!(id & HPET_ID_NUMBER))
390 if (hpet_clocksource_register())
393 if (id & HPET_ID_LEGSUP) {
394 hpet_legacy_clockevent_register();
400 hpet_clear_mapping();
401 boot_hpet_disable = 1;
406 * Needs to be late, as the reserve_timer code calls kalloc !
408 * Not a problem on i386 as hpet_enable is called from late_time_init,
409 * but on x86_64 it is necessary !
411 static __init int hpet_late_init(void)
413 if (boot_hpet_disable)
417 if (!force_hpet_address)
420 hpet_address = force_hpet_address;
422 if (!hpet_virt_address)
426 hpet_reserve_platform_timers(hpet_readl(HPET_ID));
430 fs_initcall(hpet_late_init);
432 void hpet_disable(void)
434 if (is_hpet_capable()) {
435 unsigned long cfg = hpet_readl(HPET_CFG);
437 if (hpet_legacy_int_enabled) {
438 cfg &= ~HPET_CFG_LEGACY;
439 hpet_legacy_int_enabled = 0;
441 cfg &= ~HPET_CFG_ENABLE;
442 hpet_writel(cfg, HPET_CFG);
446 #ifdef CONFIG_HPET_EMULATE_RTC
448 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
449 * is enabled, we support RTC interrupt functionality in software.
450 * RTC has 3 kinds of interrupts:
451 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
453 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
454 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
455 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
456 * (1) and (2) above are implemented using polling at a frequency of
457 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
458 * overhead. (DEFAULT_RTC_INT_FREQ)
459 * For (3), we use interrupts at 64Hz or user specified periodic
460 * frequency, whichever is higher.
462 #include <linux/mc146818rtc.h>
463 #include <linux/rtc.h>
466 #define DEFAULT_RTC_INT_FREQ 64
467 #define DEFAULT_RTC_SHIFT 6
468 #define RTC_NUM_INTS 1
470 static unsigned long hpet_rtc_flags;
471 static int hpet_prev_update_sec;
472 static struct rtc_time hpet_alarm_time;
473 static unsigned long hpet_pie_count;
474 static unsigned long hpet_t1_cmp;
475 static unsigned long hpet_default_delta;
476 static unsigned long hpet_pie_delta;
477 static unsigned long hpet_pie_limit;
479 static rtc_irq_handler irq_handler;
482 * Registers a IRQ handler.
484 int hpet_register_irq_handler(rtc_irq_handler handler)
486 if (!is_hpet_enabled())
491 irq_handler = handler;
495 EXPORT_SYMBOL_GPL(hpet_register_irq_handler);
498 * Deregisters the IRQ handler registered with hpet_register_irq_handler()
501 void hpet_unregister_irq_handler(rtc_irq_handler handler)
503 if (!is_hpet_enabled())
509 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler);
512 * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
513 * is not supported by all HPET implementations for timer 1.
515 * hpet_rtc_timer_init() is called when the rtc is initialized.
517 int hpet_rtc_timer_init(void)
519 unsigned long cfg, cnt, delta, flags;
521 if (!is_hpet_enabled())
524 if (!hpet_default_delta) {
527 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
528 clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT;
529 hpet_default_delta = (unsigned long) clc;
532 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
533 delta = hpet_default_delta;
535 delta = hpet_pie_delta;
537 local_irq_save(flags);
539 cnt = delta + hpet_readl(HPET_COUNTER);
540 hpet_writel(cnt, HPET_T1_CMP);
543 cfg = hpet_readl(HPET_T1_CFG);
544 cfg &= ~HPET_TN_PERIODIC;
545 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
546 hpet_writel(cfg, HPET_T1_CFG);
548 local_irq_restore(flags);
552 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
555 * The functions below are called from rtc driver.
556 * Return 0 if HPET is not being used.
557 * Otherwise do the necessary changes and return 1.
559 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
561 if (!is_hpet_enabled())
564 hpet_rtc_flags &= ~bit_mask;
567 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
569 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
571 unsigned long oldbits = hpet_rtc_flags;
573 if (!is_hpet_enabled())
576 hpet_rtc_flags |= bit_mask;
578 if ((bit_mask & RTC_UIE) && !(oldbits & RTC_UIE))
579 hpet_prev_update_sec = -1;
582 hpet_rtc_timer_init();
586 EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit);
588 int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
591 if (!is_hpet_enabled())
594 hpet_alarm_time.tm_hour = hrs;
595 hpet_alarm_time.tm_min = min;
596 hpet_alarm_time.tm_sec = sec;
600 EXPORT_SYMBOL_GPL(hpet_set_alarm_time);
602 int hpet_set_periodic_freq(unsigned long freq)
606 if (!is_hpet_enabled())
609 if (freq <= DEFAULT_RTC_INT_FREQ)
610 hpet_pie_limit = DEFAULT_RTC_INT_FREQ / freq;
612 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
614 clc >>= hpet_clockevent.shift;
615 hpet_pie_delta = (unsigned long) clc;
619 EXPORT_SYMBOL_GPL(hpet_set_periodic_freq);
621 int hpet_rtc_dropped_irq(void)
623 return is_hpet_enabled();
625 EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
627 static void hpet_rtc_timer_reinit(void)
629 unsigned long cfg, delta;
632 if (unlikely(!hpet_rtc_flags)) {
633 cfg = hpet_readl(HPET_T1_CFG);
634 cfg &= ~HPET_TN_ENABLE;
635 hpet_writel(cfg, HPET_T1_CFG);
639 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
640 delta = hpet_default_delta;
642 delta = hpet_pie_delta;
645 * Increment the comparator value until we are ahead of the
649 hpet_t1_cmp += delta;
650 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
652 } while ((long)(hpet_readl(HPET_COUNTER) - hpet_t1_cmp) > 0);
655 if (hpet_rtc_flags & RTC_PIE)
656 hpet_pie_count += lost_ints;
657 if (printk_ratelimit())
658 printk(KERN_WARNING "hpet1: lost %d rtc interrupts\n",
663 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
665 struct rtc_time curr_time;
666 unsigned long rtc_int_flag = 0;
668 hpet_rtc_timer_reinit();
669 memset(&curr_time, 0, sizeof(struct rtc_time));
671 if (hpet_rtc_flags & (RTC_UIE | RTC_AIE))
672 get_rtc_time(&curr_time);
674 if (hpet_rtc_flags & RTC_UIE &&
675 curr_time.tm_sec != hpet_prev_update_sec) {
676 if (hpet_prev_update_sec >= 0)
677 rtc_int_flag = RTC_UF;
678 hpet_prev_update_sec = curr_time.tm_sec;
681 if (hpet_rtc_flags & RTC_PIE &&
682 ++hpet_pie_count >= hpet_pie_limit) {
683 rtc_int_flag |= RTC_PF;
687 if (hpet_rtc_flags & RTC_AIE &&
688 (curr_time.tm_sec == hpet_alarm_time.tm_sec) &&
689 (curr_time.tm_min == hpet_alarm_time.tm_min) &&
690 (curr_time.tm_hour == hpet_alarm_time.tm_hour))
691 rtc_int_flag |= RTC_AF;
694 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
696 irq_handler(rtc_int_flag, dev_id);
700 EXPORT_SYMBOL_GPL(hpet_rtc_interrupt);