2 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
3 * Author: Joerg Roedel <joerg.roedel@amd.com>
4 * Leo Duran <leo.duran@amd.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/pci.h>
21 #include <linux/gfp.h>
22 #include <linux/bitops.h>
23 #include <linux/scatterlist.h>
24 #include <linux/iommu-helper.h>
25 #include <asm/proto.h>
27 #include <asm/amd_iommu_types.h>
29 #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28))
31 #define to_pages(addr, size) \
32 (round_up(((addr) & ~PAGE_MASK) + (size), PAGE_SIZE) >> PAGE_SHIFT)
34 static DEFINE_RWLOCK(amd_iommu_devtable_lock);
40 static int __iommu_queue_command(struct amd_iommu *iommu, struct command *cmd)
45 tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
46 target = (iommu->cmd_buf + tail);
47 memcpy_toio(target, cmd, sizeof(*cmd));
48 tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;
49 head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
52 writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
57 static int iommu_queue_command(struct amd_iommu *iommu, struct command *cmd)
62 spin_lock_irqsave(&iommu->lock, flags);
63 ret = __iommu_queue_command(iommu, cmd);
64 spin_unlock_irqrestore(&iommu->lock, flags);
69 static int iommu_completion_wait(struct amd_iommu *iommu)
73 volatile u64 ready = 0;
74 unsigned long ready_phys = virt_to_phys(&ready);
76 memset(&cmd, 0, sizeof(cmd));
77 cmd.data[0] = LOW_U32(ready_phys) | CMD_COMPL_WAIT_STORE_MASK;
78 cmd.data[1] = HIGH_U32(ready_phys);
79 cmd.data[2] = 1; /* value written to 'ready' */
80 CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
84 ret = iommu_queue_command(iommu, &cmd);
95 static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
99 BUG_ON(iommu == NULL);
101 memset(&cmd, 0, sizeof(cmd));
102 CMD_SET_TYPE(&cmd, CMD_INV_DEV_ENTRY);
105 iommu->need_sync = 1;
107 return iommu_queue_command(iommu, &cmd);
110 static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
111 u64 address, u16 domid, int pde, int s)
115 memset(&cmd, 0, sizeof(cmd));
116 address &= PAGE_MASK;
117 CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES);
118 cmd.data[1] |= domid;
119 cmd.data[2] = LOW_U32(address);
120 cmd.data[3] = HIGH_U32(address);
122 cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
124 cmd.data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
126 iommu->need_sync = 1;
128 return iommu_queue_command(iommu, &cmd);
131 static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid,
132 u64 address, size_t size)
135 unsigned pages = to_pages(address, size);
137 address &= PAGE_MASK;
139 for (i = 0; i < pages; ++i) {
140 iommu_queue_inv_iommu_pages(iommu, address, domid, 0, 0);
141 address += PAGE_SIZE;