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[SPARC64]: Consolidate MSI support code.
[linux-2.6] / arch / sparc64 / kernel / irq.c
1 /* irq.c: UltraSparc IRQ handling/init/registry.
2  *
3  * Copyright (C) 1997, 2007  David S. Miller  (davem@davemloft.net)
4  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
5  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
6  */
7
8 #include <linux/module.h>
9 #include <linux/sched.h>
10 #include <linux/ptrace.h>
11 #include <linux/errno.h>
12 #include <linux/kernel_stat.h>
13 #include <linux/signal.h>
14 #include <linux/mm.h>
15 #include <linux/interrupt.h>
16 #include <linux/slab.h>
17 #include <linux/random.h>
18 #include <linux/init.h>
19 #include <linux/delay.h>
20 #include <linux/proc_fs.h>
21 #include <linux/seq_file.h>
22 #include <linux/bootmem.h>
23 #include <linux/irq.h>
24
25 #include <asm/ptrace.h>
26 #include <asm/processor.h>
27 #include <asm/atomic.h>
28 #include <asm/system.h>
29 #include <asm/irq.h>
30 #include <asm/io.h>
31 #include <asm/sbus.h>
32 #include <asm/iommu.h>
33 #include <asm/upa.h>
34 #include <asm/oplib.h>
35 #include <asm/prom.h>
36 #include <asm/timer.h>
37 #include <asm/smp.h>
38 #include <asm/starfire.h>
39 #include <asm/uaccess.h>
40 #include <asm/cache.h>
41 #include <asm/cpudata.h>
42 #include <asm/auxio.h>
43 #include <asm/head.h>
44 #include <asm/hypervisor.h>
45
46 /* UPA nodes send interrupt packet to UltraSparc with first data reg
47  * value low 5 (7 on Starfire) bits holding the IRQ identifier being
48  * delivered.  We must translate this into a non-vector IRQ so we can
49  * set the softint on this cpu.
50  *
51  * To make processing these packets efficient and race free we use
52  * an array of irq buckets below.  The interrupt vector handler in
53  * entry.S feeds incoming packets into per-cpu pil-indexed lists.
54  * The IVEC handler does not need to act atomically, the PIL dispatch
55  * code uses CAS to get an atomic snapshot of the list and clear it
56  * at the same time.
57  *
58  * If you make changes to ino_bucket, please update hand coded assembler
59  * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
60  */
61 struct ino_bucket {
62         /* Next handler in per-CPU IRQ worklist.  We know that
63          * bucket pointers have the high 32-bits clear, so to
64          * save space we only store the bits we need.
65          */
66 /*0x00*/unsigned int irq_chain;
67
68         /* Virtual interrupt number assigned to this INO.  */
69 /*0x04*/unsigned int virt_irq;
70 };
71
72 #define NUM_IVECS       (IMAP_INR + 1)
73 struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
74
75 #define __irq_ino(irq) \
76         (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0])
77 #define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq))
78 #define __irq(bucket) ((unsigned int)(unsigned long)(bucket))
79
80 /* This has to be in the main kernel image, it cannot be
81  * turned into per-cpu data.  The reason is that the main
82  * kernel image is locked into the TLB and this structure
83  * is accessed from the vectored interrupt trap handler.  If
84  * access to this structure takes a TLB miss it could cause
85  * the 5-level sparc v9 trap stack to overflow.
86  */
87 #define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
88
89 static struct {
90         unsigned int irq;
91         unsigned int dev_handle;
92         unsigned int dev_ino;
93 } virt_to_real_irq_table[NR_IRQS];
94 static DEFINE_SPINLOCK(virt_irq_alloc_lock);
95
96 unsigned char virt_irq_alloc(unsigned int real_irq)
97 {
98         unsigned long flags;
99         unsigned char ent;
100
101         BUILD_BUG_ON(NR_IRQS >= 256);
102
103         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
104
105         for (ent = 1; ent < NR_IRQS; ent++) {
106                 if (!virt_to_real_irq_table[ent].irq)
107                         break;
108         }
109         if (ent >= NR_IRQS) {
110                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
111                 ent = 0;
112         } else {
113                 virt_to_real_irq_table[ent].irq = real_irq;
114         }
115
116         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
117
118         return ent;
119 }
120
121 #ifdef CONFIG_PCI_MSI
122 void virt_irq_free(unsigned int virt_irq)
123 {
124         unsigned long flags;
125
126         if (virt_irq >= NR_IRQS)
127                 return;
128
129         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
130
131         virt_to_real_irq_table[virt_irq].irq = 0;
132
133         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
134 }
135 #endif
136
137 static unsigned int virt_to_real_irq(unsigned char virt_irq)
138 {
139         return virt_to_real_irq_table[virt_irq].irq;
140 }
141
142 /*
143  * /proc/interrupts printing:
144  */
145
146 int show_interrupts(struct seq_file *p, void *v)
147 {
148         int i = *(loff_t *) v, j;
149         struct irqaction * action;
150         unsigned long flags;
151
152         if (i == 0) {
153                 seq_printf(p, "           ");
154                 for_each_online_cpu(j)
155                         seq_printf(p, "CPU%d       ",j);
156                 seq_putc(p, '\n');
157         }
158
159         if (i < NR_IRQS) {
160                 spin_lock_irqsave(&irq_desc[i].lock, flags);
161                 action = irq_desc[i].action;
162                 if (!action)
163                         goto skip;
164                 seq_printf(p, "%3d: ",i);
165 #ifndef CONFIG_SMP
166                 seq_printf(p, "%10u ", kstat_irqs(i));
167 #else
168                 for_each_online_cpu(j)
169                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
170 #endif
171                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
172                 seq_printf(p, "  %s", action->name);
173
174                 for (action=action->next; action; action = action->next)
175                         seq_printf(p, ", %s", action->name);
176
177                 seq_putc(p, '\n');
178 skip:
179                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
180         }
181         return 0;
182 }
183
184 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
185 {
186         unsigned int tid;
187
188         if (this_is_starfire) {
189                 tid = starfire_translate(imap, cpuid);
190                 tid <<= IMAP_TID_SHIFT;
191                 tid &= IMAP_TID_UPA;
192         } else {
193                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
194                         unsigned long ver;
195
196                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
197                         if ((ver >> 32UL) == __JALAPENO_ID ||
198                             (ver >> 32UL) == __SERRANO_ID) {
199                                 tid = cpuid << IMAP_TID_SHIFT;
200                                 tid &= IMAP_TID_JBUS;
201                         } else {
202                                 unsigned int a = cpuid & 0x1f;
203                                 unsigned int n = (cpuid >> 5) & 0x1f;
204
205                                 tid = ((a << IMAP_AID_SHIFT) |
206                                        (n << IMAP_NID_SHIFT));
207                                 tid &= (IMAP_AID_SAFARI |
208                                         IMAP_NID_SAFARI);;
209                         }
210                 } else {
211                         tid = cpuid << IMAP_TID_SHIFT;
212                         tid &= IMAP_TID_UPA;
213                 }
214         }
215
216         return tid;
217 }
218
219 struct irq_handler_data {
220         unsigned long   iclr;
221         unsigned long   imap;
222
223         void            (*pre_handler)(unsigned int, void *, void *);
224         void            *pre_handler_arg1;
225         void            *pre_handler_arg2;
226 };
227
228 static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq)
229 {
230         unsigned int real_irq = virt_to_real_irq(virt_irq);
231         struct ino_bucket *bucket = NULL;
232
233         if (likely(real_irq))
234                 bucket = __bucket(real_irq);
235
236         return bucket;
237 }
238
239 #ifdef CONFIG_SMP
240 static int irq_choose_cpu(unsigned int virt_irq)
241 {
242         cpumask_t mask = irq_desc[virt_irq].affinity;
243         int cpuid;
244
245         if (cpus_equal(mask, CPU_MASK_ALL)) {
246                 static int irq_rover;
247                 static DEFINE_SPINLOCK(irq_rover_lock);
248                 unsigned long flags;
249
250                 /* Round-robin distribution... */
251         do_round_robin:
252                 spin_lock_irqsave(&irq_rover_lock, flags);
253
254                 while (!cpu_online(irq_rover)) {
255                         if (++irq_rover >= NR_CPUS)
256                                 irq_rover = 0;
257                 }
258                 cpuid = irq_rover;
259                 do {
260                         if (++irq_rover >= NR_CPUS)
261                                 irq_rover = 0;
262                 } while (!cpu_online(irq_rover));
263
264                 spin_unlock_irqrestore(&irq_rover_lock, flags);
265         } else {
266                 cpumask_t tmp;
267
268                 cpus_and(tmp, cpu_online_map, mask);
269
270                 if (cpus_empty(tmp))
271                         goto do_round_robin;
272
273                 cpuid = first_cpu(tmp);
274         }
275
276         return cpuid;
277 }
278 #else
279 static int irq_choose_cpu(unsigned int virt_irq)
280 {
281         return real_hard_smp_processor_id();
282 }
283 #endif
284
285 static void sun4u_irq_enable(unsigned int virt_irq)
286 {
287         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
288
289         if (likely(data)) {
290                 unsigned long cpuid, imap, val;
291                 unsigned int tid;
292
293                 cpuid = irq_choose_cpu(virt_irq);
294                 imap = data->imap;
295
296                 tid = sun4u_compute_tid(imap, cpuid);
297
298                 val = upa_readq(imap);
299                 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
300                          IMAP_AID_SAFARI | IMAP_NID_SAFARI);
301                 val |= tid | IMAP_VALID;
302                 upa_writeq(val, imap);
303         }
304 }
305
306 static void sun4u_set_affinity(unsigned int virt_irq, cpumask_t mask)
307 {
308         sun4u_irq_enable(virt_irq);
309 }
310
311 static void sun4u_irq_disable(unsigned int virt_irq)
312 {
313         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
314
315         if (likely(data)) {
316                 unsigned long imap = data->imap;
317                 unsigned long tmp = upa_readq(imap);
318
319                 tmp &= ~IMAP_VALID;
320                 upa_writeq(tmp, imap);
321         }
322 }
323
324 static void sun4u_irq_end(unsigned int virt_irq)
325 {
326         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
327         struct irq_desc *desc = irq_desc + virt_irq;
328
329         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
330                 return;
331
332         if (likely(data))
333                 upa_writeq(ICLR_IDLE, data->iclr);
334 }
335
336 static void sun4v_irq_enable(unsigned int virt_irq)
337 {
338         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
339         unsigned int ino = bucket - &ivector_table[0];
340
341         if (likely(bucket)) {
342                 unsigned long cpuid;
343                 int err;
344
345                 cpuid = irq_choose_cpu(virt_irq);
346
347                 err = sun4v_intr_settarget(ino, cpuid);
348                 if (err != HV_EOK)
349                         printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
350                                "err(%d)\n", ino, cpuid, err);
351                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
352                 if (err != HV_EOK)
353                         printk(KERN_ERR "sun4v_intr_setstate(%x): "
354                                "err(%d)\n", ino, err);
355                 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
356                 if (err != HV_EOK)
357                         printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
358                                ino, err);
359         }
360 }
361
362 static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask)
363 {
364         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
365         unsigned int ino = bucket - &ivector_table[0];
366
367         if (likely(bucket)) {
368                 unsigned long cpuid;
369                 int err;
370
371                 cpuid = irq_choose_cpu(virt_irq);
372
373                 err = sun4v_intr_settarget(ino, cpuid);
374                 if (err != HV_EOK)
375                         printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
376                                "err(%d)\n", ino, cpuid, err);
377         }
378 }
379
380 static void sun4v_irq_disable(unsigned int virt_irq)
381 {
382         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
383         unsigned int ino = bucket - &ivector_table[0];
384
385         if (likely(bucket)) {
386                 int err;
387
388                 err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
389                 if (err != HV_EOK)
390                         printk(KERN_ERR "sun4v_intr_setenabled(%x): "
391                                "err(%d)\n", ino, err);
392         }
393 }
394
395 static void sun4v_irq_end(unsigned int virt_irq)
396 {
397         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
398         unsigned int ino = bucket - &ivector_table[0];
399         struct irq_desc *desc = irq_desc + virt_irq;
400
401         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
402                 return;
403
404         if (likely(bucket)) {
405                 int err;
406
407                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
408                 if (err != HV_EOK)
409                         printk(KERN_ERR "sun4v_intr_setstate(%x): "
410                                "err(%d)\n", ino, err);
411         }
412 }
413
414 static void sun4v_virq_enable(unsigned int virt_irq)
415 {
416         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
417
418         if (likely(bucket)) {
419                 unsigned long cpuid, dev_handle, dev_ino;
420                 int err;
421
422                 cpuid = irq_choose_cpu(virt_irq);
423
424                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
425                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
426
427                 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
428                 if (err != HV_EOK)
429                         printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
430                                "err(%d)\n",
431                                dev_handle, dev_ino, cpuid, err);
432                 err = sun4v_vintr_set_state(dev_handle, dev_ino,
433                                             HV_INTR_STATE_IDLE);
434                 if (err != HV_EOK)
435                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
436                                 "HV_INTR_STATE_IDLE): err(%d)\n",
437                                dev_handle, dev_ino, err);
438                 err = sun4v_vintr_set_valid(dev_handle, dev_ino,
439                                             HV_INTR_ENABLED);
440                 if (err != HV_EOK)
441                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
442                                "HV_INTR_ENABLED): err(%d)\n",
443                                dev_handle, dev_ino, err);
444         }
445 }
446
447 static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask)
448 {
449         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
450
451         if (likely(bucket)) {
452                 unsigned long cpuid, dev_handle, dev_ino;
453                 int err;
454
455                 cpuid = irq_choose_cpu(virt_irq);
456
457                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
458                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
459
460                 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
461                 if (err != HV_EOK)
462                         printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
463                                "err(%d)\n",
464                                dev_handle, dev_ino, cpuid, err);
465         }
466 }
467
468 static void sun4v_virq_disable(unsigned int virt_irq)
469 {
470         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
471
472         if (likely(bucket)) {
473                 unsigned long dev_handle, dev_ino;
474                 int err;
475
476                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
477                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
478
479                 err = sun4v_vintr_set_valid(dev_handle, dev_ino,
480                                             HV_INTR_DISABLED);
481                 if (err != HV_EOK)
482                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
483                                "HV_INTR_DISABLED): err(%d)\n",
484                                dev_handle, dev_ino, err);
485         }
486 }
487
488 static void sun4v_virq_end(unsigned int virt_irq)
489 {
490         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
491         struct irq_desc *desc = irq_desc + virt_irq;
492
493         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
494                 return;
495
496         if (likely(bucket)) {
497                 unsigned long dev_handle, dev_ino;
498                 int err;
499
500                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
501                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
502
503                 err = sun4v_vintr_set_state(dev_handle, dev_ino,
504                                             HV_INTR_STATE_IDLE);
505                 if (err != HV_EOK)
506                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
507                                 "HV_INTR_STATE_IDLE): err(%d)\n",
508                                dev_handle, dev_ino, err);
509         }
510 }
511
512 static void run_pre_handler(unsigned int virt_irq)
513 {
514         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
515         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
516
517         if (likely(data->pre_handler)) {
518                 data->pre_handler(__irq_ino(__irq(bucket)),
519                                   data->pre_handler_arg1,
520                                   data->pre_handler_arg2);
521         }
522 }
523
524 static struct irq_chip sun4u_irq = {
525         .typename       = "sun4u",
526         .enable         = sun4u_irq_enable,
527         .disable        = sun4u_irq_disable,
528         .end            = sun4u_irq_end,
529         .set_affinity   = sun4u_set_affinity,
530 };
531
532 static struct irq_chip sun4u_irq_ack = {
533         .typename       = "sun4u+ack",
534         .enable         = sun4u_irq_enable,
535         .disable        = sun4u_irq_disable,
536         .ack            = run_pre_handler,
537         .end            = sun4u_irq_end,
538         .set_affinity   = sun4u_set_affinity,
539 };
540
541 static struct irq_chip sun4v_irq = {
542         .typename       = "sun4v",
543         .enable         = sun4v_irq_enable,
544         .disable        = sun4v_irq_disable,
545         .end            = sun4v_irq_end,
546         .set_affinity   = sun4v_set_affinity,
547 };
548
549 static struct irq_chip sun4v_virq = {
550         .typename       = "vsun4v",
551         .enable         = sun4v_virq_enable,
552         .disable        = sun4v_virq_disable,
553         .end            = sun4v_virq_end,
554         .set_affinity   = sun4v_virt_set_affinity,
555 };
556
557 void irq_install_pre_handler(int virt_irq,
558                              void (*func)(unsigned int, void *, void *),
559                              void *arg1, void *arg2)
560 {
561         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
562         struct irq_chip *chip = get_irq_chip(virt_irq);
563
564         if (WARN_ON(chip == &sun4v_irq || chip == &sun4v_virq)) {
565                 printk(KERN_ERR "IRQ: Trying to install pre-handler on "
566                        "sun4v irq %u\n", virt_irq);
567                 return;
568         }
569
570         data->pre_handler = func;
571         data->pre_handler_arg1 = arg1;
572         data->pre_handler_arg2 = arg2;
573
574         if (chip == &sun4u_irq_ack)
575                 return;
576
577         set_irq_chip(virt_irq, &sun4u_irq_ack);
578 }
579
580 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
581 {
582         struct ino_bucket *bucket;
583         struct irq_handler_data *data;
584         int ino;
585
586         BUG_ON(tlb_type == hypervisor);
587
588         ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
589         bucket = &ivector_table[ino];
590         if (!bucket->virt_irq) {
591                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
592                 set_irq_chip(bucket->virt_irq, &sun4u_irq);
593         }
594
595         data = get_irq_chip_data(bucket->virt_irq);
596         if (unlikely(data))
597                 goto out;
598
599         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
600         if (unlikely(!data)) {
601                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
602                 prom_halt();
603         }
604         set_irq_chip_data(bucket->virt_irq, data);
605
606         data->imap  = imap;
607         data->iclr  = iclr;
608
609 out:
610         return bucket->virt_irq;
611 }
612
613 static unsigned int sun4v_build_common(unsigned long sysino,
614                                        struct irq_chip *chip)
615 {
616         struct ino_bucket *bucket;
617         struct irq_handler_data *data;
618
619         BUG_ON(tlb_type != hypervisor);
620
621         bucket = &ivector_table[sysino];
622         if (!bucket->virt_irq) {
623                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
624                 set_irq_chip(bucket->virt_irq, chip);
625         }
626
627         data = get_irq_chip_data(bucket->virt_irq);
628         if (unlikely(data))
629                 goto out;
630
631         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
632         if (unlikely(!data)) {
633                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
634                 prom_halt();
635         }
636         set_irq_chip_data(bucket->virt_irq, data);
637
638         /* Catch accidental accesses to these things.  IMAP/ICLR handling
639          * is done by hypervisor calls on sun4v platforms, not by direct
640          * register accesses.
641          */
642         data->imap = ~0UL;
643         data->iclr = ~0UL;
644
645 out:
646         return bucket->virt_irq;
647 }
648
649 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
650 {
651         unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
652
653         return sun4v_build_common(sysino, &sun4v_irq);
654 }
655
656 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
657 {
658         unsigned long sysino, hv_err;
659         unsigned int virq;
660
661         BUG_ON(devhandle & devino);
662
663         sysino = devhandle | devino;
664         BUG_ON(sysino & ~(IMAP_IGN | IMAP_INO));
665
666         hv_err = sun4v_vintr_set_cookie(devhandle, devino, sysino);
667         if (hv_err) {
668                 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
669                             "err=%lu\n", devhandle, devino, hv_err);
670                 prom_halt();
671         }
672
673         virq = sun4v_build_common(sysino, &sun4v_virq);
674
675         virt_to_real_irq_table[virq].dev_handle = devhandle;
676         virt_to_real_irq_table[virq].dev_ino = devino;
677
678         return virq;
679 }
680
681 void ack_bad_irq(unsigned int virt_irq)
682 {
683         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
684         unsigned int ino = 0xdeadbeef;
685
686         if (bucket)
687                 ino = bucket - &ivector_table[0];
688
689         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
690                ino, virt_irq);
691 }
692
693 void handler_irq(int irq, struct pt_regs *regs)
694 {
695         struct ino_bucket *bucket;
696         struct pt_regs *old_regs;
697
698         clear_softint(1 << irq);
699
700         old_regs = set_irq_regs(regs);
701         irq_enter();
702
703         /* Sliiiick... */
704         bucket = __bucket(xchg32(irq_work(smp_processor_id()), 0));
705         while (bucket) {
706                 struct ino_bucket *next = __bucket(bucket->irq_chain);
707
708                 bucket->irq_chain = 0;
709                 __do_IRQ(bucket->virt_irq);
710
711                 bucket = next;
712         }
713
714         irq_exit();
715         set_irq_regs(old_regs);
716 }
717
718 #ifdef CONFIG_HOTPLUG_CPU
719 void fixup_irqs(void)
720 {
721         unsigned int irq;
722
723         for (irq = 0; irq < NR_IRQS; irq++) {
724                 unsigned long flags;
725
726                 spin_lock_irqsave(&irq_desc[irq].lock, flags);
727                 if (irq_desc[irq].action &&
728                     !(irq_desc[irq].status & IRQ_PER_CPU)) {
729                         if (irq_desc[irq].chip->set_affinity)
730                                 irq_desc[irq].chip->set_affinity(irq,
731                                         irq_desc[irq].affinity);
732                 }
733                 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
734         }
735 }
736 #endif
737
738 struct sun5_timer {
739         u64     count0;
740         u64     limit0;
741         u64     count1;
742         u64     limit1;
743 };
744
745 static struct sun5_timer *prom_timers;
746 static u64 prom_limit0, prom_limit1;
747
748 static void map_prom_timers(void)
749 {
750         struct device_node *dp;
751         const unsigned int *addr;
752
753         /* PROM timer node hangs out in the top level of device siblings... */
754         dp = of_find_node_by_path("/");
755         dp = dp->child;
756         while (dp) {
757                 if (!strcmp(dp->name, "counter-timer"))
758                         break;
759                 dp = dp->sibling;
760         }
761
762         /* Assume if node is not present, PROM uses different tick mechanism
763          * which we should not care about.
764          */
765         if (!dp) {
766                 prom_timers = (struct sun5_timer *) 0;
767                 return;
768         }
769
770         /* If PROM is really using this, it must be mapped by him. */
771         addr = of_get_property(dp, "address", NULL);
772         if (!addr) {
773                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
774                 prom_timers = (struct sun5_timer *) 0;
775                 return;
776         }
777         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
778 }
779
780 static void kill_prom_timer(void)
781 {
782         if (!prom_timers)
783                 return;
784
785         /* Save them away for later. */
786         prom_limit0 = prom_timers->limit0;
787         prom_limit1 = prom_timers->limit1;
788
789         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
790          * We turn both off here just to be paranoid.
791          */
792         prom_timers->limit0 = 0;
793         prom_timers->limit1 = 0;
794
795         /* Wheee, eat the interrupt packet too... */
796         __asm__ __volatile__(
797 "       mov     0x40, %%g2\n"
798 "       ldxa    [%%g0] %0, %%g1\n"
799 "       ldxa    [%%g2] %1, %%g1\n"
800 "       stxa    %%g0, [%%g0] %0\n"
801 "       membar  #Sync\n"
802         : /* no outputs */
803         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
804         : "g1", "g2");
805 }
806
807 void init_irqwork_curcpu(void)
808 {
809         int cpu = hard_smp_processor_id();
810
811         trap_block[cpu].irq_worklist = 0;
812 }
813
814 /* Please be very careful with register_one_mondo() and
815  * sun4v_register_mondo_queues().
816  *
817  * On SMP this gets invoked from the CPU trampoline before
818  * the cpu has fully taken over the trap table from OBP,
819  * and it's kernel stack + %g6 thread register state is
820  * not fully cooked yet.
821  *
822  * Therefore you cannot make any OBP calls, not even prom_printf,
823  * from these two routines.
824  */
825 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
826 {
827         unsigned long num_entries = (qmask + 1) / 64;
828         unsigned long status;
829
830         status = sun4v_cpu_qconf(type, paddr, num_entries);
831         if (status != HV_EOK) {
832                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
833                             "err %lu\n", type, paddr, num_entries, status);
834                 prom_halt();
835         }
836 }
837
838 void __cpuinit sun4v_register_mondo_queues(int this_cpu)
839 {
840         struct trap_per_cpu *tb = &trap_block[this_cpu];
841
842         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
843                            tb->cpu_mondo_qmask);
844         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
845                            tb->dev_mondo_qmask);
846         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
847                            tb->resum_qmask);
848         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
849                            tb->nonresum_qmask);
850 }
851
852 static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask)
853 {
854         unsigned long size = PAGE_ALIGN(qmask + 1);
855         void *p = __alloc_bootmem_low(size, size, 0);
856         if (!p) {
857                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
858                 prom_halt();
859         }
860
861         *pa_ptr = __pa(p);
862 }
863
864 static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
865 {
866         unsigned long size = PAGE_ALIGN(qmask + 1);
867         void *p = __alloc_bootmem_low(size, size, 0);
868
869         if (!p) {
870                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
871                 prom_halt();
872         }
873
874         *pa_ptr = __pa(p);
875 }
876
877 static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
878 {
879 #ifdef CONFIG_SMP
880         void *page;
881
882         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
883
884         page = alloc_bootmem_low_pages(PAGE_SIZE);
885         if (!page) {
886                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
887                 prom_halt();
888         }
889
890         tb->cpu_mondo_block_pa = __pa(page);
891         tb->cpu_list_pa = __pa(page + 64);
892 #endif
893 }
894
895 /* Allocate mondo and error queues for all possible cpus.  */
896 static void __init sun4v_init_mondo_queues(void)
897 {
898         int cpu;
899
900         for_each_possible_cpu(cpu) {
901                 struct trap_per_cpu *tb = &trap_block[cpu];
902
903                 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
904                 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
905                 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask);
906                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask);
907                 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
908                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa,
909                                tb->nonresum_qmask);
910
911                 init_cpu_send_mondo_info(tb);
912         }
913
914         /* Load up the boot cpu's entries.  */
915         sun4v_register_mondo_queues(hard_smp_processor_id());
916 }
917
918 static struct irqaction timer_irq_action = {
919         .name = "timer",
920 };
921
922 /* Only invoked on boot processor. */
923 void __init init_IRQ(void)
924 {
925         map_prom_timers();
926         kill_prom_timer();
927         memset(&ivector_table[0], 0, sizeof(ivector_table));
928
929         if (tlb_type == hypervisor)
930                 sun4v_init_mondo_queues();
931
932         /* We need to clear any IRQ's pending in the soft interrupt
933          * registers, a spurious one could be left around from the
934          * PROM timer which we just disabled.
935          */
936         clear_softint(get_softint());
937
938         /* Now that ivector table is initialized, it is safe
939          * to receive IRQ vector traps.  We will normally take
940          * one or two right now, in case some device PROM used
941          * to boot us wants to speak to us.  We just ignore them.
942          */
943         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
944                              "or        %%g1, %0, %%g1\n\t"
945                              "wrpr      %%g1, 0x0, %%pstate"
946                              : /* No outputs */
947                              : "i" (PSTATE_IE)
948                              : "g1");
949
950         irq_desc[0].action = &timer_irq_action;
951 }