1 /* sun4m_smp.c: Sparc SUN4M SMP support.
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/threads.h>
11 #include <linux/smp.h>
12 #include <linux/smp_lock.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/init.h>
16 #include <linux/spinlock.h>
18 #include <linux/swap.h>
19 #include <linux/profile.h>
20 #include <asm/cacheflush.h>
21 #include <asm/tlbflush.h>
23 #include <asm/ptrace.h>
24 #include <asm/atomic.h>
26 #include <asm/delay.h>
29 #include <asm/pgalloc.h>
30 #include <asm/pgtable.h>
31 #include <asm/oplib.h>
32 #include <asm/cpudata.h>
34 #define IRQ_RESCHEDULE 13
35 #define IRQ_STOP_CPU 14
36 #define IRQ_CROSS_CALL 15
38 extern ctxd_t *srmmu_ctx_table_phys;
40 extern void calibrate_delay(void);
42 extern volatile int smp_processors_ready;
43 extern int smp_num_cpus;
44 extern volatile unsigned long cpu_callin_map[NR_CPUS];
45 extern unsigned char boot_cpu_id;
46 extern int smp_activated;
47 extern volatile int __cpu_number_map[NR_CPUS];
48 extern volatile int __cpu_logical_map[NR_CPUS];
49 extern volatile unsigned long ipi_count;
50 extern volatile int smp_process_available;
51 extern volatile int smp_commenced;
52 extern int __smp4m_processor_id(void);
57 #define SMP_PRINTK(x) printk x
62 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
64 __asm__ __volatile__("swap [%1], %0\n\t" :
65 "=&r" (val), "=&r" (ptr) :
66 "0" (val), "1" (ptr));
70 static void smp_setup_percpu_timer(void);
71 extern void cpu_probe(void);
73 void __init smp4m_callin(void)
75 int cpuid = hard_smp_processor_id();
77 local_flush_cache_all();
78 local_flush_tlb_all();
80 set_irq_udt(boot_cpu_id);
82 /* Get our local ticker going. */
83 smp_setup_percpu_timer();
86 smp_store_cpu_info(cpuid);
88 local_flush_cache_all();
89 local_flush_tlb_all();
92 * Unblock the master CPU _only_ when the scheduler state
93 * of all secondary CPUs will be up-to-date, so after
94 * the SMP initialization the master will be just allowed
95 * to call the scheduler code.
97 /* Allow master to continue. */
98 swap((unsigned long *)&cpu_callin_map[cpuid], 1);
100 local_flush_cache_all();
101 local_flush_tlb_all();
105 /* Fix idle thread fields. */
106 __asm__ __volatile__("ld [%0], %%g6\n\t"
107 : : "r" (¤t_set[cpuid])
108 : "memory" /* paranoid */);
110 /* Attach to the address space of init_task. */
111 atomic_inc(&init_mm.mm_count);
112 current->active_mm = &init_mm;
114 while(!smp_commenced)
117 local_flush_cache_all();
118 local_flush_tlb_all();
123 extern void init_IRQ(void);
124 extern void cpu_panic(void);
127 * Cycle through the processors asking the PROM to start each one.
130 extern struct linux_prom_registers smp_penguin_ctable;
131 extern unsigned long trapbase_cpu1[];
132 extern unsigned long trapbase_cpu2[];
133 extern unsigned long trapbase_cpu3[];
135 void __init smp4m_boot_cpus(void)
140 printk("Entering SMP Mode...\n");
143 cpus_clear(cpu_present_map);
145 for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++)
146 cpu_set(mid, cpu_present_map);
148 for(i=0; i < NR_CPUS; i++) {
149 __cpu_number_map[i] = -1;
150 __cpu_logical_map[i] = -1;
153 __cpu_number_map[boot_cpu_id] = 0;
154 __cpu_logical_map[0] = boot_cpu_id;
155 current_thread_info()->cpu = boot_cpu_id;
157 smp_store_cpu_info(boot_cpu_id);
158 set_irq_udt(boot_cpu_id);
159 smp_setup_percpu_timer();
160 local_flush_cache_all();
161 if(cpu_find_by_instance(1, NULL, NULL))
162 return; /* Not an MP box. */
163 for(i = 0; i < NR_CPUS; i++) {
167 if (cpu_isset(i, cpu_present_map)) {
168 extern unsigned long sun4m_cpu_startup;
169 unsigned long *entry = &sun4m_cpu_startup;
170 struct task_struct *p;
173 /* Cook up an idler for this guy. */
176 current_set[i] = task_thread_info(p);
177 /* See trampoline.S for details... */
178 entry += ((i-1) * 3);
181 * Initialize the contexts table
182 * Since the call to prom_startcpu() trashes the structure,
183 * we need to re-initialize it for each cpu
185 smp_penguin_ctable.which_io = 0;
186 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
187 smp_penguin_ctable.reg_size = 0;
189 /* whirrr, whirrr, whirrrrrrrrr... */
190 printk("Starting CPU %d at %p\n", i, entry);
191 local_flush_cache_all();
192 prom_startcpu(cpu_data(i).prom_node,
193 &smp_penguin_ctable, 0, (char *)entry);
195 /* wheee... it's going... */
196 for(timeout = 0; timeout < 10000; timeout++) {
197 if(cpu_callin_map[i])
201 if(cpu_callin_map[i]) {
202 /* Another "Red Snapper". */
203 __cpu_number_map[i] = i;
204 __cpu_logical_map[i] = i;
207 printk("Processor %d is stuck.\n", i);
210 if(!(cpu_callin_map[i])) {
211 cpu_clear(i, cpu_present_map);
212 __cpu_number_map[i] = -1;
215 local_flush_cache_all();
217 printk("Error: only one Processor found.\n");
218 cpu_present_map = cpumask_of_cpu(smp_processor_id());
220 unsigned long bogosum = 0;
221 for_each_present_cpu(i)
222 bogosum += cpu_data(i).udelay_val;
223 printk("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n",
226 (bogosum/(5000/HZ))%100);
228 smp_num_cpus = cpucount + 1;
231 /* Free unneeded trap tables */
232 if (!cpu_isset(i, cpu_present_map)) {
233 ClearPageReserved(virt_to_page(trapbase_cpu1));
234 init_page_count(virt_to_page(trapbase_cpu1));
235 free_page((unsigned long)trapbase_cpu1);
239 if (!cpu_isset(2, cpu_present_map)) {
240 ClearPageReserved(virt_to_page(trapbase_cpu2));
241 init_page_count(virt_to_page(trapbase_cpu2));
242 free_page((unsigned long)trapbase_cpu2);
246 if (!cpu_isset(3, cpu_present_map)) {
247 ClearPageReserved(virt_to_page(trapbase_cpu3));
248 init_page_count(virt_to_page(trapbase_cpu3));
249 free_page((unsigned long)trapbase_cpu3);
254 /* Ok, they are spinning and ready to go. */
255 smp_processors_ready = 1;
258 /* At each hardware IRQ, we get this called to forward IRQ reception
259 * to the next processor. The caller must disable the IRQ level being
260 * serviced globally so that there are no double interrupts received.
262 * XXX See sparc64 irq.c.
264 void smp4m_irq_rotate(int cpu)
268 /* Cross calls, in order to work efficiently and atomically do all
269 * the message passing work themselves, only stopcpu and reschedule
270 * messages come through here.
272 void smp4m_message_pass(int target, int msg, unsigned long data, int wait)
274 static unsigned long smp_cpu_in_msg[NR_CPUS];
276 int me = smp_processor_id();
279 if(msg == MSG_RESCHEDULE) {
280 irq = IRQ_RESCHEDULE;
282 if(smp_cpu_in_msg[me])
284 } else if(msg == MSG_STOP_CPU) {
290 smp_cpu_in_msg[me]++;
291 if(target == MSG_ALL_BUT_SELF || target == MSG_ALL) {
292 mask = cpu_present_map;
293 if(target == MSG_ALL_BUT_SELF)
295 for(i = 0; i < 4; i++) {
296 if (cpu_isset(i, mask))
300 set_cpu_int(target, irq);
302 smp_cpu_in_msg[me]--;
306 printk("Yeeee, trying to send SMP msg(%d) on cpu %d\n", msg, me);
307 panic("Bogon SMP message pass.");
310 static struct smp_funcall {
317 unsigned long processors_in[NR_CPUS]; /* Set when ipi entered. */
318 unsigned long processors_out[NR_CPUS]; /* Set when ipi exited. */
321 static DEFINE_SPINLOCK(cross_call_lock);
323 /* Cross calls must be serialized, at least currently. */
324 void smp4m_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
325 unsigned long arg3, unsigned long arg4, unsigned long arg5)
327 if(smp_processors_ready) {
328 register int ncpus = smp_num_cpus;
331 spin_lock_irqsave(&cross_call_lock, flags);
333 /* Init function glue. */
334 ccall_info.func = func;
335 ccall_info.arg1 = arg1;
336 ccall_info.arg2 = arg2;
337 ccall_info.arg3 = arg3;
338 ccall_info.arg4 = arg4;
339 ccall_info.arg5 = arg5;
341 /* Init receive/complete mapping, plus fire the IPI's off. */
343 cpumask_t mask = cpu_present_map;
346 cpu_clear(smp_processor_id(), mask);
347 for(i = 0; i < ncpus; i++) {
348 if (cpu_isset(i, mask)) {
349 ccall_info.processors_in[i] = 0;
350 ccall_info.processors_out[i] = 0;
351 set_cpu_int(i, IRQ_CROSS_CALL);
353 ccall_info.processors_in[i] = 1;
354 ccall_info.processors_out[i] = 1;
364 while(!ccall_info.processors_in[i])
366 } while(++i < ncpus);
370 while(!ccall_info.processors_out[i])
372 } while(++i < ncpus);
375 spin_unlock_irqrestore(&cross_call_lock, flags);
379 /* Running cross calls. */
380 void smp4m_cross_call_irq(void)
382 int i = smp_processor_id();
384 ccall_info.processors_in[i] = 1;
385 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
386 ccall_info.arg4, ccall_info.arg5);
387 ccall_info.processors_out[i] = 1;
390 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
392 int cpu = smp_processor_id();
394 clear_profile_irq(cpu);
396 profile_tick(CPU_PROFILING, regs);
398 if(!--prof_counter(cpu)) {
399 int user = user_mode(regs);
402 update_process_times(user);
405 prof_counter(cpu) = prof_multiplier(cpu);
409 extern unsigned int lvl14_resolution;
411 static void __init smp_setup_percpu_timer(void)
413 int cpu = smp_processor_id();
415 prof_counter(cpu) = prof_multiplier(cpu) = 1;
416 load_profile_irq(cpu, lvl14_resolution);
418 if(cpu == boot_cpu_id)
422 void __init smp4m_blackbox_id(unsigned *addr)
424 int rd = *addr & 0x3e000000;
427 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
428 addr[1] = 0x8130200c | rd | rs1; /* srl reg, 0xc, reg */
429 addr[2] = 0x80082003 | rd | rs1; /* and reg, 3, reg */
432 void __init smp4m_blackbox_current(unsigned *addr)
434 int rd = *addr & 0x3e000000;
437 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
438 addr[2] = 0x8130200a | rd | rs1; /* srl reg, 0xa, reg */
439 addr[4] = 0x8008200c | rd | rs1; /* and reg, 3, reg */
442 void __init sun4m_init_smp(void)
444 BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
445 BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
446 BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
447 BTFIXUPSET_CALL(smp_message_pass, smp4m_message_pass, BTFIXUPCALL_NORM);
448 BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);