4 * Copyright (C) 2007 Paul Mundt
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 #include <linux/platform_device.h>
11 #include <linux/init.h>
12 #include <linux/serial.h>
16 static struct plat_sci_port sci_platform_data[] = {
18 .mapbase = 0xffc30000,
19 .flags = UPF_BOOT_AUTOCONF,
21 .irqs = { 40, 41, 43, 42 },
23 .mapbase = 0xffc40000,
24 .flags = UPF_BOOT_AUTOCONF,
26 .irqs = { 44, 45, 47, 46 },
28 .mapbase = 0xffc50000,
29 .flags = UPF_BOOT_AUTOCONF,
31 .irqs = { 48, 49, 51, 50 },
33 .mapbase = 0xffc60000,
34 .flags = UPF_BOOT_AUTOCONF,
36 .irqs = { 52, 53, 55, 54 },
42 static struct platform_device sci_device = {
46 .platform_data = sci_platform_data,
50 static struct platform_device *shx3_devices[] __initdata = {
54 static int __init shx3_devices_setup(void)
56 return platform_add_devices(shx3_devices,
57 ARRAY_SIZE(shx3_devices));
59 __initcall(shx3_devices_setup);
61 static struct intc2_data intc2_irq_table[] = {
62 { 16, 0, 0, 0, 1, 2 }, /* TMU0 */
63 { 40, 4, 0, 0x20, 0, 3 }, /* SCIF0 ERI */
64 { 41, 4, 0, 0x20, 1, 3 }, /* SCIF0 RXI */
65 { 42, 4, 0, 0x20, 2, 3 }, /* SCIF0 BRI */
66 { 43, 4, 0, 0x20, 3, 3 }, /* SCIF0 TXI */
69 static struct intc2_desc intc2_irq_desc __read_mostly = {
70 .prio_base = 0xfe410000,
71 .msk_base = 0xfe410820,
72 .mskclr_base = 0xfe410850,
74 .intc2_data = intc2_irq_table,
75 .nr_irqs = ARRAY_SIZE(intc2_irq_table),
82 void __init init_IRQ_intc2(void)
84 register_intc2_controller(&intc2_irq_desc);