4 * Copyright (C) 2008 Paul Mundt
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 #include <linux/platform_device.h>
11 #include <linux/init.h>
12 #include <linux/serial.h>
14 #include <linux/serial_sci.h>
15 #include <asm/mmzone.h>
17 static struct plat_sci_port sci_platform_data[] = {
19 .mapbase = 0xffe00000,
20 .flags = UPF_BOOT_AUTOCONF,
22 .irqs = { 80, 80, 80, 80 },
24 .mapbase = 0xffe10000,
25 .flags = UPF_BOOT_AUTOCONF,
27 .irqs = { 81, 81, 81, 81 },
29 .mapbase = 0xffe20000,
30 .flags = UPF_BOOT_AUTOCONF,
32 .irqs = { 82, 82, 82, 82 },
34 .mapbase = 0xa4e30000,
35 .flags = UPF_BOOT_AUTOCONF,
37 .irqs = { 56, 56, 56, 56 },
39 .mapbase = 0xa4e40000,
40 .flags = UPF_BOOT_AUTOCONF,
42 .irqs = { 88, 88, 88, 88 },
44 .mapbase = 0xa4e50000,
45 .flags = UPF_BOOT_AUTOCONF,
47 .irqs = { 109, 109, 109, 109 },
53 static struct platform_device sci_device = {
57 .platform_data = sci_platform_data,
61 static struct resource rtc_resources[] = {
64 .end = 0xa465fec0 + 0x58 - 1,
65 .flags = IORESOURCE_IO,
70 .flags = IORESOURCE_IRQ,
75 .flags = IORESOURCE_IRQ,
80 .flags = IORESOURCE_IRQ,
84 static struct platform_device rtc_device = {
87 .num_resources = ARRAY_SIZE(rtc_resources),
88 .resource = rtc_resources,
91 static struct resource sh7723_usb_host_resources[] = {
93 .name = "r8a66597_hcd",
96 .flags = IORESOURCE_MEM,
101 .flags = IORESOURCE_IRQ,
105 static struct platform_device sh7723_usb_host_device = {
106 .name = "r8a66597_hcd",
109 .dma_mask = NULL, /* not use dma */
110 .coherent_dma_mask = 0xffffffff,
112 .num_resources = ARRAY_SIZE(sh7723_usb_host_resources),
113 .resource = sh7723_usb_host_resources,
116 static struct resource iic_resources[] = {
121 .flags = IORESOURCE_MEM,
126 .flags = IORESOURCE_IRQ,
130 static struct platform_device iic_device = {
131 .name = "i2c-sh_mobile",
132 .num_resources = ARRAY_SIZE(iic_resources),
133 .resource = iic_resources,
136 static struct platform_device *sh7723_devices[] __initdata = {
140 &sh7723_usb_host_device,
143 static int __init sh7723_devices_setup(void)
145 return platform_add_devices(sh7723_devices,
146 ARRAY_SIZE(sh7723_devices));
148 __initcall(sh7723_devices_setup);
153 /* interrupt sources */
154 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
156 DMAC1A_DEI0,DMAC1A_DEI1,DMAC1A_DEI2,DMAC1A_DEI3,
157 _2DG_TRI,_2DG_INI,_2DG_CEI,
158 DMAC0A_DEI0,DMAC0A_DEI1,DMAC0A_DEI2,DMAC0A_DEI3,
159 VIO_CEUI,VIO_BEUI,VIO_VEU2HI,VIO_VOUI,
165 RTC_ATI,RTC_PRI,RTC_CUI,
166 DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR,
167 DMAC0B_DEI4,DMAC0B_DEI5,DMAC0B_DADERR,
169 SCIF_SCIF0,SCIF_SCIF1,SCIF_SCIF2,
170 MSIOF_MSIOFI0,MSIOF_MSIOFI1,
172 FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I,
173 I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI,
174 SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2,
179 TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2,
182 SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2,
185 TMU1_TUNI0,TMU1_TUNI1,TMU1_TUNI2,
187 /* interrupt groups */
188 DMAC1A, DMAC0A, VIO, DMAC0B, FLCTL, I2C, _2DG,
189 SDHI1, RTC, DMAC1B, SDHI0,
192 static struct intc_vect vectors[] __initdata = {
193 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
194 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
195 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
196 INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0),
198 INTC_VECT(DMAC1A_DEI0,0x700),
199 INTC_VECT(DMAC1A_DEI1,0x720),
200 INTC_VECT(DMAC1A_DEI2,0x740),
201 INTC_VECT(DMAC1A_DEI3,0x760),
203 INTC_VECT(_2DG_TRI, 0x780),
204 INTC_VECT(_2DG_INI, 0x7A0),
205 INTC_VECT(_2DG_CEI, 0x7C0),
207 INTC_VECT(DMAC0A_DEI0,0x800),
208 INTC_VECT(DMAC0A_DEI1,0x820),
209 INTC_VECT(DMAC0A_DEI2,0x840),
210 INTC_VECT(DMAC0A_DEI3,0x860),
212 INTC_VECT(VIO_CEUI,0x880),
213 INTC_VECT(VIO_BEUI,0x8A0),
214 INTC_VECT(VIO_VEU2HI,0x8C0),
215 INTC_VECT(VIO_VOUI,0x8E0),
217 INTC_VECT(SCIFA_SCIFA0,0x900),
218 INTC_VECT(VPU_VPUI,0x980),
219 INTC_VECT(TPU_TPUI,0x9A0),
220 INTC_VECT(ADC_ADI,0x9E0),
221 INTC_VECT(USB_USI0,0xA20),
223 INTC_VECT(RTC_ATI,0xA80),
224 INTC_VECT(RTC_PRI,0xAA0),
225 INTC_VECT(RTC_CUI,0xAC0),
227 INTC_VECT(DMAC1B_DEI4,0xB00),
228 INTC_VECT(DMAC1B_DEI5,0xB20),
229 INTC_VECT(DMAC1B_DADERR,0xB40),
231 INTC_VECT(DMAC0B_DEI4,0xB80),
232 INTC_VECT(DMAC0B_DEI5,0xBA0),
233 INTC_VECT(DMAC0B_DADERR,0xBC0),
235 INTC_VECT(KEYSC_KEYI,0xBE0),
236 INTC_VECT(SCIF_SCIF0,0xC00),
237 INTC_VECT(SCIF_SCIF1,0xC20),
238 INTC_VECT(SCIF_SCIF2,0xC40),
239 INTC_VECT(MSIOF_MSIOFI0,0xC80),
240 INTC_VECT(MSIOF_MSIOFI1,0xCA0),
241 INTC_VECT(SCIFA_SCIFA1,0xD00),
243 INTC_VECT(FLCTL_FLSTEI,0xD80),
244 INTC_VECT(FLCTL_FLTENDI,0xDA0),
245 INTC_VECT(FLCTL_FLTREQ0I,0xDC0),
246 INTC_VECT(FLCTL_FLTREQ1I,0xDE0),
248 INTC_VECT(I2C_ALI,0xE00),
249 INTC_VECT(I2C_TACKI,0xE20),
250 INTC_VECT(I2C_WAITI,0xE40),
251 INTC_VECT(I2C_DTEI,0xE60),
253 INTC_VECT(SDHI0_SDHII0,0xE80),
254 INTC_VECT(SDHI0_SDHII1,0xEA0),
255 INTC_VECT(SDHI0_SDHII2,0xEC0),
257 INTC_VECT(CMT_CMTI,0xF00),
258 INTC_VECT(TSIF_TSIFI,0xF20),
259 INTC_VECT(SIU_SIUI,0xF80),
260 INTC_VECT(SCIFA_SCIFA2,0xFA0),
262 INTC_VECT(TMU0_TUNI0,0x400),
263 INTC_VECT(TMU0_TUNI1,0x420),
264 INTC_VECT(TMU0_TUNI2,0x440),
266 INTC_VECT(IRDA_IRDAI,0x480),
267 INTC_VECT(ATAPI_ATAPII,0x4A0),
269 INTC_VECT(SDHI1_SDHII0,0x4E0),
270 INTC_VECT(SDHI1_SDHII1,0x500),
271 INTC_VECT(SDHI1_SDHII2,0x520),
273 INTC_VECT(VEU2H1_VEU2HI,0x560),
274 INTC_VECT(LCDC_LCDCI,0x580),
276 INTC_VECT(TMU1_TUNI0,0x920),
277 INTC_VECT(TMU1_TUNI1,0x940),
278 INTC_VECT(TMU1_TUNI2,0x960),
282 static struct intc_group groups[] __initdata = {
283 INTC_GROUP(DMAC1A,DMAC1A_DEI0,DMAC1A_DEI1,DMAC1A_DEI2,DMAC1A_DEI3),
284 INTC_GROUP(DMAC0A,DMAC0A_DEI0,DMAC0A_DEI1,DMAC0A_DEI2,DMAC0A_DEI3),
285 INTC_GROUP(VIO, VIO_CEUI,VIO_BEUI,VIO_VEU2HI,VIO_VOUI),
286 INTC_GROUP(DMAC0B, DMAC0B_DEI4,DMAC0B_DEI5,DMAC0B_DADERR),
287 INTC_GROUP(FLCTL,FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I),
288 INTC_GROUP(I2C,I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI),
289 INTC_GROUP(_2DG, _2DG_TRI,_2DG_INI,_2DG_CEI),
290 INTC_GROUP(SDHI1, SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2),
291 INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI),
292 INTC_GROUP(DMAC1B, DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR),
293 INTC_GROUP(SDHI0,SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2),
296 static struct intc_mask_reg mask_registers[] __initdata = {
297 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
298 { 0, TMU1_TUNI2,TMU1_TUNI1,TMU1_TUNI0,0,SDHI1_SDHII2,SDHI1_SDHII1,SDHI1_SDHII0} },
299 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
300 { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } },
301 { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
302 { 0, 0, 0, VPU_VPUI,0,0,0,SCIFA_SCIFA0 } },
303 { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */
304 { DMAC1A_DEI3,DMAC1A_DEI2,DMAC1A_DEI1,DMAC1A_DEI0,0,0,0,IRDA_IRDAI } },
305 { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */
306 { 0,TMU0_TUNI2,TMU0_TUNI1,TMU0_TUNI0,VEU2H1_VEU2HI,0,0,LCDC_LCDCI } },
307 { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */
308 { KEYSC_KEYI,DMAC0B_DADERR,DMAC0B_DEI5,DMAC0B_DEI4,0,SCIF_SCIF2,SCIF_SCIF1,SCIF_SCIF0 } },
309 { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */
310 { 0,0,0,SCIFA_SCIFA1,ADC_ADI,0,MSIOF_MSIOFI1,MSIOF_MSIOFI0 } },
311 { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */
312 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
313 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
314 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
315 { 0,SDHI0_SDHII2,SDHI0_SDHII1,SDHI0_SDHII0,0,0,SCIFA_SCIFA2,SIU_SIUI } },
316 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
317 { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } },
318 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
319 { 0, DMAC1B_DADERR,DMAC1B_DEI5,DMAC1B_DEI4,0,RTC_ATI,RTC_PRI,RTC_CUI } },
320 { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */
321 { 0,_2DG_CEI,_2DG_INI,_2DG_TRI,0,TPU_TPUI,0,TSIF_TSIFI } },
322 { 0xa40800b0, 0xa40800f0, 8, /* IMR12 / IMCR12 */
323 { 0,0,0,0,0,0,0,ATAPI_ATAPII } },
324 { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */
325 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
328 static struct intc_prio_reg prio_registers[] __initdata = {
329 { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2, IRDA_IRDAI } },
330 { 0xa4080004, 0, 16, 4, /* IPRB */ { VEU2H1_VEU2HI, LCDC_LCDCI, DMAC1A, 0} },
331 { 0xa4080008, 0, 16, 4, /* IPRC */ { TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2, 0} },
332 { 0xa408000c, 0, 16, 4, /* IPRD */ { } },
333 { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0A, VIO, SCIFA_SCIFA0, VPU_VPUI } },
334 { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC_KEYI, DMAC0B, USB_USI0, CMT_CMTI } },
335 { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF_SCIF0, SCIF_SCIF1, SCIF_SCIF2,0 } },
336 { 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF_MSIOFI0,MSIOF_MSIOFI1, FLCTL, I2C } },
337 { 0xa4080020, 0, 16, 4, /* IPRI */ { SCIFA_SCIFA1,0,TSIF_TSIFI,_2DG } },
338 { 0xa4080024, 0, 16, 4, /* IPRJ */ { ADC_ADI,0,SIU_SIUI,SDHI1 } },
339 { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC,DMAC1B,0,SDHI0 } },
340 { 0xa408002c, 0, 16, 4, /* IPRL */ { SCIFA_SCIFA2,0,TPU_TPUI,ATAPI_ATAPII } },
341 { 0xa4140010, 0, 32, 4, /* INTPRI00 */
342 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
345 static struct intc_sense_reg sense_registers[] __initdata = {
346 { 0xa414001c, 16, 2, /* ICR1 */
347 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
350 static struct intc_mask_reg ack_registers[] __initdata = {
351 { 0xa4140024, 0, 8, /* INTREQ00 */
352 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
355 static DECLARE_INTC_DESC_ACK(intc_desc, "sh7723", vectors, groups,
356 mask_registers, prio_registers, sense_registers,
359 void __init plat_irq_setup(void)
361 register_intc_controller(&intc_desc);