2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <asm/cache.h>
15 #include <asm/lowcore.h>
16 #include <asm/errno.h>
17 #include <asm/ptrace.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/unistd.h>
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
27 SP_PTREGS = STACK_FRAME_OVERHEAD
28 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
49 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
52 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
56 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
57 STACK_SIZE = 1 << STACK_SHIFT
59 #define BASED(name) name-system_call(%r13)
61 #ifdef CONFIG_TRACE_IRQFLAGS
63 l %r1,BASED(.Ltrace_irq_on)
68 l %r1,BASED(.Ltrace_irq_off)
72 .macro TRACE_IRQS_CHECK
73 tm SP_PSW(%r15),0x03 # irqs enabled?
75 l %r1,BASED(.Ltrace_irq_on)
78 0: l %r1,BASED(.Ltrace_irq_off)
84 #define TRACE_IRQS_OFF
85 #define TRACE_IRQS_CHECK
89 .macro LOCKDEP_SYS_EXIT
90 tm SP_PSW+1(%r15),0x01 # returning to user ?
92 l %r1,BASED(.Llockdep_sys_exit)
97 #define LOCKDEP_SYS_EXIT
101 * Register usage in interrupt handlers:
102 * R9 - pointer to current task structure
103 * R13 - pointer to literal pool
104 * R14 - return register for function calls
105 * R15 - kernel stack pointer
108 .macro STORE_TIMER lc_offset
109 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
114 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
115 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
116 lm %r10,%r11,\lc_from
125 1: stm %r10,%r11,\lc_sum
129 .macro SAVE_ALL_BASE savearea
130 stm %r12,%r15,\savearea
131 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
134 .macro SAVE_ALL_SVC psworg,savearea
136 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
139 .macro SAVE_ALL_SYNC psworg,savearea
141 tm \psworg+1,0x01 # test problem state bit
142 bz BASED(2f) # skip stack setup save
143 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
144 #ifdef CONFIG_CHECK_STACK
146 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
147 bz BASED(stack_overflow)
153 .macro SAVE_ALL_ASYNC psworg,savearea
155 tm \psworg+1,0x01 # test problem state bit
156 bnz BASED(1f) # from user -> load async stack
157 clc \psworg+4(4),BASED(.Lcritical_end)
159 clc \psworg+4(4),BASED(.Lcritical_start)
161 l %r14,BASED(.Lcleanup_critical)
163 tm 1(%r12),0x01 # retest problem state after cleanup
165 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
169 1: l %r15,__LC_ASYNC_STACK
170 #ifdef CONFIG_CHECK_STACK
172 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
173 bz BASED(stack_overflow)
179 .macro CREATE_STACK_FRAME psworg,savearea
180 s %r15,BASED(.Lc_spsize) # make room for registers & psw
181 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
183 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
184 icm %r12,12,__LC_SVC_ILC
185 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
187 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
189 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
192 .macro RESTORE_ALL psworg,sync
193 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
195 ni \psworg+1,0xfd # clear wait state bit
197 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
198 STORE_TIMER __LC_EXIT_TIMER
199 lpsw \psworg # back to caller
203 * Scheduler resume function, called by switch_to
204 * gpr2 = (task_struct *) prev
205 * gpr3 = (task_struct *) next
213 tm __THREAD_per(%r3),0xe8 # new process is using per ?
214 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
215 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
216 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
217 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
218 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
220 l %r4,__THREAD_info(%r2) # get thread_info of prev
221 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
222 bz __switch_to_no_mcck-__switch_to_base(%r1)
223 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
224 l %r4,__THREAD_info(%r3) # get thread_info of next
225 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
227 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
228 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
229 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
230 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
231 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
232 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
233 l %r3,__THREAD_info(%r3) # load thread_info from task struct
234 st %r3,__LC_THREAD_INFO
236 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
241 * SVC interrupt handler routine. System calls are synchronous events and
242 * are executed with interrupts enabled.
247 STORE_TIMER __LC_SYNC_ENTER_TIMER
249 SAVE_ALL_BASE __LC_SAVE_AREA
250 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
251 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
252 lh %r7,0x8a # get svc number from lowcore
253 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
255 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
257 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
259 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
262 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
263 sla %r7,2 # *4 and test for svc 0
264 bnz BASED(sysc_nr_ok) # svc number > 0
265 # svc 0: system call number in %r1
266 cl %r1,BASED(.Lnr_syscalls)
267 bnl BASED(sysc_nr_ok)
268 lr %r7,%r1 # copy svc number to %r7
271 mvc SP_ARGS(4,%r15),SP_R7(%r15)
273 l %r8,BASED(.Lsysc_table)
274 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
275 l %r8,0(%r7,%r8) # get system call addr.
276 bnz BASED(sysc_tracesys)
277 basr %r14,%r8 # call sys_xxxx
278 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
281 tm SP_PSW+1(%r15),0x01 # returning to user ?
282 bno BASED(sysc_restore)
283 tm __TI_flags+3(%r9),_TIF_WORK_SVC
284 bnz BASED(sysc_work) # there is work to do (signals etc.)
286 #ifdef CONFIG_TRACE_IRQFLAGS
287 la %r1,BASED(sysc_restore_trace_psw)
294 RESTORE_ALL __LC_RETURN_PSW,1
297 #ifdef CONFIG_TRACE_IRQFLAGS
299 .globl sysc_restore_trace_psw
300 sysc_restore_trace_psw:
301 .long 0, sysc_restore_trace + 0x80000000
305 # recheck if there is more work to do
308 tm __TI_flags+3(%r9),_TIF_WORK_SVC
309 bz BASED(sysc_restore) # there is no work to do
311 # One of the work bits is on. Find out which one.
314 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
315 bo BASED(sysc_mcck_pending)
316 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
317 bo BASED(sysc_reschedule)
318 tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
319 bnz BASED(sysc_sigpending)
320 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
321 bo BASED(sysc_restart)
322 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
323 bo BASED(sysc_singlestep)
324 b BASED(sysc_restore)
328 # _TIF_NEED_RESCHED is set, call schedule
331 l %r1,BASED(.Lschedule)
332 la %r14,BASED(sysc_work_loop)
333 br %r1 # call scheduler
336 # _TIF_MCCK_PENDING is set, call handler
339 l %r1,BASED(.Ls390_handle_mcck)
340 la %r14,BASED(sysc_work_loop)
341 br %r1 # TIF bit will be cleared by handler
344 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
347 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
348 la %r2,SP_PTREGS(%r15) # load pt_regs
349 l %r1,BASED(.Ldo_signal)
350 basr %r14,%r1 # call do_signal
351 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
352 bo BASED(sysc_restart)
353 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
354 bo BASED(sysc_singlestep)
355 b BASED(sysc_work_loop)
358 # _TIF_RESTART_SVC is set, set up registers and restart svc
361 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
362 l %r7,SP_R2(%r15) # load new svc number
364 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
365 lm %r2,%r6,SP_R2(%r15) # load svc arguments
366 b BASED(sysc_do_restart) # restart svc
369 # _TIF_SINGLE_STEP is set, call do_single_step
372 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
373 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
374 la %r2,SP_PTREGS(%r15) # address of register-save area
375 l %r1,BASED(.Lhandle_per) # load adr. of per handler
376 la %r14,BASED(sysc_return) # load adr. of system return
377 br %r1 # branch to do_single_step
380 # call trace before and after sys_call
384 la %r2,SP_PTREGS(%r15) # load pt_regs
389 clc SP_R2(4,%r15),BASED(.Lnr_syscalls)
390 bnl BASED(sysc_tracenogo)
391 l %r8,BASED(.Lsysc_table)
392 l %r7,SP_R2(%r15) # strace might have changed the
393 sll %r7,2 # system call
396 lm %r3,%r6,SP_R3(%r15)
397 l %r2,SP_ORIG_R2(%r15)
398 basr %r14,%r8 # call sys_xxx
399 st %r2,SP_R2(%r15) # store return value
401 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
402 bz BASED(sysc_return)
404 la %r2,SP_PTREGS(%r15) # load pt_regs
406 la %r14,BASED(sysc_return)
410 # a new process exits the kernel with ret_from_fork
414 l %r13,__LC_SVC_NEW_PSW+4
415 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
416 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
418 st %r15,SP_R15(%r15) # store stack pointer for new kthread
419 0: l %r1,BASED(.Lschedtail)
422 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
426 # kernel_execve function needs to deal with pt_regs that is not
431 stm %r12,%r15,48(%r15)
433 l %r13,__LC_SVC_NEW_PSW+4
434 s %r15,BASED(.Lc_spsize)
435 st %r14,__SF_BACKCHAIN(%r15)
436 la %r12,SP_PTREGS(%r15)
437 xc 0(__PT_SIZE,%r12),0(%r12)
438 l %r1,BASED(.Ldo_execve)
443 a %r15,BASED(.Lc_spsize)
444 lm %r12,%r15,48(%r15)
447 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
448 l %r15,__LC_KERNEL_STACK # load ksp
449 s %r15,BASED(.Lc_spsize) # make room for registers & psw
450 l %r9,__LC_THREAD_INFO
451 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
452 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
453 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
454 l %r1,BASED(.Lexecve_tail)
459 * Program check handler routine
462 .globl pgm_check_handler
465 * First we need to check for a special case:
466 * Single stepping an instruction that disables the PER event mask will
467 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
468 * For a single stepped SVC the program check handler gets control after
469 * the SVC new PSW has been loaded. But we want to execute the SVC first and
470 * then handle the PER event. Therefore we update the SVC old PSW to point
471 * to the pgm_check_handler and branch to the SVC handler after we checked
472 * if we have to load the kernel stack register.
473 * For every other possible cause for PER event without the PER mask set
474 * we just ignore the PER event (FIXME: is there anything we have to do
477 STORE_TIMER __LC_SYNC_ENTER_TIMER
478 SAVE_ALL_BASE __LC_SAVE_AREA
479 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
480 bnz BASED(pgm_per) # got per exception -> special case
481 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
482 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
483 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
484 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
485 bz BASED(pgm_no_vtime)
486 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
487 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
488 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
491 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
493 l %r3,__LC_PGM_ILC # load program interruption code
497 l %r7,BASED(.Ljump_table)
499 l %r7,0(%r8,%r7) # load address of handler routine
500 la %r2,SP_PTREGS(%r15) # address of register-save area
501 la %r14,BASED(sysc_return)
502 br %r7 # branch to interrupt-handler
505 # handle per exception
508 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
509 bnz BASED(pgm_per_std) # ok, normal per event from user space
510 # ok its one of the special cases, now we need to find out which one
511 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
513 # no interesting special case, ignore PER event
514 lm %r12,%r15,__LC_SAVE_AREA
518 # Normal per exception
521 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
522 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
523 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
524 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
525 bz BASED(pgm_no_vtime2)
526 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
527 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
528 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
531 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
534 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
535 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
536 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
537 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
538 tm SP_PSW+1(%r15),0x01 # kernel per event ?
540 l %r3,__LC_PGM_ILC # load program interruption code
542 nr %r8,%r3 # clear per-event-bit and ilc
543 be BASED(sysc_return) # only per or per+check ?
547 # it was a single stepped SVC that is causing all the trouble
550 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
551 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
552 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
553 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
554 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
555 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
557 lh %r7,0x8a # get svc number from lowcore
558 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
561 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
562 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
563 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
564 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
566 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
570 # per was called from kernel, must be kprobes
573 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
574 la %r2,SP_PTREGS(%r15) # address of register-save area
575 l %r1,BASED(.Lhandle_per) # load adr. of per handler
576 la %r14,BASED(sysc_restore)# load adr. of system return
577 br %r1 # branch to do_single_step
580 * IO interrupt handler routine
583 .globl io_int_handler
585 STORE_TIMER __LC_ASYNC_ENTER_TIMER
587 SAVE_ALL_BASE __LC_SAVE_AREA+16
588 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
589 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
590 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
591 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
592 bz BASED(io_no_vtime)
593 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
594 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
595 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
598 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
600 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
601 la %r2,SP_PTREGS(%r15) # address of register-save area
602 basr %r14,%r1 # branch to standard irq handler
604 tm SP_PSW+1(%r15),0x01 # returning to user ?
605 #ifdef CONFIG_PREEMPT
606 bno BASED(io_preempt) # no -> check for preemptive scheduling
608 bno BASED(io_restore) # no-> skip resched & signal
610 tm __TI_flags+3(%r9),_TIF_WORK_INT
611 bnz BASED(io_work) # there is work to do (signals etc.)
613 #ifdef CONFIG_TRACE_IRQFLAGS
614 la %r1,BASED(io_restore_trace_psw)
621 RESTORE_ALL __LC_RETURN_PSW,0
624 #ifdef CONFIG_TRACE_IRQFLAGS
626 .globl io_restore_trace_psw
627 io_restore_trace_psw:
628 .long 0, io_restore_trace + 0x80000000
631 #ifdef CONFIG_PREEMPT
633 icm %r0,15,__TI_precount(%r9)
634 bnz BASED(io_restore)
636 s %r1,BASED(.Lc_spsize)
637 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
638 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
641 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
642 bno BASED(io_restore)
643 mvc __TI_precount(4,%r9),BASED(.Lc_pactive)
645 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
646 l %r1,BASED(.Lschedule)
647 basr %r14,%r1 # call schedule
648 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
650 xc __TI_precount(4,%r9),__TI_precount(%r9)
651 b BASED(io_resume_loop)
655 # switch to kernel stack, then check the TIF bits
658 l %r1,__LC_KERNEL_STACK
659 s %r1,BASED(.Lc_spsize)
660 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
661 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
664 # One of the work bits is on. Find out which one.
665 # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGMASK, _TIF_NEED_RESCHED
666 # and _TIF_MCCK_PENDING
669 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
670 bo BASED(io_mcck_pending)
671 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
672 bo BASED(io_reschedule)
673 tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
674 bnz BASED(io_sigpending)
679 # _TIF_MCCK_PENDING is set, call handler
682 l %r1,BASED(.Ls390_handle_mcck)
683 basr %r14,%r1 # TIF bit will be cleared by handler
684 b BASED(io_work_loop)
687 # _TIF_NEED_RESCHED is set, call schedule
691 l %r1,BASED(.Lschedule)
692 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
693 basr %r14,%r1 # call scheduler
694 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
696 tm __TI_flags+3(%r9),_TIF_WORK_INT
697 bz BASED(io_restore) # there is no work to do
698 b BASED(io_work_loop)
701 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
705 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
706 la %r2,SP_PTREGS(%r15) # load pt_regs
707 l %r1,BASED(.Ldo_signal)
708 basr %r14,%r1 # call do_signal
709 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
711 b BASED(io_work_loop)
714 * External interrupt handler routine
717 .globl ext_int_handler
719 STORE_TIMER __LC_ASYNC_ENTER_TIMER
721 SAVE_ALL_BASE __LC_SAVE_AREA+16
722 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
723 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
724 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
725 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
726 bz BASED(ext_no_vtime)
727 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
728 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
729 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
732 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
734 la %r2,SP_PTREGS(%r15) # address of register-save area
735 lh %r3,__LC_EXT_INT_CODE # get interruption code
736 l %r1,BASED(.Ldo_extint)
743 * Machine check handler routines
746 .globl mcck_int_handler
748 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
749 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
750 SAVE_ALL_BASE __LC_SAVE_AREA+32
751 la %r12,__LC_MCK_OLD_PSW
752 tm __LC_MCCK_CODE,0x80 # system damage?
753 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
754 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
755 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
756 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
757 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
759 la %r14,__LC_SYNC_ENTER_TIMER
760 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
762 la %r14,__LC_ASYNC_ENTER_TIMER
763 0: clc 0(8,%r14),__LC_EXIT_TIMER
765 la %r14,__LC_EXIT_TIMER
766 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
768 la %r14,__LC_LAST_UPDATE_TIMER
770 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
773 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
774 bno BASED(mcck_int_main) # no -> skip cleanup critical
775 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
776 bnz BASED(mcck_int_main) # from user -> load async stack
777 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
778 bhe BASED(mcck_int_main)
779 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
780 bl BASED(mcck_int_main)
781 l %r14,BASED(.Lcleanup_critical)
784 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
788 l %r15,__LC_PANIC_STACK # load panic stack
789 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
790 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
791 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
792 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
793 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
794 bz BASED(mcck_no_vtime)
795 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
796 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
797 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
800 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
801 la %r2,SP_PTREGS(%r15) # load pt_regs
802 l %r1,BASED(.Ls390_mcck)
803 basr %r14,%r1 # call machine check handler
804 tm SP_PSW+1(%r15),0x01 # returning to user ?
805 bno BASED(mcck_return)
806 l %r1,__LC_KERNEL_STACK # switch to kernel stack
807 s %r1,BASED(.Lc_spsize)
808 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
809 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
811 stosm __SF_EMPTY(%r15),0x04 # turn dat on
812 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
813 bno BASED(mcck_return)
815 l %r1,BASED(.Ls390_handle_mcck)
816 basr %r14,%r1 # call machine check handler
819 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
820 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
821 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
822 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
823 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
825 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
827 lpsw __LC_RETURN_MCCK_PSW # back to caller
830 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
831 lpsw __LC_RETURN_MCCK_PSW # back to caller
833 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
836 * Restart interruption handler, kick starter for additional CPUs
839 #ifndef CONFIG_HOTPLUG_CPU
840 .section .init.text,"ax"
842 .globl restart_int_handler
844 l %r15,__LC_SAVE_AREA+60 # load ksp
845 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
846 lam %a0,%a15,__LC_AREGS_SAVE_AREA
847 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
848 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
850 l %r14,restart_addr-.(%r14)
851 br %r14 # branch to start_secondary
853 .long start_secondary
854 #ifndef CONFIG_HOTPLUG_CPU
859 * If we do not run with SMP enabled, let the new CPU crash ...
861 .globl restart_int_handler
865 lpsw restart_crash-restart_base(%r1)
868 .long 0x000a0000,0x00000000
872 #ifdef CONFIG_CHECK_STACK
874 * The synchronous or the asynchronous stack overflowed. We are dead.
875 * No need to properly save the registers, we are going to panic anyway.
876 * Setup a pt_regs so that show_trace can provide a good call trace.
879 l %r15,__LC_PANIC_STACK # change to panic stack
880 sl %r15,BASED(.Lc_spsize)
881 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
882 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
883 la %r1,__LC_SAVE_AREA
884 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
886 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
888 la %r1,__LC_SAVE_AREA+16
889 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
890 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
891 l %r1,BASED(1f) # branch to kernel_stack_overflow
892 la %r2,SP_PTREGS(%r15) # load pt_regs
894 1: .long kernel_stack_overflow
897 cleanup_table_system_call:
898 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
899 cleanup_table_sysc_return:
900 .long sysc_return + 0x80000000, sysc_leave + 0x80000000
901 cleanup_table_sysc_leave:
902 .long sysc_leave + 0x80000000, sysc_done + 0x80000000
903 cleanup_table_sysc_work_loop:
904 .long sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000
905 cleanup_table_io_return:
906 .long io_return + 0x80000000, io_leave + 0x80000000
907 cleanup_table_io_leave:
908 .long io_leave + 0x80000000, io_done + 0x80000000
909 cleanup_table_io_work_loop:
910 .long io_work_loop + 0x80000000, io_work_done + 0x80000000
913 clc 4(4,%r12),BASED(cleanup_table_system_call)
915 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
916 bl BASED(cleanup_system_call)
918 clc 4(4,%r12),BASED(cleanup_table_sysc_return)
920 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
921 bl BASED(cleanup_sysc_return)
923 clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
925 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
926 bl BASED(cleanup_sysc_leave)
928 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop)
930 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
931 bl BASED(cleanup_sysc_return)
933 clc 4(4,%r12),BASED(cleanup_table_io_return)
935 clc 4(4,%r12),BASED(cleanup_table_io_return+4)
936 bl BASED(cleanup_io_return)
938 clc 4(4,%r12),BASED(cleanup_table_io_leave)
940 clc 4(4,%r12),BASED(cleanup_table_io_leave+4)
941 bl BASED(cleanup_io_leave)
943 clc 4(4,%r12),BASED(cleanup_table_io_work_loop)
945 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4)
946 bl BASED(cleanup_io_return)
951 mvc __LC_RETURN_PSW(8),0(%r12)
952 c %r12,BASED(.Lmck_old_psw)
954 la %r12,__LC_SAVE_AREA+16
956 0: la %r12,__LC_SAVE_AREA+32
958 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
959 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
961 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
962 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
963 bhe BASED(cleanup_vtime)
965 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
967 mvc __LC_SAVE_AREA(16),0(%r12)
969 st %r12,__LC_SAVE_AREA+48 # argh
970 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
971 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
972 l %r12,__LC_SAVE_AREA+48 # argh
975 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
977 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
978 bhe BASED(cleanup_stime)
979 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
981 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
982 bh BASED(cleanup_update)
983 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
985 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
987 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
988 la %r12,__LC_RETURN_PSW
990 cleanup_system_call_insn:
991 .long sysc_saveall + 0x80000000
992 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
993 .long system_call + 0x80000000
994 .long sysc_vtime + 0x80000000
995 .long sysc_stime + 0x80000000
996 .long sysc_update + 0x80000000
1000 mvc __LC_RETURN_PSW(4),0(%r12)
1001 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
1002 la %r12,__LC_RETURN_PSW
1006 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
1008 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1009 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1010 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
1013 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1014 c %r12,BASED(.Lmck_old_psw)
1016 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1018 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1019 1: lm %r0,%r11,SP_R0(%r15)
1021 2: la %r12,__LC_RETURN_PSW
1023 cleanup_sysc_leave_insn:
1024 .long sysc_done - 4 + 0x80000000
1025 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1026 .long sysc_done - 8 + 0x80000000
1030 mvc __LC_RETURN_PSW(4),0(%r12)
1031 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
1032 la %r12,__LC_RETURN_PSW
1036 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
1038 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1039 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1040 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
1043 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1044 c %r12,BASED(.Lmck_old_psw)
1046 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1048 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1049 1: lm %r0,%r11,SP_R0(%r15)
1051 2: la %r12,__LC_RETURN_PSW
1053 cleanup_io_leave_insn:
1054 .long io_done - 4 + 0x80000000
1055 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1056 .long io_done - 8 + 0x80000000
1063 .Lc_spsize: .long SP_SIZE
1064 .Lc_overhead: .long STACK_FRAME_OVERHEAD
1065 .Lc_pactive: .long PREEMPT_ACTIVE
1066 .Lnr_syscalls: .long NR_syscalls
1067 .L0x018: .short 0x018
1068 .L0x020: .short 0x020
1069 .L0x028: .short 0x028
1070 .L0x030: .short 0x030
1071 .L0x038: .short 0x038
1077 .Ls390_mcck: .long s390_do_machine_check
1079 .long s390_handle_mcck
1080 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1081 .Ldo_IRQ: .long do_IRQ
1082 .Ldo_extint: .long do_extint
1083 .Ldo_signal: .long do_signal
1084 .Lhandle_per: .long do_single_step
1085 .Ldo_execve: .long do_execve
1086 .Lexecve_tail: .long execve_tail
1087 .Ljump_table: .long pgm_check_table
1088 .Lschedule: .long schedule
1089 .Ltrace: .long syscall_trace
1090 .Lschedtail: .long schedule_tail
1091 .Lsysc_table: .long sys_call_table
1092 #ifdef CONFIG_TRACE_IRQFLAGS
1093 .Ltrace_irq_on: .long trace_hardirqs_on
1095 .long trace_hardirqs_off
1097 .long lockdep_sys_exit
1100 .long __critical_start + 0x80000000
1102 .long __critical_end + 0x80000000
1104 .long cleanup_critical
1106 .section .rodata, "a"
1107 #define SYSCALL(esa,esame,emu) .long esa
1109 #include "syscalls.S"