2 * arch/ppc/platforms/85xx/mpc85xx_devices.c
4 * MPC85xx Device descriptions
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
8 * Copyright 2005 Freescale Semiconductor Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/device.h>
19 #include <linux/serial_8250.h>
20 #include <linux/fsl_devices.h>
21 #include <asm/mpc85xx.h>
23 #include <asm/ppc_sys.h>
25 /* We use offsets for IORESOURCE_MEM since we do not know at compile time
26 * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup
29 static struct gianfar_platform_data mpc85xx_tsec1_pdata = {
30 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
31 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
32 FSL_GIANFAR_DEV_HAS_MULTI_INTR,
33 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
36 static struct gianfar_platform_data mpc85xx_tsec2_pdata = {
37 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
38 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
39 FSL_GIANFAR_DEV_HAS_MULTI_INTR,
40 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
43 static struct gianfar_platform_data mpc85xx_fec_pdata = {
44 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
47 static struct fsl_i2c_platform_data mpc85xx_fsl_i2c_pdata = {
48 .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
51 static struct plat_serial8250_port serial_platform_data[] = {
54 .irq = MPC85xx_IRQ_DUART,
56 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ,
60 .irq = MPC85xx_IRQ_DUART,
62 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ,
66 struct platform_device ppc_sys_platform_devices[] = {
68 .name = "fsl-gianfar",
70 .dev.platform_data = &mpc85xx_tsec1_pdata,
72 .resource = (struct resource[]) {
74 .start = MPC85xx_ENET1_OFFSET,
75 .end = MPC85xx_ENET1_OFFSET +
76 MPC85xx_ENET1_SIZE - 1,
77 .flags = IORESOURCE_MEM,
81 .start = MPC85xx_IRQ_TSEC1_TX,
82 .end = MPC85xx_IRQ_TSEC1_TX,
83 .flags = IORESOURCE_IRQ,
87 .start = MPC85xx_IRQ_TSEC1_RX,
88 .end = MPC85xx_IRQ_TSEC1_RX,
89 .flags = IORESOURCE_IRQ,
93 .start = MPC85xx_IRQ_TSEC1_ERROR,
94 .end = MPC85xx_IRQ_TSEC1_ERROR,
95 .flags = IORESOURCE_IRQ,
100 .name = "fsl-gianfar",
102 .dev.platform_data = &mpc85xx_tsec2_pdata,
104 .resource = (struct resource[]) {
106 .start = MPC85xx_ENET2_OFFSET,
107 .end = MPC85xx_ENET2_OFFSET +
108 MPC85xx_ENET2_SIZE - 1,
109 .flags = IORESOURCE_MEM,
113 .start = MPC85xx_IRQ_TSEC2_TX,
114 .end = MPC85xx_IRQ_TSEC2_TX,
115 .flags = IORESOURCE_IRQ,
119 .start = MPC85xx_IRQ_TSEC2_RX,
120 .end = MPC85xx_IRQ_TSEC2_RX,
121 .flags = IORESOURCE_IRQ,
125 .start = MPC85xx_IRQ_TSEC2_ERROR,
126 .end = MPC85xx_IRQ_TSEC2_ERROR,
127 .flags = IORESOURCE_IRQ,
132 .name = "fsl-gianfar",
134 .dev.platform_data = &mpc85xx_fec_pdata,
136 .resource = (struct resource[]) {
138 .start = MPC85xx_ENET3_OFFSET,
139 .end = MPC85xx_ENET3_OFFSET +
140 MPC85xx_ENET3_SIZE - 1,
141 .flags = IORESOURCE_MEM,
145 .start = MPC85xx_IRQ_FEC,
146 .end = MPC85xx_IRQ_FEC,
147 .flags = IORESOURCE_IRQ,
154 .dev.platform_data = &mpc85xx_fsl_i2c_pdata,
156 .resource = (struct resource[]) {
158 .start = MPC85xx_IIC1_OFFSET,
159 .end = MPC85xx_IIC1_OFFSET +
160 MPC85xx_IIC1_SIZE - 1,
161 .flags = IORESOURCE_MEM,
164 .start = MPC85xx_IRQ_IIC1,
165 .end = MPC85xx_IRQ_IIC1,
166 .flags = IORESOURCE_IRQ,
174 .resource = (struct resource[]) {
176 .start = MPC85xx_DMA0_OFFSET,
177 .end = MPC85xx_DMA0_OFFSET +
178 MPC85xx_DMA0_SIZE - 1,
179 .flags = IORESOURCE_MEM,
182 .start = MPC85xx_IRQ_DMA0,
183 .end = MPC85xx_IRQ_DMA0,
184 .flags = IORESOURCE_IRQ,
192 .resource = (struct resource[]) {
194 .start = MPC85xx_DMA1_OFFSET,
195 .end = MPC85xx_DMA1_OFFSET +
196 MPC85xx_DMA1_SIZE - 1,
197 .flags = IORESOURCE_MEM,
200 .start = MPC85xx_IRQ_DMA1,
201 .end = MPC85xx_IRQ_DMA1,
202 .flags = IORESOURCE_IRQ,
210 .resource = (struct resource[]) {
212 .start = MPC85xx_DMA2_OFFSET,
213 .end = MPC85xx_DMA2_OFFSET +
214 MPC85xx_DMA2_SIZE - 1,
215 .flags = IORESOURCE_MEM,
218 .start = MPC85xx_IRQ_DMA2,
219 .end = MPC85xx_IRQ_DMA2,
220 .flags = IORESOURCE_IRQ,
228 .resource = (struct resource[]) {
230 .start = MPC85xx_DMA3_OFFSET,
231 .end = MPC85xx_DMA3_OFFSET +
232 MPC85xx_DMA3_SIZE - 1,
233 .flags = IORESOURCE_MEM,
236 .start = MPC85xx_IRQ_DMA3,
237 .end = MPC85xx_IRQ_DMA3,
238 .flags = IORESOURCE_IRQ,
243 .name = "serial8250",
245 .dev.platform_data = serial_platform_data,
247 [MPC85xx_PERFMON] = {
248 .name = "fsl-perfmon",
251 .resource = (struct resource[]) {
253 .start = MPC85xx_PERFMON_OFFSET,
254 .end = MPC85xx_PERFMON_OFFSET +
255 MPC85xx_PERFMON_SIZE - 1,
256 .flags = IORESOURCE_MEM,
259 .start = MPC85xx_IRQ_PERFMON,
260 .end = MPC85xx_IRQ_PERFMON,
261 .flags = IORESOURCE_IRQ,
269 .resource = (struct resource[]) {
271 .start = MPC85xx_SEC2_OFFSET,
272 .end = MPC85xx_SEC2_OFFSET +
273 MPC85xx_SEC2_SIZE - 1,
274 .flags = IORESOURCE_MEM,
277 .start = MPC85xx_IRQ_SEC2,
278 .end = MPC85xx_IRQ_SEC2,
279 .flags = IORESOURCE_IRQ,
284 [MPC85xx_CPM_FCC1] = {
285 .name = "fsl-cpm-fcc",
288 .resource = (struct resource[]) {
292 .flags = IORESOURCE_MEM,
297 .flags = IORESOURCE_MEM,
300 .start = SIU_INT_FCC1,
302 .flags = IORESOURCE_IRQ,
306 [MPC85xx_CPM_FCC2] = {
307 .name = "fsl-cpm-fcc",
310 .resource = (struct resource[]) {
314 .flags = IORESOURCE_MEM,
319 .flags = IORESOURCE_MEM,
322 .start = SIU_INT_FCC2,
324 .flags = IORESOURCE_IRQ,
328 [MPC85xx_CPM_FCC3] = {
329 .name = "fsl-cpm-fcc",
332 .resource = (struct resource[]) {
336 .flags = IORESOURCE_MEM,
341 .flags = IORESOURCE_MEM,
344 .start = SIU_INT_FCC3,
346 .flags = IORESOURCE_IRQ,
350 [MPC85xx_CPM_I2C] = {
351 .name = "fsl-cpm-i2c",
354 .resource = (struct resource[]) {
358 .flags = IORESOURCE_MEM,
361 .start = SIU_INT_I2C,
363 .flags = IORESOURCE_IRQ,
367 [MPC85xx_CPM_SCC1] = {
368 .name = "fsl-cpm-scc",
371 .resource = (struct resource[]) {
375 .flags = IORESOURCE_MEM,
378 .start = SIU_INT_SCC1,
380 .flags = IORESOURCE_IRQ,
384 [MPC85xx_CPM_SCC2] = {
385 .name = "fsl-cpm-scc",
388 .resource = (struct resource[]) {
392 .flags = IORESOURCE_MEM,
395 .start = SIU_INT_SCC2,
397 .flags = IORESOURCE_IRQ,
401 [MPC85xx_CPM_SCC3] = {
402 .name = "fsl-cpm-scc",
405 .resource = (struct resource[]) {
409 .flags = IORESOURCE_MEM,
412 .start = SIU_INT_SCC3,
414 .flags = IORESOURCE_IRQ,
418 [MPC85xx_CPM_SCC4] = {
419 .name = "fsl-cpm-scc",
422 .resource = (struct resource[]) {
426 .flags = IORESOURCE_MEM,
429 .start = SIU_INT_SCC4,
431 .flags = IORESOURCE_IRQ,
435 [MPC85xx_CPM_SPI] = {
436 .name = "fsl-cpm-spi",
439 .resource = (struct resource[]) {
443 .flags = IORESOURCE_MEM,
446 .start = SIU_INT_SPI,
448 .flags = IORESOURCE_IRQ,
452 [MPC85xx_CPM_MCC1] = {
453 .name = "fsl-cpm-mcc",
456 .resource = (struct resource[]) {
460 .flags = IORESOURCE_MEM,
463 .start = SIU_INT_MCC1,
465 .flags = IORESOURCE_IRQ,
469 [MPC85xx_CPM_MCC2] = {
470 .name = "fsl-cpm-mcc",
473 .resource = (struct resource[]) {
477 .flags = IORESOURCE_MEM,
480 .start = SIU_INT_MCC2,
482 .flags = IORESOURCE_IRQ,
486 [MPC85xx_CPM_SMC1] = {
487 .name = "fsl-cpm-smc",
490 .resource = (struct resource[]) {
494 .flags = IORESOURCE_MEM,
497 .start = SIU_INT_SMC1,
499 .flags = IORESOURCE_IRQ,
503 [MPC85xx_CPM_SMC2] = {
504 .name = "fsl-cpm-smc",
507 .resource = (struct resource[]) {
511 .flags = IORESOURCE_MEM,
514 .start = SIU_INT_SMC2,
516 .flags = IORESOURCE_IRQ,
520 [MPC85xx_CPM_USB] = {
521 .name = "fsl-cpm-usb",
524 .resource = (struct resource[]) {
528 .flags = IORESOURCE_MEM,
531 .start = SIU_INT_USB,
533 .flags = IORESOURCE_IRQ,
537 #endif /* CONFIG_CPM2 */
540 static int __init mach_mpc85xx_fixup(struct platform_device *pdev)
542 ppc_sys_fixup_mem_resource(pdev, CCSRBAR);
546 static int __init mach_mpc85xx_init(void)
548 ppc_sys_device_fixup = mach_mpc85xx_fixup;
552 postcore_initcall(mach_mpc85xx_init);