1 /*arch/ppc/platforms/mpc885ads-setup.c
3 * Platform setup for the Freescale mpc885ads board
5 * Vitaly Bordug <vbordug@ru.mvista.com>
7 * Copyright 2005 MontaVista Software Inc.
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
14 #include <linux/config.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/param.h>
18 #include <linux/string.h>
19 #include <linux/ioport.h>
20 #include <linux/device.h>
22 #include <linux/fs_enet_pd.h>
23 #include <linux/mii.h>
25 #include <asm/delay.h>
27 #include <asm/machdep.h>
29 #include <asm/processor.h>
30 #include <asm/system.h>
32 #include <asm/ppcboot.h>
33 #include <asm/8xx_immap.h>
34 #include <asm/commproc.h>
35 #include <asm/ppc_sys.h>
36 #include <asm/mpc8xx.h>
38 extern unsigned char __res[];
40 static struct fs_mii_bus_info fec_mii_bus_info = {
45 static struct fs_mii_bus_info scc_mii_bus_info = {
46 .method = fsmii_fixed,
52 static struct fs_platform_info mpc8xx_fec_pdata[] = {
66 .bus_info = &fec_mii_bus_info,
70 static struct fs_platform_info mpc8xx_scc_pdata = {
81 .bus_info = &scc_mii_bus_info,
84 void __init board_init(void)
86 volatile cpm8xx_t *cp = cpmp;
89 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
91 if (bcsr_io == NULL) {
92 printk(KERN_CRIT "Could not remap BCSR1\n");
95 #ifdef CONFIG_SERIAL_CPM_SMC1
96 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
97 clrbits32(bcsr_io,(0x80000000 >> 7));
99 setbits32(bcsr_io,(0x80000000 >> 7));
101 cp->cp_pbpar &= ~(0x000000c0);
102 cp->cp_pbdir |= 0x000000c0;
103 cp->cp_smc[0].smc_smcmr = 0;
104 cp->cp_smc[0].smc_smce = 0;
107 #ifdef CONFIG_SERIAL_CPM_SMC2
108 cp->cp_simode &= ~(0xe0000000 >> 1);
109 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
110 clrbits32(bcsr_io,(0x80000000 >> 13));
112 clrbits32(bcsr_io,(0x80000000 >> 13));
113 cp->cp_pbpar &= ~(0x00000c00);
114 cp->cp_pbdir |= 0x00000c00;
115 cp->cp_smc[1].smc_smcmr = 0;
116 cp->cp_smc[1].smc_smce = 0;
121 static void setup_fec1_ioports(void)
123 immap_t *immap = (immap_t *) IMAP_ADDR;
125 setbits16(&immap->im_ioport.iop_pdpar, 0x1fff);
126 setbits16(&immap->im_ioport.iop_pddir, 0x1fff);
129 static void setup_scc1_ioports(void)
131 immap_t *immap = (immap_t *) IMAP_ADDR;
134 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
136 if (bcsr_io == NULL) {
137 printk(KERN_CRIT "Could not remap BCSR1\n");
143 clrbits32(bcsr_io,BCSR1_ETHEN);
145 /* Configure port A pins for Txd and Rxd.
147 /* Disable receive and transmit in case EPPC-Bug started it.
149 setbits16(&immap->im_ioport.iop_papar, PA_ENET_RXD | PA_ENET_TXD);
150 clrbits16(&immap->im_ioport.iop_padir, PA_ENET_RXD | PA_ENET_TXD);
151 clrbits16(&immap->im_ioport.iop_paodr, PA_ENET_TXD);
153 /* Configure port C pins to enable CLSN and RENA.
155 clrbits16(&immap->im_ioport.iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
156 clrbits16(&immap->im_ioport.iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
157 setbits16(&immap->im_ioport.iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
158 /* Configure port A for TCLK and RCLK.
160 setbits16(&immap->im_ioport.iop_papar, PA_ENET_TCLK | PA_ENET_RCLK);
161 clrbits16(&immap->im_ioport.iop_padir, PA_ENET_TCLK | PA_ENET_RCLK);
162 clrbits32(&immap->im_cpm.cp_pbpar, PB_ENET_TENA);
163 clrbits32(&immap->im_cpm.cp_pbdir, PB_ENET_TENA);
165 /* Configure Serial Interface clock routing.
166 * First, clear all SCC bits to zero, then set the ones we want.
168 clrbits32(&immap->im_cpm.cp_sicr, SICR_ENET_MASK);
169 setbits32(&immap->im_cpm.cp_sicr, SICR_ENET_CLKRT);
171 /* In the original SCC enet driver the following code is placed at
172 the end of the initialization */
173 setbits32(&immap->im_cpm.cp_pbpar, PB_ENET_TENA);
174 setbits32(&immap->im_cpm.cp_pbdir, PB_ENET_TENA);
178 static void mpc866ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no)
180 struct fs_platform_info *fpi = pdev->dev.platform_data;
182 volatile cpm8xx_t *cp;
183 bd_t *bd = (bd_t *) __res;
187 /* Get pointer to Communication Processor */
191 fpi = &mpc8xx_fec_pdata[0];
192 fpi->init_ioports = &setup_fec1_ioports;
196 fpi = &mpc8xx_scc_pdata;
197 fpi->init_ioports = &setup_scc1_ioports;
201 printk(KERN_WARNING"Device %s is not supported!\n", pdev->name);
205 pdev->dev.platform_data = fpi;
208 e = (unsigned char *)&bd->bi_enetaddr;
209 for (i = 0; i < 6; i++)
210 fpi->macaddr[i] = *e++;
212 fpi->macaddr[5 - pdev->id]++;
216 static void mpc866ads_fixup_fec_enet_pdata(struct platform_device *pdev,
219 /* This is for FEC devices only */
220 if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec")))
222 mpc866ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1);
225 static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev,
228 /* This is for SCC devices only */
229 if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc")))
232 mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
235 static int mpc866ads_platform_notify(struct device *dev)
237 static const struct platform_notify_dev_map dev_map[] = {
239 .bus_id = "fsl-cpm-fec",
240 .rtn = mpc866ads_fixup_fec_enet_pdata,
243 .bus_id = "fsl-cpm-scc",
244 .rtn = mpc866ads_fixup_scc_enet_pdata,
251 platform_notify_map(dev_map,dev);
256 int __init mpc866ads_init(void)
258 printk(KERN_NOTICE "mpc866ads: Init\n");
260 platform_notify = mpc866ads_platform_notify;
262 ppc_sys_device_initfunc();
263 ppc_sys_device_disable_all();
265 #ifdef MPC8xx_SECOND_ETH_SCC1
266 ppc_sys_device_enable(MPC8xx_CPM_SCC1);
268 ppc_sys_device_enable(MPC8xx_CPM_FEC1);
273 arch_initcall(mpc866ads_init);