2 * Common prep boot and setup code.
5 #include <linux/module.h>
6 #include <linux/string.h>
7 #include <linux/sched.h>
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/reboot.h>
11 #include <linux/delay.h>
12 #include <linux/initrd.h>
13 #include <linux/screen_info.h>
14 #include <linux/bootmem.h>
15 #include <linux/seq_file.h>
16 #include <linux/root_dev.h>
17 #include <linux/cpu.h>
18 #include <linux/console.h>
20 #include <asm/residual.h>
23 #include <asm/processor.h>
24 #include <asm/pgtable.h>
25 #include <asm/bootinfo.h>
26 #include <asm/setup.h>
29 #include <asm/cputable.h>
30 #include <asm/bootx.h>
31 #include <asm/btext.h>
32 #include <asm/machdep.h>
33 #include <asm/uaccess.h>
34 #include <asm/system.h>
35 #include <asm/sections.h>
36 #include <asm/nvram.h>
40 #define USES_PPC_SYS (defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
41 defined(CONFIG_PPC_MPC52xx))
44 #include <asm/ppc_sys.h>
47 #if defined CONFIG_KGDB
51 extern void platform_init(unsigned long r3, unsigned long r4,
52 unsigned long r5, unsigned long r6, unsigned long r7);
53 extern void reloc_got2(unsigned long offset);
55 extern void ppc6xx_idle(void);
56 extern void power4_idle(void);
58 extern boot_infos_t *boot_infos;
60 /* Used with the BI_MEMSIZE bootinfo parameter to store the memory
61 size value reported by the boot loader. */
62 unsigned long boot_mem_size;
64 unsigned long ISA_DMA_THRESHOLD;
65 unsigned int DMA_MODE_READ;
66 unsigned int DMA_MODE_WRITE;
68 #ifdef CONFIG_PPC_PREP
69 extern void prep_init(unsigned long r3, unsigned long r4,
70 unsigned long r5, unsigned long r6, unsigned long r7);
73 #endif /* CONFIG_PPC_PREP */
76 EXPORT_SYMBOL(have_of);
79 int ppc_do_canonicalize_irqs;
80 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
83 #ifdef CONFIG_VGA_CONSOLE
84 unsigned long vgacon_remap_base;
87 struct machdep_calls ppc_md;
90 * These are used in binfmt_elf.c to put aux entries on the stack
91 * for each elf executable being started.
97 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_FB_VGA16) || \
98 defined(CONFIG_FB_VGA16_MODULE) || defined(CONFIG_FB_VESA)
99 struct screen_info screen_info = {
100 0, 25, /* orig-x, orig-y */
102 0, /* orig-video-page */
103 0, /* orig-video-mode */
104 80, /* orig-video-cols */
105 0,0,0, /* ega_ax, ega_bx, ega_cx */
106 25, /* orig-video-lines */
107 1, /* orig-video-isVGA */
108 16 /* orig-video-points */
110 #endif /* CONFIG_VGA_CONSOLE || CONFIG_FB_VGA16 || CONFIG_FB_VESA */
112 void machine_restart(char *cmd)
120 static void ppc_generic_power_off(void)
125 void machine_halt(void)
133 void (*pm_power_off)(void) = ppc_generic_power_off;
135 void machine_power_off(void)
142 ppc_generic_power_off();
146 extern u32 cpu_temp(unsigned long cpu);
147 extern u32 cpu_temp_both(unsigned long cpu);
148 #endif /* CONFIG_TAU */
150 int show_cpuinfo(struct seq_file *m, void *v)
155 unsigned short maj, min;
159 /* Show summary information */
161 unsigned long bogosum = 0;
162 for_each_online_cpu(i)
163 bogosum += cpu_data[i].loops_per_jiffy;
164 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
165 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
166 #endif /* CONFIG_SMP */
168 if (ppc_md.show_cpuinfo != NULL)
169 err = ppc_md.show_cpuinfo(m);
176 pvr = cpu_data[i].pvr;
177 lpj = cpu_data[i].loops_per_jiffy;
179 pvr = mfspr(SPRN_PVR);
180 lpj = loops_per_jiffy;
183 seq_printf(m, "processor\t: %d\n", i);
184 seq_printf(m, "cpu\t\t: ");
186 if (cur_cpu_spec->pvr_mask)
187 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
189 seq_printf(m, "unknown (%08x)", pvr);
190 #ifdef CONFIG_ALTIVEC
191 if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
192 seq_printf(m, ", altivec supported");
197 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
198 #ifdef CONFIG_TAU_AVERAGE
199 /* more straightforward, but potentially misleading */
200 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
203 /* show the actual temp sensor range */
205 temp = cpu_temp_both(i);
206 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
207 temp & 0xff, temp >> 16);
210 #endif /* CONFIG_TAU */
212 if (ppc_md.show_percpuinfo != NULL) {
213 err = ppc_md.show_percpuinfo(m, i);
218 /* If we are a Freescale core do a simple check so
219 * we dont have to keep adding cases in the future */
220 if ((PVR_VER(pvr) & 0x8000) == 0x8000) {
224 switch (PVR_VER(pvr)) {
225 case 0x0020: /* 403 family */
226 maj = PVR_MAJ(pvr) + 1;
229 case 0x1008: /* 740P/750P ?? */
230 maj = ((pvr >> 8) & 0xFF) - 1;
234 maj = (pvr >> 8) & 0xFF;
240 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
241 maj, min, PVR_VER(pvr), PVR_REV(pvr));
243 seq_printf(m, "bogomips\t: %lu.%02lu\n",
244 lpj / (500000/HZ), (lpj / (5000/HZ)) % 100);
247 if (cur_ppc_sys_spec->ppc_sys_name)
248 seq_printf(m, "chipset\t\t: %s\n",
249 cur_ppc_sys_spec->ppc_sys_name);
259 static void *c_start(struct seq_file *m, loff_t *pos)
263 return i <= NR_CPUS? (void *) (i + 1): NULL;
266 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
269 return c_start(m, pos);
272 static void c_stop(struct seq_file *m, void *v)
276 const struct seq_operations cpuinfo_op = {
280 .show = show_cpuinfo,
284 * We're called here very early in the boot. We determine the machine
285 * type and call the appropriate low-level setup functions.
286 * -- Cort <cort@fsmlabs.com>
288 * Note that the kernel may be running at an address which is different
289 * from the address that it was linked at, so we must use RELOC/PTRRELOC
290 * to access static data (including strings). -- paulus
294 early_init(int r3, int r4, int r5)
297 unsigned long offset = reloc_offset();
298 struct cpu_spec *spec;
301 phys = offset + KERNELBASE;
303 /* First zero the BSS -- use memset, some arches don't have
305 memset_io(PTRRELOC(&__bss_start), 0, _end - __bss_start);
308 * Identify the CPU type and fix up code sections
309 * that depend on which cpu we have.
311 #if defined(CONFIG_440EP) && defined(CONFIG_PPC_FPU)
312 /* We pass the virtual PVR here for 440EP as 440EP and 440GR have
313 * identical PVRs and there is no reliable way to check for the FPU
315 spec = identify_cpu(offset, (mfspr(SPRN_PVR) | 0x8));
317 spec = identify_cpu(offset, mfspr(SPRN_PVR));
319 do_feature_fixups(spec->cpu_features,
320 PTRRELOC(&__start___ftr_fixup),
321 PTRRELOC(&__stop___ftr_fixup));
326 #ifdef CONFIG_PPC_PREP
328 * The PPC_PREP version of platform_init...
331 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
332 unsigned long r6, unsigned long r7)
334 #ifdef CONFIG_BOOTX_TEXT
335 if (boot_text_mapped) {
341 parse_bootinfo(find_bootinfo());
343 prep_init(r3, r4, r5, r6, r7);
345 #endif /* CONFIG_PPC_PREP */
347 struct bi_record *find_bootinfo(void)
349 struct bi_record *rec;
351 rec = (struct bi_record *)_ALIGN((ulong)__bss_start+(1<<20)-1,(1<<20));
352 if ( rec->tag != BI_FIRST ) {
354 * This 0x10000 offset is a terrible hack but it will go away when
355 * we have the bootloader handle all the relocation and
358 rec = (struct bi_record *)_ALIGN((ulong)__bss_start+0x10000+(1<<20)-1,(1<<20));
359 if ( rec->tag != BI_FIRST )
365 void parse_bootinfo(struct bi_record *rec)
367 if (rec == NULL || rec->tag != BI_FIRST)
369 while (rec->tag != BI_LAST) {
370 ulong *data = rec->data;
373 strlcpy(cmd_line, (void *)data, sizeof(cmd_line));
375 #ifdef CONFIG_BLK_DEV_INITRD
377 initrd_start = data[0] + KERNELBASE;
378 initrd_end = data[0] + data[1] + KERNELBASE;
380 #endif /* CONFIG_BLK_DEV_INITRD */
382 boot_mem_size = data[0];
385 rec = (struct bi_record *)((ulong)rec + rec->size);
390 * Find out what kind of machine we're on and save any data we need
391 * from the early boot process (devtree is copied on pmac by prom_init()).
392 * This is called very early on the boot process, after a minimal
393 * MMU environment has been set up but before MMU_init is called.
396 machine_init(unsigned long r3, unsigned long r4, unsigned long r5,
397 unsigned long r6, unsigned long r7)
399 #ifdef CONFIG_CMDLINE
400 strlcpy(cmd_line, CONFIG_CMDLINE, sizeof(cmd_line));
401 #endif /* CONFIG_CMDLINE */
404 ppc_md.power_save = ppc6xx_idle;
407 platform_init(r3, r4, r5, r6, r7);
410 ppc_md.progress("id mach(): done", 0x200);
412 #ifdef CONFIG_BOOKE_WDT
413 /* Checks wdt=x and wdt_period=xx command-line option */
414 int __init early_parse_wdt(char *p)
416 if (p && strncmp(p, "0", 1) != 0)
417 booke_wdt_enabled = 1;
421 early_param("wdt", early_parse_wdt);
423 int __init early_parse_wdt_period (char *p)
426 booke_wdt_period = simple_strtoul(p, NULL, 0);
430 early_param("wdt_period", early_parse_wdt_period);
431 #endif /* CONFIG_BOOKE_WDT */
433 /* Checks "l2cr=xxxx" command-line option */
434 int __init ppc_setup_l2cr(char *str)
436 if (cpu_has_feature(CPU_FTR_L2CR)) {
437 unsigned long val = simple_strtoul(str, NULL, 0);
438 printk(KERN_INFO "l2cr set to %lx\n", val);
439 _set_L2CR(0); /* force invalidate by disable cache */
440 _set_L2CR(val); /* and enable it */
444 __setup("l2cr=", ppc_setup_l2cr);
446 #ifdef CONFIG_GENERIC_NVRAM
448 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
449 unsigned char nvram_read_byte(int addr)
451 if (ppc_md.nvram_read_val)
452 return ppc_md.nvram_read_val(addr);
455 EXPORT_SYMBOL(nvram_read_byte);
457 void nvram_write_byte(unsigned char val, int addr)
459 if (ppc_md.nvram_write_val)
460 ppc_md.nvram_write_val(addr, val);
462 EXPORT_SYMBOL(nvram_write_byte);
464 void nvram_sync(void)
466 if (ppc_md.nvram_sync)
469 EXPORT_SYMBOL(nvram_sync);
471 #endif /* CONFIG_NVRAM */
473 static struct cpu cpu_devices[NR_CPUS];
475 int __init ppc_init(void)
479 /* clear the progress line */
480 if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff);
482 /* register CPU devices */
483 for_each_possible_cpu(i)
484 register_cpu(&cpu_devices[i], i);
486 /* call platform init */
487 if (ppc_md.init != NULL) {
493 arch_initcall(ppc_init);
495 /* Warning, IO base is not yet inited */
496 void __init setup_arch(char **cmdline_p)
499 extern void do_init_bootmem(void);
501 /* so udelay does something sensible, assume <= 1000 bogomips */
502 loops_per_jiffy = 500000000 / HZ;
504 if (ppc_md.init_early)
509 if (strstr(cmd_line, "xmon"))
511 #endif /* CONFIG_XMON */
512 if ( ppc_md.progress ) ppc_md.progress("setup_arch: enter", 0x3eab);
514 #if defined(CONFIG_KGDB)
515 if (ppc_md.kgdb_map_scc)
516 ppc_md.kgdb_map_scc();
518 if (strstr(cmd_line, "gdb")) {
520 ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
521 printk("kgdb breakpoint activated\n");
527 * Set cache line size based on type of cpu as a default.
528 * Systems with OF can look in the properties on the cpu node(s)
529 * for a possibly more accurate value.
531 if (! cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) {
532 dcache_bsize = cur_cpu_spec->dcache_bsize;
533 icache_bsize = cur_cpu_spec->icache_bsize;
536 ucache_bsize = dcache_bsize = icache_bsize
537 = cur_cpu_spec->dcache_bsize;
539 /* reboot on panic */
542 init_mm.start_code = PAGE_OFFSET;
543 init_mm.end_code = (unsigned long) _etext;
544 init_mm.end_data = (unsigned long) _edata;
545 init_mm.brk = (unsigned long) klimit;
547 /* Save unparsed command line copy for /proc/cmdline */
548 strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
549 *cmdline_p = cmd_line;
553 /* set up the bootmem stuff with available memory */
555 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
557 #ifdef CONFIG_PPC_OCP
558 /* Initialize OCP device list */
560 if ( ppc_md.progress ) ppc_md.progress("ocp: exit", 0x3eab);
563 #ifdef CONFIG_DUMMY_CONSOLE
564 conswitchp = &dummy_con;
568 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);