1 /* Board specific functions for those embedded 8xx boards that do
2 * not have boot monitor support for board information.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
10 #include <linux/types.h>
11 #include <linux/config.h>
12 #include <linux/string.h>
15 #include <asm/mpc8xx.h>
18 #include <asm/mpc8260.h>
19 #include <asm/immap_cpm2.h>
24 extern unsigned long timebase_period_ns;
26 /* For those boards that don't provide one.
28 #if !defined(CONFIG_MBX)
33 * These are just the basic master read/write operations so we can
34 * examine serial EEPROM.
36 extern void iic_read(uint devaddr, u_char *buf, uint offset, uint count);
38 /* Supply a default Ethernet address for those eval boards that don't
39 * ship with one. This is an address from the MBX board I have, so
40 * it is unlikely you will find it on your network.
42 static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };
44 #if defined(CONFIG_MBX)
46 /* The MBX hands us a pretty much ready to go board descriptor. This
47 * is where the idea started in the first place.
50 embed_config(bd_t **bdp)
59 /* Read the first 128 bytes of the EEPROM. There is more,
60 * but this is all we need.
62 iic_read(0xa4, eebuf, 0, 128);
64 /* All we are looking for is the Ethernet MAC address. The
65 * first 8 bytes are 'MOTOROLA', so check for part of that.
66 * Next, the VPD describes a MAC 'packet' as being of type 08
67 * and size 06. So we look for that and the MAC must follow.
68 * If there are more than one, we still only care about the first.
69 * If it's there, assume we have a valid MAC address. If not,
70 * grab our default one.
72 if ((*(uint *)eebuf) == 0x4d4f544f) {
73 while (i < 127 && !(eebuf[i] == 0x08 && eebuf[i + 1] == 0x06))
74 i += eebuf[i + 1] + 2; /* skip this packet */
76 if (i == 127) /* Couldn't find. */
77 mp = (u_char *)def_enet_addr;
82 mp = (u_char *)def_enet_addr;
85 bd->bi_enetaddr[i] = *mp++;
87 /* The boot rom passes these to us in MHz. Linux now expects
90 bd->bi_intfreq *= 1000000;
91 bd->bi_busfreq *= 1000000;
93 /* Stuff a baud rate here as well.
95 bd->bi_baudrate = 9600;
97 #endif /* CONFIG_MBX */
99 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || \
100 defined(CONFIG_RPX8260) || defined(CONFIG_EP405)
101 /* Helper functions for Embedded Planet boards.
103 /* Because I didn't find anything that would do this.......
106 aschex_to_byte(u_char *cp)
112 if ((c >= 'A') && (c <= 'F')) {
115 } else if ((c >= 'a') && (c <= 'f')) {
125 if ((c >= 'A') && (c <= 'F')) {
128 } else if ((c >= 'a') && (c <= 'f')) {
140 rpx_eth(bd_t *bd, u_char *cp)
144 for (i=0; i<6; i++) {
145 bd->bi_enetaddr[i] = aschex_to_byte(cp);
150 #ifdef CONFIG_RPX8260
152 rpx_baseten(u_char *cp)
158 while (*cp != '\n') {
160 retval += (*cp) - '0';
167 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
169 rpx_brate(bd_t *bd, u_char *cp)
175 while (*cp != '\n') {
181 bd->bi_baudrate = rate * 100;
185 rpx_cpuspeed(bd_t *bd, u_char *cp)
191 while (*cp != '\n') {
202 /* I don't know why the RPX just can't state the actual
209 bd->bi_intfreq = bd->bi_busfreq = num * 1000000;
211 /* The 8xx can only run a maximum 50 MHz bus speed (until
212 * Motorola changes this :-). Greater than 50 MHz parts
213 * run internal/2 for bus speed.
220 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || defined(CONFIG_EP405)
222 rpx_memsize(bd_t *bd, u_char *cp)
228 while (*cp != '\n') {
234 bd->bi_memsize = size * 1024 * 1024;
236 #endif /* LITE || CLASSIC || EP405 */
237 #if defined(CONFIG_EP405)
239 rpx_nvramsize(bd_t *bd, u_char *cp)
245 while (*cp != '\n') {
251 bd->bi_nvramsize = size * 1024;
253 #endif /* CONFIG_EP405 */
255 #endif /* Embedded Planet boards */
257 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
259 /* Read the EEPROM on the RPX-Lite board.
262 embed_config(bd_t **bdp)
264 u_char eebuf[256], *cp;
267 /* Read the first 256 bytes of the EEPROM. I think this
268 * is really all there is, and I hope if it gets bigger the
269 * info we want is still up front.
275 iic_read(0xa8, eebuf, 0, 128);
276 iic_read(0xa8, &eebuf[128], 128, 128);
278 /* We look for two things, the Ethernet address and the
279 * serial baud rate. The records are separated by
309 rpx_cpuspeed(bd, cp);
313 /* Scan to the end of the record.
315 while ((*cp != '\n') && (*cp != 0xff))
318 /* If the next character is a 0 or ff, we are done.
321 if ((*cp == 0) || (*cp == 0xff))
326 /* For boards without initialized EEPROM.
329 bd->bi_memsize = (8 * 1024 * 1024);
330 bd->bi_intfreq = 48000000;
331 bd->bi_busfreq = 48000000;
332 bd->bi_baudrate = 9600;
335 #endif /* RPXLITE || RPXCLASSIC */
338 /* Build a board information structure for the BSE ip-Engine.
339 * There is more to come since we will add some environment
340 * variables and a function to read them.
343 embed_config(bd_t **bdp)
352 /* Baud rate and processor speed will eventually come
353 * from the environment variables.
355 bd->bi_baudrate = 9600;
357 /* Get the Ethernet station address from the Flash ROM.
359 cp = (u_char *)0xfe003ffa;
360 for (i=0; i<6; i++) {
361 bd->bi_enetaddr[i] = *cp++;
364 /* The rest of this should come from the environment as well.
367 bd->bi_memsize = (16 * 1024 * 1024);
368 bd->bi_intfreq = 48000000;
369 bd->bi_busfreq = 48000000;
374 /* Build a board information structure for the FADS.
377 embed_config(bd_t **bdp)
386 /* Just fill in some known values.
388 bd->bi_baudrate = 9600;
392 cp = (u_char *)def_enet_addr;
393 for (i=0; i<6; i++) {
394 bd->bi_enetaddr[i] = *cp++;
398 bd->bi_memsize = (8 * 1024 * 1024);
399 bd->bi_intfreq = 40000000;
400 bd->bi_busfreq = 40000000;
405 /* Compute 8260 clock values if the rom doesn't provide them.
407 static unsigned char bus2core_8260[] = {
408 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
409 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2,
410 6, 5, 13, 2, 14, 4, 15, 2, 3, 11, 8, 10, 16, 12, 7, 2,
416 uint scmr, vco_out, clkin;
417 uint plldf, pllmf, corecnf;
418 volatile cpm2_map_t *ip;
420 ip = (cpm2_map_t *)CPM_MAP_ADDR;
421 scmr = ip->im_clkrst.car_scmr;
423 /* The clkin is always bus frequency.
425 clkin = bd->bi_busfreq;
427 /* Collect the bits from the scmr.
429 plldf = (scmr >> 12) & 1;
430 pllmf = scmr & 0xfff;
431 corecnf = (scmr >> 24) &0x1f;
433 /* This is arithmetic from the 8260 manual.
435 vco_out = clkin / (plldf + 1);
436 vco_out *= 2 * (pllmf + 1);
437 bd->bi_vco = vco_out; /* Save for later */
439 bd->bi_cpmfreq = vco_out / 2; /* CPM Freq, in MHz */
440 bd->bi_intfreq = bd->bi_busfreq * bus2core_8260[corecnf] / 2;
442 /* Set Baud rate divisor. The power up default is divide by 16,
443 * but we set it again here in case it was changed.
445 ip->im_clkrst.car_sccr = 1; /* DIV 16 BRG */
446 bd->bi_brgfreq = vco_out / 16;
449 static unsigned char bus2core_8280[] = {
450 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
451 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2,
452 6, 5, 13, 2, 14, 2, 15, 2, 3, 2, 2, 2, 16, 2, 2, 2,
458 uint scmr, main_clk, clkin;
460 volatile cpm2_map_t *ip;
462 ip = (cpm2_map_t *)CPM_MAP_ADDR;
463 scmr = ip->im_clkrst.car_scmr;
465 /* The clkin is always bus frequency.
467 clkin = bd->bi_busfreq;
469 /* Collect the bits from the scmr.
472 corecnf = (scmr >> 24) & 0x1f;
474 /* This is arithmetic from the 8280 manual.
476 main_clk = clkin * (pllmf + 1);
478 bd->bi_cpmfreq = main_clk / 2; /* CPM Freq, in MHz */
479 bd->bi_intfreq = bd->bi_busfreq * bus2core_8280[corecnf] / 2;
481 /* Set Baud rate divisor. The power up default is divide by 16,
482 * but we set it again here in case it was changed.
484 ip->im_clkrst.car_sccr = (ip->im_clkrst.car_sccr & 0x3) | 0x1;
485 bd->bi_brgfreq = main_clk / 16;
489 #ifdef CONFIG_SBC82xx
491 embed_config(bd_t **bdp)
502 bd->bi_baudrate = 9600;
503 bd->bi_memsize = 256 * 1024 * 1024; /* just a guess */
505 cp = (void*)SBC82xx_MACADDR_NVRAM_SCC1;
506 memcpy(bd->bi_enetaddr, cp, 6);
508 /* can busfreq be calculated? */
509 pvr = mfspr(SPRN_PVR);
510 if ((pvr & 0xffff0000) == 0x80820000) {
511 bd->bi_busfreq = 100000000;
514 bd->bi_busfreq = 66000000;
521 #if defined(CONFIG_EST8260) || defined(CONFIG_TQM8260)
523 embed_config(bd_t **bdp)
531 /* This is actually provided by my boot rom. I have it
532 * here for those people that may load the kernel with
533 * a JTAG/COP tool and not the rom monitor.
535 bd->bi_baudrate = 115200;
536 bd->bi_intfreq = 200000000;
537 bd->bi_busfreq = 66666666;
538 bd->bi_cpmfreq = 66666666;
539 bd->bi_brgfreq = 33333333;
540 bd->bi_memsize = 16 * 1024 * 1024;
542 /* The boot rom passes these to us in MHz. Linux now expects
545 bd->bi_intfreq *= 1000000;
546 bd->bi_busfreq *= 1000000;
547 bd->bi_cpmfreq *= 1000000;
548 bd->bi_brgfreq *= 1000000;
551 cp = (u_char *)def_enet_addr;
552 for (i=0; i<6; i++) {
553 bd->bi_enetaddr[i] = *cp++;
558 #ifdef CONFIG_SBS8260
560 embed_config(bd_t **bdp)
566 /* This should provided by the boot rom.
570 bd->bi_baudrate = 9600;
571 bd->bi_memsize = 64 * 1024 * 1024;
573 /* Set all of the clocks. We have to know the speed of the
574 * external clock. The development board had 66 MHz.
576 bd->bi_busfreq = 66666666;
579 /* I don't know how to compute this yet.
581 bd->bi_intfreq = 133000000;
584 cp = (u_char *)def_enet_addr;
585 for (i=0; i<6; i++) {
586 bd->bi_enetaddr[i] = *cp++;
591 #ifdef CONFIG_RPX8260
593 embed_config(bd_t **bdp)
595 u_char *cp, *keyvals;
599 keyvals = (u_char *)*bdp;
604 /* This is almost identical to the RPX-Lite/Classic functions
605 * on the 8xx boards. It would be nice to have a key lookup
606 * function in a string, but the format of all of the fields
607 * is slightly different.
622 bd->bi_baudrate = rpx_baseten(cp);
629 bd->bi_memsize = rpx_baseten(cp) * 1024 * 1024;
636 bd->bi_busfreq = rpx_baseten(cp);
643 bd->bi_nvsize = rpx_baseten(cp) * 1024 * 1024;
647 /* Scan to the end of the record.
649 while ((*cp != '\n') && (*cp != 0xff))
652 /* If the next character is a 0 or ff, we are done.
655 if ((*cp == 0) || (*cp == 0xff))
660 /* The memory size includes both the 60x and local bus DRAM.
661 * I don't want to use the local bus DRAM for real memory,
662 * so subtract it out. It would be nice if they were separate
665 bd->bi_memsize -= 32 * 1024 * 1024;
667 /* Set all of the clocks. We have to know the speed of the
672 /* I don't know how to compute this yet.
674 bd->bi_intfreq = 200000000;
676 #endif /* RPX6 for testing */
678 #ifdef CONFIG_ADS8260
680 embed_config(bd_t **bdp)
686 /* This should provided by the boot rom.
690 bd->bi_baudrate = 9600;
691 bd->bi_memsize = 16 * 1024 * 1024;
693 /* Set all of the clocks. We have to know the speed of the
694 * external clock. The development board had 66 MHz.
696 bd->bi_busfreq = 66666666;
699 /* I don't know how to compute this yet.
701 bd->bi_intfreq = 200000000;
704 cp = (u_char *)def_enet_addr;
705 for (i=0; i<6; i++) {
706 bd->bi_enetaddr[i] = *cp++;
713 embed_config(bd_t **bdp)
719 /* Willow has Open Firmware....I should learn how to get this
720 * information from it.
724 bd->bi_baudrate = 9600;
725 bd->bi_memsize = 32 * 1024 * 1024;
727 /* Set all of the clocks. We have to know the speed of the
728 * external clock. The development board had 66 MHz.
730 bd->bi_busfreq = 66666666;
733 /* I don't know how to compute this yet.
735 bd->bi_intfreq = 200000000;
738 cp = (u_char *)def_enet_addr;
739 for (i=0; i<6; i++) {
740 bd->bi_enetaddr[i] = *cp++;
745 #ifdef CONFIG_XILINX_ML300
747 embed_config(bd_t ** bdp)
749 static const unsigned long line_size = 32;
750 static const unsigned long congruence_classes = 256;
756 * Invalidate the data cache if the data cache is turned off.
757 * - The 405 core does not invalidate the data cache on power-up
758 * or reset but does turn off the data cache. We cannot assume
759 * that the cache contents are valid.
760 * - If the data cache is turned on this must have been done by
761 * a bootloader and we assume that the cache contents are
764 __asm__("mfdccr %0": "=r" (dccr));
767 addr < (congruence_classes * line_size);
769 __asm__("dccci 0,%0": :"b"(addr));
775 bd->bi_memsize = XPAR_DDR_0_SIZE;
776 bd->bi_intfreq = XPAR_CORE_CLOCK_FREQ_HZ;
777 bd->bi_busfreq = XPAR_PLB_CLOCK_FREQ_HZ;
778 bd->bi_pci_busfreq = XPAR_PCI_0_CLOCK_FREQ_HZ;
779 timebase_period_ns = 1000000000 / bd->bi_tbfreq;
780 /* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */
782 #endif /* CONFIG_XILINX_ML300 */
784 #ifdef CONFIG_IBM_OPENBIOS
785 /* This could possibly work for all treeboot roms.
787 #if defined(CONFIG_BUBINGA)
788 #define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */
790 #define BOARD_INFO_VECTOR 0xFFFE0B50
794 embed_config(bd_t **bdp)
798 bd_t *bd, *treeboot_bd;
799 bd_t *(*get_board_info)(void) =
800 (bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR);
801 #if !defined(CONFIG_STB03xxx)
803 /* shut down the Ethernet controller that the boot rom
804 * sometimes leaves running.
806 mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */
807 while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
808 out_be32((volatile u32*)EMAC0_BASE,0x20000000); /* then reset EMAC */
813 if ((treeboot_bd = get_board_info()) != NULL) {
814 memcpy(bd, treeboot_bd, sizeof(bd_t));
817 /* Hmmm...better try to stuff some defaults.
819 bd->bi_memsize = 16 * 1024 * 1024;
820 cp = (u_char *)def_enet_addr;
821 for (i=0; i<6; i++) {
822 /* I should probably put different ones here,
823 * hopefully only one is used.
825 bd->BD_EMAC_ADDR(0,i) = *cp;
828 bd->bi_pci_enetaddr[i] = *cp++;
831 bd->bi_tbfreq = 200 * 1000 * 1000;
832 bd->bi_intfreq = 200000000;
833 bd->bi_busfreq = 100000000;
835 bd->bi_pci_busfreq = 66666666;
838 /* Yeah, this look weird, but on Redwood 4 they are
839 * different object in the structure. Sincr Redwwood 5
840 * and Redwood 6 use OpenBIOS, it requires a special value.
842 #if defined(CONFIG_REDWOOD_5) || defined (CONFIG_REDWOOD_6)
843 bd->bi_tbfreq = 27 * 1000 * 1000;
845 timebase_period_ns = 1000000000 / bd->bi_tbfreq;
847 #endif /* CONFIG_IBM_OPENBIOS */
850 #include <linux/serial_reg.h>
853 embed_config(bd_t **bdp)
859 /* Different versions of the PlanetCore firmware vary in how
860 they set up the serial port - in particular whether they
861 use the internal or external serial clock for UART0. Make
862 sure the UART is in a known state. */
863 /* FIXME: We should use the board's 11.0592MHz external serial
864 clock - it will be more accurate for serial rates. For
865 now, however the baud rates in ep405.h are for the internal
867 chcr0 = mfdcr(DCRN_CHCR0);
868 if ( (chcr0 & 0x1fff) != 0x103e ) {
869 mtdcr(DCRN_CHCR0, (chcr0 & 0xffffe000) | 0x103e);
870 /* The following tricks serial_init() into resetting the baud rate */
871 writeb(0, UART0_IO_BASE + UART_LCR);
874 /* We haven't seen actual problems with the EP405 leaving the
875 * EMAC running (as we have on Walnut). But the registers
876 * suggest it may not be left completely quiescent. Reset it
877 * just to be sure. */
878 mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */
879 while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
880 out_be32((unsigned *)EMAC0_BASE,0x20000000); /* then reset EMAC */
885 cp = (u_char *)0xF0000EE0;
907 rpx_nvramsize(bd, cp);
910 while ((*cp != '\n') && (*cp != 0xff))
914 if ((*cp == 0) || (*cp == 0xff))
917 bd->bi_intfreq = 200000000;
918 bd->bi_busfreq = 100000000;
919 bd->bi_pci_busfreq= 33000000 ;
922 bd->bi_memsize = 64000000;
923 bd->bi_intfreq = 200000000;
924 bd->bi_busfreq = 100000000;
925 bd->bi_pci_busfreq= 33000000 ;