4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6 * 2006 (c) MontaVista Software, Inc.
7 * Vitaly Bordug <vbordug@ru.mvista.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/stddef.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/errno.h>
19 #include <linux/major.h>
20 #include <linux/delay.h>
21 #include <linux/irq.h>
22 #include <linux/module.h>
23 #include <linux/device.h>
24 #include <linux/platform_device.h>
25 #include <linux/of_platform.h>
26 #include <linux/phy.h>
27 #include <linux/phy_fixed.h>
28 #include <linux/spi/spi.h>
29 #include <linux/fsl_devices.h>
30 #include <linux/fs_enet_pd.h>
31 #include <linux/fs_uart_pd.h>
33 #include <asm/system.h>
34 #include <asm/atomic.h>
39 #include <sysdev/fsl_soc.h>
40 #include <mm/mmu_decl.h>
43 extern void init_fcc_ioports(struct fs_platform_info*);
44 extern void init_fec_ioports(struct fs_platform_info*);
45 extern void init_smc_ioports(struct fs_uart_platform_info*);
46 static phys_addr_t immrbase = -1;
48 phys_addr_t get_immrbase(void)
50 struct device_node *soc;
55 soc = of_find_node_by_type(NULL, "soc");
59 const u32 *prop = of_get_property(soc, "#address-cells", &size);
61 if (prop && size == 4)
66 prop = of_get_property(soc, "ranges", &size);
68 immrbase = of_translate_address(soc, prop + naddr);
76 EXPORT_SYMBOL(get_immrbase);
78 static u32 sysfreq = -1;
80 u32 fsl_get_sys_freq(void)
82 struct device_node *soc;
89 soc = of_find_node_by_type(NULL, "soc");
93 prop = of_get_property(soc, "clock-frequency", &size);
94 if (!prop || size != sizeof(*prop) || *prop == 0)
95 prop = of_get_property(soc, "bus-frequency", &size);
97 if (prop && size == sizeof(*prop))
103 EXPORT_SYMBOL(fsl_get_sys_freq);
105 #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
107 static u32 brgfreq = -1;
109 u32 get_brgfreq(void)
111 struct device_node *node;
112 const unsigned int *prop;
118 node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
120 prop = of_get_property(node, "clock-frequency", &size);
121 if (prop && size == 4)
128 /* Legacy device binding -- will go away when no users are left. */
129 node = of_find_node_by_type(NULL, "cpm");
131 node = of_find_compatible_node(NULL, NULL, "fsl,qe");
133 node = of_find_node_by_type(NULL, "qe");
136 prop = of_get_property(node, "brg-frequency", &size);
137 if (prop && size == 4)
140 if (brgfreq == -1 || brgfreq == 0) {
141 prop = of_get_property(node, "bus-frequency", &size);
142 if (prop && size == 4)
151 EXPORT_SYMBOL(get_brgfreq);
153 static u32 fs_baudrate = -1;
155 u32 get_baudrate(void)
157 struct device_node *node;
159 if (fs_baudrate != -1)
162 node = of_find_node_by_type(NULL, "serial");
165 const unsigned int *prop = of_get_property(node,
166 "current-speed", &size);
176 EXPORT_SYMBOL(get_baudrate);
177 #endif /* CONFIG_CPM2 */
179 #ifdef CONFIG_FIXED_PHY
180 static int __init of_add_fixed_phys(void)
183 struct device_node *np;
185 struct fixed_phy_status status = {};
187 for_each_node_by_name(np, "ethernet") {
188 fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
193 status.duplex = fixed_link[1];
194 status.speed = fixed_link[2];
195 status.pause = fixed_link[3];
196 status.asym_pause = fixed_link[4];
198 ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
207 arch_initcall(of_add_fixed_phys);
208 #endif /* CONFIG_FIXED_PHY */
210 static int __init gfar_mdio_of_init(void)
212 struct device_node *np = NULL;
213 struct platform_device *mdio_dev;
217 np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio");
219 /* try the deprecated version */
221 np = of_find_compatible_node(np, "mdio", "gianfar");
225 struct device_node *child = NULL;
226 struct gianfar_mdio_data mdio_data;
228 memset(&res, 0, sizeof(res));
229 memset(&mdio_data, 0, sizeof(mdio_data));
231 ret = of_address_to_resource(np, 0, &res);
236 platform_device_register_simple("fsl-gianfar_mdio",
238 if (IS_ERR(mdio_dev)) {
239 ret = PTR_ERR(mdio_dev);
243 for (k = 0; k < 32; k++)
244 mdio_data.irq[k] = PHY_POLL;
246 while ((child = of_get_next_child(np, child)) != NULL) {
247 int irq = irq_of_parse_and_map(child, 0);
249 const u32 *id = of_get_property(child,
251 mdio_data.irq[*id] = irq;
256 platform_device_add_data(mdio_dev, &mdio_data,
257 sizeof(struct gianfar_mdio_data));
266 platform_device_unregister(mdio_dev);
272 arch_initcall(gfar_mdio_of_init);
274 static const char *gfar_tx_intr = "tx";
275 static const char *gfar_rx_intr = "rx";
276 static const char *gfar_err_intr = "error";
278 static int __init gfar_of_init(void)
280 struct device_node *np;
282 struct platform_device *gfar_dev;
286 for (np = NULL, i = 0;
287 (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
289 struct resource r[4];
290 struct device_node *phy, *mdio;
291 struct gianfar_platform_data gfar_data;
292 const unsigned int *id;
295 const void *mac_addr;
299 memset(r, 0, sizeof(r));
300 memset(&gfar_data, 0, sizeof(gfar_data));
302 ret = of_address_to_resource(np, 0, &r[0]);
306 of_irq_to_resource(np, 0, &r[1]);
308 model = of_get_property(np, "model", NULL);
310 /* If we aren't the FEC we have multiple interrupts */
311 if (model && strcasecmp(model, "FEC")) {
312 r[1].name = gfar_tx_intr;
314 r[2].name = gfar_rx_intr;
315 of_irq_to_resource(np, 1, &r[2]);
317 r[3].name = gfar_err_intr;
318 of_irq_to_resource(np, 2, &r[3]);
324 platform_device_register_simple("fsl-gianfar", i, &r[0],
327 if (IS_ERR(gfar_dev)) {
328 ret = PTR_ERR(gfar_dev);
332 mac_addr = of_get_mac_address(np);
334 memcpy(gfar_data.mac_addr, mac_addr, 6);
336 if (model && !strcasecmp(model, "TSEC"))
337 gfar_data.device_flags =
338 FSL_GIANFAR_DEV_HAS_GIGABIT |
339 FSL_GIANFAR_DEV_HAS_COALESCE |
340 FSL_GIANFAR_DEV_HAS_RMON |
341 FSL_GIANFAR_DEV_HAS_MULTI_INTR;
342 if (model && !strcasecmp(model, "eTSEC"))
343 gfar_data.device_flags =
344 FSL_GIANFAR_DEV_HAS_GIGABIT |
345 FSL_GIANFAR_DEV_HAS_COALESCE |
346 FSL_GIANFAR_DEV_HAS_RMON |
347 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
348 FSL_GIANFAR_DEV_HAS_CSUM |
349 FSL_GIANFAR_DEV_HAS_VLAN |
350 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
352 ctype = of_get_property(np, "phy-connection-type", NULL);
354 /* We only care about rgmii-id. The rest are autodetected */
355 if (ctype && !strcmp(ctype, "rgmii-id"))
356 gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
358 gfar_data.interface = PHY_INTERFACE_MODE_MII;
360 ph = of_get_property(np, "phy-handle", NULL);
364 fixed_link = (u32 *)of_get_property(np, "fixed-link",
371 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0");
372 gfar_data.phy_id = fixed_link[0];
374 phy = of_find_node_by_phandle(*ph);
381 mdio = of_get_parent(phy);
383 id = of_get_property(phy, "reg", NULL);
384 ret = of_address_to_resource(mdio, 0, &res);
391 gfar_data.phy_id = *id;
392 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx",
393 (unsigned long long)res.start);
400 platform_device_add_data(gfar_dev, &gfar_data,
402 gianfar_platform_data));
410 platform_device_unregister(gfar_dev);
415 arch_initcall(gfar_of_init);
417 #ifdef CONFIG_I2C_BOARDINFO
418 #include <linux/i2c.h>
419 struct i2c_driver_device {
424 static struct i2c_driver_device i2c_devices[] __initdata = {
425 {"ricoh,rs5c372a", "rs5c372a"},
426 {"ricoh,rs5c372b", "rs5c372b"},
427 {"ricoh,rv5c386", "rv5c386"},
428 {"ricoh,rv5c387a", "rv5c387a"},
429 {"dallas,ds1307", "ds1307"},
430 {"dallas,ds1337", "ds1337"},
431 {"dallas,ds1338", "ds1338"},
432 {"dallas,ds1339", "ds1339"},
433 {"dallas,ds1340", "ds1340"},
434 {"stm,m41t00", "m41t00"},
435 {"dallas,ds1374", "ds1374"},
436 {"cirrus,cs4270", "cs4270"},
439 static int __init of_find_i2c_driver(struct device_node *node,
440 struct i2c_board_info *info)
444 for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
445 if (!of_device_is_compatible(node, i2c_devices[i].of_device))
447 if (strlcpy(info->type, i2c_devices[i].i2c_type,
448 I2C_NAME_SIZE) >= I2C_NAME_SIZE)
453 pr_warning("fsl_soc.c: unrecognized i2c node %s\n",
454 (const char *) of_get_property(node, "compatible", NULL));
459 static void __init of_register_i2c_devices(struct device_node *adap_node,
462 struct device_node *node = NULL;
464 while ((node = of_get_next_child(adap_node, node))) {
465 struct i2c_board_info info = {};
469 addr = of_get_property(node, "reg", &len);
470 if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) {
471 printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n");
475 info.irq = irq_of_parse_and_map(node, 0);
476 if (info.irq == NO_IRQ)
479 if (of_find_i2c_driver(node, &info) < 0)
484 i2c_register_board_info(bus_num, &info, 1);
488 static int __init fsl_i2c_of_init(void)
490 struct device_node *np;
492 struct platform_device *i2c_dev;
495 for_each_compatible_node(np, NULL, "fsl-i2c") {
496 struct resource r[2];
497 struct fsl_i2c_platform_data i2c_data;
498 const unsigned char *flags = NULL;
502 memset(&r, 0, sizeof(r));
503 memset(&i2c_data, 0, sizeof(i2c_data));
505 ret = of_address_to_resource(np, 0, &r[0]);
509 of_irq_to_resource(np, 0, &r[1]);
511 iprop = of_get_property(np, "cell-index", NULL);
512 idx = iprop ? *iprop : i;
514 i2c_dev = platform_device_register_simple("fsl-i2c", idx, r, 2);
515 if (IS_ERR(i2c_dev)) {
516 ret = PTR_ERR(i2c_dev);
520 i2c_data.device_flags = 0;
521 flags = of_get_property(np, "dfsrr", NULL);
523 i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
525 flags = of_get_property(np, "fsl5200-clocking", NULL);
527 i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
530 platform_device_add_data(i2c_dev, &i2c_data,
532 fsl_i2c_platform_data));
536 of_register_i2c_devices(np, idx);
543 platform_device_unregister(i2c_dev);
548 arch_initcall(fsl_i2c_of_init);
551 #ifdef CONFIG_PPC_83xx
552 static int __init mpc83xx_wdt_init(void)
555 struct device_node *np;
556 struct platform_device *dev;
557 u32 freq = fsl_get_sys_freq();
560 np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
567 memset(&r, 0, sizeof(r));
569 ret = of_address_to_resource(np, 0, &r);
573 dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
579 ret = platform_device_add_data(dev, &freq, sizeof(freq));
587 platform_device_unregister(dev);
594 arch_initcall(mpc83xx_wdt_init);
597 static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
600 return FSL_USB2_PHY_NONE;
601 if (!strcasecmp(phy_type, "ulpi"))
602 return FSL_USB2_PHY_ULPI;
603 if (!strcasecmp(phy_type, "utmi"))
604 return FSL_USB2_PHY_UTMI;
605 if (!strcasecmp(phy_type, "utmi_wide"))
606 return FSL_USB2_PHY_UTMI_WIDE;
607 if (!strcasecmp(phy_type, "serial"))
608 return FSL_USB2_PHY_SERIAL;
610 return FSL_USB2_PHY_NONE;
613 static int __init fsl_usb_of_init(void)
615 struct device_node *np;
617 struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
618 *usb_dev_dr_client = NULL;
621 for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
622 struct resource r[2];
623 struct fsl_usb2_platform_data usb_data;
624 const unsigned char *prop = NULL;
626 memset(&r, 0, sizeof(r));
627 memset(&usb_data, 0, sizeof(usb_data));
629 ret = of_address_to_resource(np, 0, &r[0]);
633 of_irq_to_resource(np, 0, &r[1]);
636 platform_device_register_simple("fsl-ehci", i, r, 2);
637 if (IS_ERR(usb_dev_mph)) {
638 ret = PTR_ERR(usb_dev_mph);
642 usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
643 usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
645 usb_data.operating_mode = FSL_USB2_MPH_HOST;
647 prop = of_get_property(np, "port0", NULL);
649 usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
651 prop = of_get_property(np, "port1", NULL);
653 usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
655 prop = of_get_property(np, "phy_type", NULL);
656 usb_data.phy_mode = determine_usb_phy(prop);
659 platform_device_add_data(usb_dev_mph, &usb_data,
661 fsl_usb2_platform_data));
667 for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
668 struct resource r[2];
669 struct fsl_usb2_platform_data usb_data;
670 const unsigned char *prop = NULL;
672 memset(&r, 0, sizeof(r));
673 memset(&usb_data, 0, sizeof(usb_data));
675 ret = of_address_to_resource(np, 0, &r[0]);
679 of_irq_to_resource(np, 0, &r[1]);
681 prop = of_get_property(np, "dr_mode", NULL);
683 if (!prop || !strcmp(prop, "host")) {
684 usb_data.operating_mode = FSL_USB2_DR_HOST;
685 usb_dev_dr_host = platform_device_register_simple(
686 "fsl-ehci", i, r, 2);
687 if (IS_ERR(usb_dev_dr_host)) {
688 ret = PTR_ERR(usb_dev_dr_host);
691 } else if (prop && !strcmp(prop, "peripheral")) {
692 usb_data.operating_mode = FSL_USB2_DR_DEVICE;
693 usb_dev_dr_client = platform_device_register_simple(
694 "fsl-usb2-udc", i, r, 2);
695 if (IS_ERR(usb_dev_dr_client)) {
696 ret = PTR_ERR(usb_dev_dr_client);
699 } else if (prop && !strcmp(prop, "otg")) {
700 usb_data.operating_mode = FSL_USB2_DR_OTG;
701 usb_dev_dr_host = platform_device_register_simple(
702 "fsl-ehci", i, r, 2);
703 if (IS_ERR(usb_dev_dr_host)) {
704 ret = PTR_ERR(usb_dev_dr_host);
707 usb_dev_dr_client = platform_device_register_simple(
708 "fsl-usb2-udc", i, r, 2);
709 if (IS_ERR(usb_dev_dr_client)) {
710 ret = PTR_ERR(usb_dev_dr_client);
718 prop = of_get_property(np, "phy_type", NULL);
719 usb_data.phy_mode = determine_usb_phy(prop);
721 if (usb_dev_dr_host) {
722 usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
723 usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
724 dev.coherent_dma_mask;
725 if ((ret = platform_device_add_data(usb_dev_dr_host,
726 &usb_data, sizeof(struct
727 fsl_usb2_platform_data))))
730 if (usb_dev_dr_client) {
731 usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
732 usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
733 dev.coherent_dma_mask;
734 if ((ret = platform_device_add_data(usb_dev_dr_client,
735 &usb_data, sizeof(struct
736 fsl_usb2_platform_data))))
745 platform_device_unregister(usb_dev_dr_host);
746 if (usb_dev_dr_client)
747 platform_device_unregister(usb_dev_dr_client);
750 platform_device_unregister(usb_dev_mph);
755 arch_initcall(fsl_usb_of_init);
757 static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
758 struct spi_board_info *board_infos,
759 unsigned int num_board_infos,
760 void (*activate_cs)(u8 cs, u8 polarity),
761 void (*deactivate_cs)(u8 cs, u8 polarity))
763 struct device_node *np;
766 for_each_compatible_node(np, type, compatible) {
770 struct resource res[2];
771 struct platform_device *pdev;
772 struct fsl_spi_platform_data pdata = {
773 .activate_cs = activate_cs,
774 .deactivate_cs = deactivate_cs,
777 memset(res, 0, sizeof(res));
779 pdata.sysclk = sysclk;
781 prop = of_get_property(np, "reg", NULL);
784 pdata.bus_num = *(u32 *)prop;
786 prop = of_get_property(np, "cell-index", NULL);
790 prop = of_get_property(np, "mode", NULL);
791 if (prop && !strcmp(prop, "cpu-qe"))
794 for (j = 0; j < num_board_infos; j++) {
795 if (board_infos[j].bus_num == pdata.bus_num)
796 pdata.max_chipselect++;
799 if (!pdata.max_chipselect)
802 ret = of_address_to_resource(np, 0, &res[0]);
806 ret = of_irq_to_resource(np, 0, &res[1]);
810 pdev = platform_device_alloc("mpc83xx_spi", i);
814 ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
818 ret = platform_device_add_resources(pdev, res,
823 ret = platform_device_add(pdev);
829 platform_device_del(pdev);
831 pr_err("%s: registration failed\n", np->full_name);
839 int __init fsl_spi_init(struct spi_board_info *board_infos,
840 unsigned int num_board_infos,
841 void (*activate_cs)(u8 cs, u8 polarity),
842 void (*deactivate_cs)(u8 cs, u8 polarity))
847 #ifdef CONFIG_QUICC_ENGINE
848 /* SPI controller is either clocked from QE or SoC clock */
849 sysclk = get_brgfreq();
852 sysclk = fsl_get_sys_freq();
857 ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
858 num_board_infos, activate_cs, deactivate_cs);
860 of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
861 num_board_infos, activate_cs, deactivate_cs);
863 return spi_register_board_info(board_infos, num_board_infos);
866 #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
867 static __be32 __iomem *rstcr;
869 static int __init setup_rstcr(void)
871 struct device_node *np;
872 np = of_find_node_by_name(NULL, "global-utilities");
873 if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
874 const u32 *prop = of_get_property(np, "reg", NULL);
876 /* map reset control register
877 * 0xE00B0 is offset of reset control register
879 rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
881 printk (KERN_EMERG "Error: reset control "
882 "register not mapped!\n");
885 printk (KERN_INFO "rstcr compatible register does not exist!\n");
891 arch_initcall(setup_rstcr);
893 void fsl_rstcr_restart(char *cmd)
897 /* set reset control register */
898 out_be32(rstcr, 0x2); /* HRESET_REQ */
904 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
905 struct platform_diu_data_ops diu_ops = {
906 .diu_size = 1280 * 1024 * 4, /* default one 1280x1024 buffer */
908 EXPORT_SYMBOL(diu_ops);
910 int __init preallocate_diu_videomemory(void)
912 pr_debug("diu_size=%lu\n", diu_ops.diu_size);
914 diu_ops.diu_mem = __alloc_bootmem(diu_ops.diu_size, 8, 0);
915 if (!diu_ops.diu_mem) {
916 printk(KERN_ERR "fsl-diu: cannot allocate %lu bytes\n",
921 pr_debug("diu_mem=%p\n", diu_ops.diu_mem);
923 rh_init(&diu_ops.diu_rh_info, 4096, ARRAY_SIZE(diu_ops.diu_rh_block),
924 diu_ops.diu_rh_block);
925 return rh_attach_region(&diu_ops.diu_rh_info,
926 (unsigned long) diu_ops.diu_mem,
930 static int __init early_parse_diufb(char *p)
935 diu_ops.diu_size = _ALIGN_UP(memparse(p, &p), 8);
937 pr_debug("diu_size=%lu\n", diu_ops.diu_size);
941 early_param("diufb", early_parse_diufb);