3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/proc_fs.h>
25 #include <linux/rbtree.h>
26 #include <linux/seq_file.h>
27 #include <linux/spinlock.h>
28 #include <asm/atomic.h>
30 #include <asm/eeh_event.h>
32 #include <asm/machdep.h>
33 #include <asm/ppc-pci.h>
39 * EEH, or "Extended Error Handling" is a PCI bridge technology for
40 * dealing with PCI bus errors that can't be dealt with within the
41 * usual PCI framework, except by check-stopping the CPU. Systems
42 * that are designed for high-availability/reliability cannot afford
43 * to crash due to a "mere" PCI error, thus the need for EEH.
44 * An EEH-capable bridge operates by converting a detected error
45 * into a "slot freeze", taking the PCI adapter off-line, making
46 * the slot behave, from the OS'es point of view, as if the slot
47 * were "empty": all reads return 0xff's and all writes are silently
48 * ignored. EEH slot isolation events can be triggered by parity
49 * errors on the address or data busses (e.g. during posted writes),
50 * which in turn might be caused by low voltage on the bus, dust,
51 * vibration, humidity, radioactivity or plain-old failed hardware.
53 * Note, however, that one of the leading causes of EEH slot
54 * freeze events are buggy device drivers, buggy device microcode,
55 * or buggy device hardware. This is because any attempt by the
56 * device to bus-master data to a memory address that is not
57 * assigned to the device will trigger a slot freeze. (The idea
58 * is to prevent devices-gone-wild from corrupting system memory).
59 * Buggy hardware/drivers will have a miserable time co-existing
62 * Ideally, a PCI device driver, when suspecting that an isolation
63 * event has occured (e.g. by reading 0xff's), will then ask EEH
64 * whether this is the case, and then take appropriate steps to
65 * reset the PCI slot, the PCI device, and then resume operations.
66 * However, until that day, the checking is done here, with the
67 * eeh_check_failure() routine embedded in the MMIO macros. If
68 * the slot is found to be isolated, an "EEH Event" is synthesized
69 * and sent out for processing.
72 /* If a device driver keeps reading an MMIO register in an interrupt
73 * handler after a slot isolation event has occurred, we assume it
74 * is broken and panic. This sets the threshold for how many read
75 * attempts we allow before panicking.
77 #define EEH_MAX_FAILS 100000
80 static int ibm_set_eeh_option;
81 static int ibm_set_slot_reset;
82 static int ibm_read_slot_reset_state;
83 static int ibm_read_slot_reset_state2;
84 static int ibm_slot_error_detail;
85 static int ibm_get_config_addr_info;
86 static int ibm_configure_bridge;
88 int eeh_subsystem_enabled;
89 EXPORT_SYMBOL(eeh_subsystem_enabled);
91 /* Lock to avoid races due to multiple reports of an error */
92 static DEFINE_SPINLOCK(confirm_error_lock);
94 /* Buffer for reporting slot-error-detail rtas calls */
95 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
96 static DEFINE_SPINLOCK(slot_errbuf_lock);
97 static int eeh_error_buf_size;
99 /* System monitoring statistics */
100 static unsigned long no_device;
101 static unsigned long no_dn;
102 static unsigned long no_cfg_addr;
103 static unsigned long ignored_check;
104 static unsigned long total_mmio_ffs;
105 static unsigned long false_positives;
106 static unsigned long ignored_failures;
107 static unsigned long slot_resets;
109 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
111 /* --------------------------------------------------------------- */
112 /* Below lies the EEH event infrastructure */
114 void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
120 /* Log the error with the rtas logger */
121 spin_lock_irqsave(&slot_errbuf_lock, flags);
122 memset(slot_errbuf, 0, eeh_error_buf_size);
124 /* Use PE configuration address, if present */
125 config_addr = pdn->eeh_config_addr;
126 if (pdn->eeh_pe_config_addr)
127 config_addr = pdn->eeh_pe_config_addr;
129 rc = rtas_call(ibm_slot_error_detail,
130 8, 1, NULL, config_addr,
131 BUID_HI(pdn->phb->buid),
132 BUID_LO(pdn->phb->buid), NULL, 0,
133 virt_to_phys(slot_errbuf),
138 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
139 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
143 * read_slot_reset_state - Read the reset state of a device node's slot
144 * @dn: device node to read
145 * @rets: array to return results in
147 static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
152 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
153 token = ibm_read_slot_reset_state2;
156 token = ibm_read_slot_reset_state;
157 rets[2] = 0; /* fake PE Unavailable info */
161 /* Use PE configuration address, if present */
162 config_addr = pdn->eeh_config_addr;
163 if (pdn->eeh_pe_config_addr)
164 config_addr = pdn->eeh_pe_config_addr;
166 return rtas_call(token, 3, outputs, rets, config_addr,
167 BUID_HI(pdn->phb->buid), BUID_LO(pdn->phb->buid));
171 * eeh_token_to_phys - convert EEH address token to phys address
172 * @token i/o token, should be address in the form 0xA....
174 static inline unsigned long eeh_token_to_phys(unsigned long token)
179 ptep = find_linux_pte(init_mm.pgd, token);
182 pa = pte_pfn(*ptep) << PAGE_SHIFT;
184 return pa | (token & (PAGE_SIZE-1));
188 * Return the "partitionable endpoint" (pe) under which this device lies
190 struct device_node * find_device_pe(struct device_node *dn)
192 while ((dn->parent) && PCI_DN(dn->parent) &&
193 (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
199 /** Mark all devices that are peers of this device as failed.
200 * Mark the device driver too, so that it can see the failure
201 * immediately; this is critical, since some drivers poll
202 * status registers in interrupts ... If a driver is polling,
203 * and the slot is frozen, then the driver can deadlock in
204 * an interrupt context, which is bad.
207 static void __eeh_mark_slot (struct device_node *dn, int mode_flag)
211 /* Mark the pci device driver too */
212 struct pci_dev *dev = PCI_DN(dn)->pcidev;
214 PCI_DN(dn)->eeh_mode |= mode_flag;
216 if (dev && dev->driver)
217 dev->error_state = pci_channel_io_frozen;
220 __eeh_mark_slot (dn->child, mode_flag);
226 void eeh_mark_slot (struct device_node *dn, int mode_flag)
228 dn = find_device_pe (dn);
230 /* Back up one, since config addrs might be shared */
231 if (PCI_DN(dn) && PCI_DN(dn)->eeh_pe_config_addr)
234 PCI_DN(dn)->eeh_mode |= mode_flag;
235 __eeh_mark_slot (dn->child, mode_flag);
238 static void __eeh_clear_slot (struct device_node *dn, int mode_flag)
242 PCI_DN(dn)->eeh_mode &= ~mode_flag;
243 PCI_DN(dn)->eeh_check_count = 0;
245 __eeh_clear_slot (dn->child, mode_flag);
251 void eeh_clear_slot (struct device_node *dn, int mode_flag)
254 spin_lock_irqsave(&confirm_error_lock, flags);
256 dn = find_device_pe (dn);
258 /* Back up one, since config addrs might be shared */
259 if (PCI_DN(dn) && PCI_DN(dn)->eeh_pe_config_addr)
262 PCI_DN(dn)->eeh_mode &= ~mode_flag;
263 PCI_DN(dn)->eeh_check_count = 0;
264 __eeh_clear_slot (dn->child, mode_flag);
265 spin_unlock_irqrestore(&confirm_error_lock, flags);
269 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
271 * @dev pci device, if known
273 * Check for an EEH failure for the given device node. Call this
274 * routine if the result of a read was all 0xff's and you want to
275 * find out if this is due to an EEH slot freeze. This routine
276 * will query firmware for the EEH status.
278 * Returns 0 if there has not been an EEH error; otherwise returns
279 * a non-zero value and queues up a slot isolation event notification.
281 * It is safe to call this routine in an interrupt context.
283 int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
289 enum pci_channel_state state;
294 if (!eeh_subsystem_enabled)
303 /* Access to IO BARs might get this far and still not want checking. */
304 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
305 pdn->eeh_mode & EEH_MODE_NOCHECK) {
308 printk ("EEH:ignored check (%x) for %s %s\n",
309 pdn->eeh_mode, pci_name (dev), dn->full_name);
314 if (!pdn->eeh_config_addr && !pdn->eeh_pe_config_addr) {
319 /* If we already have a pending isolation event for this
320 * slot, we know it's bad already, we don't need to check.
321 * Do this checking under a lock; as multiple PCI devices
322 * in one slot might report errors simultaneously, and we
323 * only want one error recovery routine running.
325 spin_lock_irqsave(&confirm_error_lock, flags);
327 if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
328 pdn->eeh_check_count ++;
329 if (pdn->eeh_check_count >= EEH_MAX_FAILS) {
330 printk (KERN_ERR "EEH: Device driver ignored %d bad reads, panicing\n",
331 pdn->eeh_check_count);
334 /* re-read the slot reset state */
335 if (read_slot_reset_state(pdn, rets) != 0)
336 rets[0] = -1; /* reset state unknown */
338 /* If we are here, then we hit an infinite loop. Stop. */
339 panic("EEH: MMIO halt (%d) on device:%s\n", rets[0], pci_name(dev));
345 * Now test for an EEH failure. This is VERY expensive.
346 * Note that the eeh_config_addr may be a parent device
347 * in the case of a device behind a bridge, or it may be
348 * function zero of a multi-function device.
349 * In any case they must share a common PHB.
351 ret = read_slot_reset_state(pdn, rets);
353 /* If the call to firmware failed, punt */
355 printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
362 /* If EEH is not supported on this device, punt. */
364 printk(KERN_WARNING "EEH: event on unsupported device, rc=%d dn=%s\n",
371 /* If not the kind of error we know about, punt. */
372 if (rets[0] != 2 && rets[0] != 4 && rets[0] != 5) {
378 /* Note that config-io to empty slots may fail;
379 * we recognize empty because they don't have children. */
380 if ((rets[0] == 5) && (dn->child == NULL)) {
388 /* Avoid repeated reports of this failure, including problems
389 * with other functions on this device, and functions under
391 eeh_mark_slot (dn, EEH_MODE_ISOLATED);
392 spin_unlock_irqrestore(&confirm_error_lock, flags);
394 state = pci_channel_io_normal;
395 if ((rets[0] == 2) || (rets[0] == 4))
396 state = pci_channel_io_frozen;
398 state = pci_channel_io_perm_failure;
399 eeh_send_failure_event (dn, dev, state, rets[2]);
401 /* Most EEH events are due to device driver bugs. Having
402 * a stack trace will help the device-driver authors figure
403 * out what happened. So print that out. */
404 if (rets[0] != 5) dump_stack();
408 spin_unlock_irqrestore(&confirm_error_lock, flags);
412 EXPORT_SYMBOL_GPL(eeh_dn_check_failure);
415 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
416 * @token i/o token, should be address in the form 0xA....
417 * @val value, should be all 1's (XXX why do we need this arg??)
419 * Check for an EEH failure at the given token address. Call this
420 * routine if the result of a read was all 0xff's and you want to
421 * find out if this is due to an EEH slot freeze event. This routine
422 * will query firmware for the EEH status.
424 * Note this routine is safe to call in an interrupt context.
426 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
430 struct device_node *dn;
432 /* Finding the phys addr + pci device; this is pretty quick. */
433 addr = eeh_token_to_phys((unsigned long __force) token);
434 dev = pci_get_device_by_addr(addr);
440 dn = pci_device_to_OF_node(dev);
441 eeh_dn_check_failure (dn, dev);
447 EXPORT_SYMBOL(eeh_check_failure);
449 /* ------------------------------------------------------------- */
450 /* The code below deals with error recovery */
453 * eeh_slot_availability - returns error status of slot
454 * @pdn pci device node
456 * Return negative value if a permanent error, else return
457 * a number of milliseconds to wait until the PCI slot is
461 eeh_slot_availability(struct pci_dn *pdn)
466 rc = read_slot_reset_state(pdn, rets);
470 if (rets[1] == 0) return -1; /* EEH is not supported */
471 if (rets[0] == 0) return 0; /* Oll Korrect */
473 if (rets[2] == 0) return -1; /* permanently unavailable */
474 return rets[2]; /* number of millisecs to wait */
479 printk (KERN_ERR "EEH: Slot unavailable: rc=%d, rets=%d %d %d\n",
480 rc, rets[0], rets[1], rets[2]);
485 * rtas_pci_slot_reset - raises/lowers the pci #RST line
486 * @pdn pci device node
487 * @state: 1/0 to raise/lower the #RST
489 * Clear the EEH-frozen condition on a slot. This routine
490 * asserts the PCI #RST line if the 'state' argument is '1',
491 * and drops the #RST line if 'state is '0'. This routine is
492 * safe to call in an interrupt context.
497 rtas_pci_slot_reset(struct pci_dn *pdn, int state)
505 printk (KERN_WARNING "EEH: in slot reset, device node %s has no phb\n",
506 pdn->node->full_name);
510 /* Use PE configuration address, if present */
511 config_addr = pdn->eeh_config_addr;
512 if (pdn->eeh_pe_config_addr)
513 config_addr = pdn->eeh_pe_config_addr;
515 rc = rtas_call(ibm_set_slot_reset,4,1, NULL,
517 BUID_HI(pdn->phb->buid),
518 BUID_LO(pdn->phb->buid),
521 printk (KERN_WARNING "EEH: Unable to reset the failed slot, (%d) #RST=%d dn=%s\n",
522 rc, state, pdn->node->full_name);
528 * rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
529 * @pdn: pci device node to be reset.
531 * Return 0 if success, else a non-zero value.
535 rtas_set_slot_reset(struct pci_dn *pdn)
539 rtas_pci_slot_reset (pdn, 1);
541 /* The PCI bus requires that the reset be held high for at least
542 * a 100 milliseconds. We wait a bit longer 'just in case'. */
544 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
545 msleep (PCI_BUS_RST_HOLD_TIME_MSEC);
547 /* We might get hit with another EEH freeze as soon as the
548 * pci slot reset line is dropped. Make sure we don't miss
549 * these, and clear the flag now. */
550 eeh_clear_slot (pdn->node, EEH_MODE_ISOLATED);
552 rtas_pci_slot_reset (pdn, 0);
554 /* After a PCI slot has been reset, the PCI Express spec requires
555 * a 1.5 second idle time for the bus to stabilize, before starting
557 #define PCI_BUS_SETTLE_TIME_MSEC 1800
558 msleep (PCI_BUS_SETTLE_TIME_MSEC);
560 /* Now double check with the firmware to make sure the device is
561 * ready to be used; if not, wait for recovery. */
562 for (i=0; i<10; i++) {
563 rc = eeh_slot_availability (pdn);
565 printk (KERN_ERR "EEH: failed (%d) to reset slot %s\n", rc, pdn->node->full_name);
574 rc = eeh_slot_availability (pdn);
576 printk (KERN_ERR "EEH: timeout resetting slot %s\n", pdn->node->full_name);
581 /* ------------------------------------------------------- */
582 /** Save and restore of PCI BARs
584 * Although firmware will set up BARs during boot, it doesn't
585 * set up device BAR's after a device reset, although it will,
586 * if requested, set up bridge configuration. Thus, we need to
587 * configure the PCI devices ourselves.
591 * __restore_bars - Restore the Base Address Registers
592 * @pdn: pci device node
594 * Loads the PCI configuration space base address registers,
595 * the expansion ROM base address, the latency timer, and etc.
596 * from the saved values in the device node.
598 static inline void __restore_bars (struct pci_dn *pdn)
602 if (NULL==pdn->phb) return;
603 for (i=4; i<10; i++) {
604 rtas_write_config(pdn, i*4, 4, pdn->config_space[i]);
607 /* 12 == Expansion ROM Address */
608 rtas_write_config(pdn, 12*4, 4, pdn->config_space[12]);
610 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
611 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
613 rtas_write_config (pdn, PCI_CACHE_LINE_SIZE, 1,
614 SAVED_BYTE(PCI_CACHE_LINE_SIZE));
616 rtas_write_config (pdn, PCI_LATENCY_TIMER, 1,
617 SAVED_BYTE(PCI_LATENCY_TIMER));
619 /* max latency, min grant, interrupt pin and line */
620 rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]);
624 * eeh_restore_bars - restore the PCI config space info
626 * This routine performs a recursive walk to the children
627 * of this device as well.
629 void eeh_restore_bars(struct pci_dn *pdn)
631 struct device_node *dn;
635 if ((pdn->eeh_mode & EEH_MODE_SUPPORTED) && !IS_BRIDGE(pdn->class_code))
636 __restore_bars (pdn);
638 dn = pdn->node->child;
640 eeh_restore_bars (PCI_DN(dn));
646 * eeh_save_bars - save device bars
648 * Save the values of the device bars. Unlike the restore
649 * routine, this routine is *not* recursive. This is because
650 * PCI devices are added individuallly; but, for the restore,
651 * an entire slot is reset at a time.
653 static void eeh_save_bars(struct pci_dn *pdn)
660 for (i = 0; i < 16; i++)
661 rtas_read_config(pdn, i * 4, 4, &pdn->config_space[i]);
665 rtas_configure_bridge(struct pci_dn *pdn)
670 /* Use PE configuration address, if present */
671 config_addr = pdn->eeh_config_addr;
672 if (pdn->eeh_pe_config_addr)
673 config_addr = pdn->eeh_pe_config_addr;
675 rc = rtas_call(ibm_configure_bridge,3,1, NULL,
677 BUID_HI(pdn->phb->buid),
678 BUID_LO(pdn->phb->buid));
680 printk (KERN_WARNING "EEH: Unable to configure device bridge (%d) for %s\n",
681 rc, pdn->node->full_name);
685 /* ------------------------------------------------------------- */
686 /* The code below deals with enabling EEH for devices during the
687 * early boot sequence. EEH must be enabled before any PCI probing
693 struct eeh_early_enable_info {
694 unsigned int buid_hi;
695 unsigned int buid_lo;
698 /* Enable eeh for the given device node. */
699 static void *early_enable_eeh(struct device_node *dn, void *data)
701 struct eeh_early_enable_info *info = data;
703 const char *status = get_property(dn, "status", NULL);
704 const u32 *class_code = get_property(dn, "class-code", NULL);
705 const u32 *vendor_id = get_property(dn, "vendor-id", NULL);
706 const u32 *device_id = get_property(dn, "device-id", NULL);
709 struct pci_dn *pdn = PCI_DN(dn);
713 pdn->eeh_check_count = 0;
714 pdn->eeh_freeze_count = 0;
716 if (status && strcmp(status, "ok") != 0)
717 return NULL; /* ignore devices with bad status */
719 /* Ignore bad nodes. */
720 if (!class_code || !vendor_id || !device_id)
723 /* There is nothing to check on PCI to ISA bridges */
724 if (dn->type && !strcmp(dn->type, "isa")) {
725 pdn->eeh_mode |= EEH_MODE_NOCHECK;
728 pdn->class_code = *class_code;
731 * Now decide if we are going to "Disable" EEH checking
732 * for this device. We still run with the EEH hardware active,
733 * but we won't be checking for ff's. This means a driver
734 * could return bad data (very bad!), an interrupt handler could
735 * hang waiting on status bits that won't change, etc.
736 * But there are a few cases like display devices that make sense.
738 enable = 1; /* i.e. we will do checking */
740 if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
745 pdn->eeh_mode |= EEH_MODE_NOCHECK;
747 /* Ok... see if this device supports EEH. Some do, some don't,
748 * and the only way to find out is to check each and every one. */
749 regs = get_property(dn, "reg", NULL);
751 /* First register entry is addr (00BBSS00) */
752 /* Try to enable eeh */
753 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
754 regs[0], info->buid_hi, info->buid_lo,
758 eeh_subsystem_enabled = 1;
759 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
760 pdn->eeh_config_addr = regs[0];
762 /* If the newer, better, ibm,get-config-addr-info is supported,
763 * then use that instead. */
764 pdn->eeh_pe_config_addr = 0;
765 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
766 unsigned int rets[2];
767 ret = rtas_call (ibm_get_config_addr_info, 4, 2, rets,
768 pdn->eeh_config_addr,
769 info->buid_hi, info->buid_lo,
772 pdn->eeh_pe_config_addr = rets[0];
775 printk(KERN_DEBUG "EEH: %s: eeh enabled, config=%x pe_config=%x\n",
776 dn->full_name, pdn->eeh_config_addr, pdn->eeh_pe_config_addr);
780 /* This device doesn't support EEH, but it may have an
781 * EEH parent, in which case we mark it as supported. */
782 if (dn->parent && PCI_DN(dn->parent)
783 && (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
784 /* Parent supports EEH. */
785 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
786 pdn->eeh_config_addr = PCI_DN(dn->parent)->eeh_config_addr;
791 printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
800 * Initialize EEH by trying to enable it for all of the adapters in the system.
801 * As a side effect we can determine here if eeh is supported at all.
802 * Note that we leave EEH on so failed config cycles won't cause a machine
803 * check. If a user turns off EEH for a particular adapter they are really
804 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
805 * grant access to a slot if EEH isn't enabled, and so we always enable
806 * EEH for all slots/all devices.
808 * The eeh-force-off option disables EEH checking globally, for all slots.
809 * Even if force-off is set, the EEH hardware is still enabled, so that
810 * newer systems can boot.
812 void __init eeh_init(void)
814 struct device_node *phb, *np;
815 struct eeh_early_enable_info info;
817 spin_lock_init(&confirm_error_lock);
818 spin_lock_init(&slot_errbuf_lock);
820 np = of_find_node_by_path("/rtas");
824 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
825 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
826 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
827 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
828 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
829 ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
830 ibm_configure_bridge = rtas_token ("ibm,configure-bridge");
832 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
835 eeh_error_buf_size = rtas_token("rtas-error-log-max");
836 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
837 eeh_error_buf_size = 1024;
839 if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
840 printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
841 "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
842 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
845 /* Enable EEH for all adapters. Note that eeh requires buid's */
846 for (phb = of_find_node_by_name(NULL, "pci"); phb;
847 phb = of_find_node_by_name(phb, "pci")) {
850 buid = get_phb_buid(phb);
851 if (buid == 0 || PCI_DN(phb) == NULL)
854 info.buid_lo = BUID_LO(buid);
855 info.buid_hi = BUID_HI(buid);
856 traverse_pci_devices(phb, early_enable_eeh, &info);
859 if (eeh_subsystem_enabled)
860 printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
862 printk(KERN_WARNING "EEH: No capable adapters found\n");
866 * eeh_add_device_early - enable EEH for the indicated device_node
867 * @dn: device node for which to set up EEH
869 * This routine must be used to perform EEH initialization for PCI
870 * devices that were added after system boot (e.g. hotplug, dlpar).
871 * This routine must be called before any i/o is performed to the
872 * adapter (inluding any config-space i/o).
873 * Whether this actually enables EEH or not for this device depends
874 * on the CEC architecture, type of the device, on earlier boot
875 * command-line arguments & etc.
877 static void eeh_add_device_early(struct device_node *dn)
879 struct pci_controller *phb;
880 struct eeh_early_enable_info info;
882 if (!dn || !PCI_DN(dn))
884 phb = PCI_DN(dn)->phb;
886 /* USB Bus children of PCI devices will not have BUID's */
887 if (NULL == phb || 0 == phb->buid)
890 info.buid_hi = BUID_HI(phb->buid);
891 info.buid_lo = BUID_LO(phb->buid);
892 early_enable_eeh(dn, &info);
895 void eeh_add_device_tree_early(struct device_node *dn)
897 struct device_node *sib;
898 for (sib = dn->child; sib; sib = sib->sibling)
899 eeh_add_device_tree_early(sib);
900 eeh_add_device_early(dn);
902 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
905 * eeh_add_device_late - perform EEH initialization for the indicated pci device
906 * @dev: pci device for which to set up EEH
908 * This routine must be used to complete EEH initialization for PCI
909 * devices that were added after system boot (e.g. hotplug, dlpar).
911 static void eeh_add_device_late(struct pci_dev *dev)
913 struct device_node *dn;
916 if (!dev || !eeh_subsystem_enabled)
920 printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
924 dn = pci_device_to_OF_node(dev);
928 pci_addr_cache_insert_device (dev);
931 void eeh_add_device_tree_late(struct pci_bus *bus)
935 list_for_each_entry(dev, &bus->devices, bus_list) {
936 eeh_add_device_late(dev);
937 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
938 struct pci_bus *subbus = dev->subordinate;
940 eeh_add_device_tree_late(subbus);
944 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
947 * eeh_remove_device - undo EEH setup for the indicated pci device
948 * @dev: pci device to be removed
950 * This routine should be called when a device is removed from
951 * a running system (e.g. by hotplug or dlpar). It unregisters
952 * the PCI device from the EEH subsystem. I/O errors affecting
953 * this device will no longer be detected after this call; thus,
954 * i/o errors affecting this slot may leave this device unusable.
956 static void eeh_remove_device(struct pci_dev *dev)
958 struct device_node *dn;
959 if (!dev || !eeh_subsystem_enabled)
962 /* Unregister the device with the EEH/PCI address search system */
964 printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
966 pci_addr_cache_remove_device(dev);
968 dn = pci_device_to_OF_node(dev);
969 if (PCI_DN(dn)->pcidev) {
970 PCI_DN(dn)->pcidev = NULL;
975 void eeh_remove_bus_device(struct pci_dev *dev)
977 struct pci_bus *bus = dev->subordinate;
978 struct pci_dev *child, *tmp;
980 eeh_remove_device(dev);
982 if (bus && dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
983 list_for_each_entry_safe(child, tmp, &bus->devices, bus_list)
984 eeh_remove_bus_device(child);
987 EXPORT_SYMBOL_GPL(eeh_remove_bus_device);
989 static int proc_eeh_show(struct seq_file *m, void *v)
991 if (0 == eeh_subsystem_enabled) {
992 seq_printf(m, "EEH Subsystem is globally disabled\n");
993 seq_printf(m, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs);
995 seq_printf(m, "EEH Subsystem is enabled\n");
998 "no device node=%ld\n"
999 "no config address=%ld\n"
1000 "check not wanted=%ld\n"
1001 "eeh_total_mmio_ffs=%ld\n"
1002 "eeh_false_positives=%ld\n"
1003 "eeh_ignored_failures=%ld\n"
1004 "eeh_slot_resets=%ld\n",
1005 no_device, no_dn, no_cfg_addr,
1006 ignored_check, total_mmio_ffs,
1007 false_positives, ignored_failures,
1014 static int proc_eeh_open(struct inode *inode, struct file *file)
1016 return single_open(file, proc_eeh_show, NULL);
1019 static struct file_operations proc_eeh_operations = {
1020 .open = proc_eeh_open,
1022 .llseek = seq_lseek,
1023 .release = single_release,
1026 static int __init eeh_init_proc(void)
1028 struct proc_dir_entry *e;
1030 if (machine_is(pseries)) {
1031 e = create_proc_entry("ppc64/eeh", 0, NULL);
1033 e->proc_fops = &proc_eeh_operations;
1038 __initcall(eeh_init_proc);