err.no Git - linux-2.6/blob - arch/powerpc/platforms/powermac/low_i2c.c

   1 /*
   2  * arch/powerpc/platforms/powermac/low_i2c.c
   3  *
   4  *  Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  *
  11  * The linux i2c layer isn't completely suitable for our needs for various
  12  * reasons ranging from too late initialisation to semantics not perfectly
  13  * matching some requirements of the apple platform functions etc...
  14  *
  15  * This file thus provides a simple low level unified i2c interface for
  16  * powermac that covers the various types of i2c busses used in Apple machines.
  17  * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
  18  * banging busses found on older chipstes in earlier machines if we ever need
  19  * one of them.
  20  *
  21  * The drivers in this file are synchronous/blocking. In addition, the
  22  * keywest one is fairly slow due to the use of msleep instead of interrupts
  23  * as the interrupt is currently used by i2c-keywest. In the long run, we
  24  * might want to get rid of those high-level interfaces to linux i2c layer
  25  * either completely (converting all drivers) or replacing them all with a
  26  * single stub driver on top of this one. Once done, the interrupt will be
  27  * available for our use.
  28  */
  29
  30 #undef DEBUG
  31 #undef DEBUG_LOW
  32
  33 #include <linux/config.h>
  34 #include <linux/types.h>
  35 #include <linux/sched.h>
  36 #include <linux/init.h>
  37 #include <linux/module.h>
  38 #include <linux/adb.h>
  39 #include <linux/pmu.h>
  40 #include <linux/delay.h>
  41 #include <linux/completion.h>
  42 #include <linux/platform_device.h>
  43 #include <linux/interrupt.h>
  44 #include <linux/completion.h>
  45 #include <linux/timer.h>
  46 #include <asm/keylargo.h>
  47 #include <asm/uninorth.h>
  48 #include <asm/io.h>
  49 #include <asm/prom.h>
  50 #include <asm/machdep.h>
  51 #include <asm/smu.h>
  52 #include <asm/pmac_low_i2c.h>
  53
  54 #ifdef DEBUG
  55 #define DBG(x...) do {\
  56                 printk(KERN_DEBUG "low_i2c:" x);        \
  57         } while(0)
  58 #else
  59 #define DBG(x...)
  60 #endif
  61
  62 #ifdef DEBUG_LOW
  63 #define DBG_LOW(x...) do {\
  64                 printk(KERN_DEBUG "low_i2c:" x);        \
  65         } while(0)
  66 #else
  67 #define DBG_LOW(x...)
  68 #endif
  69
  70
  71 static int pmac_i2c_force_poll = 1;
  72
  73 /*
  74  * A bus structure. Each bus in the system has such a structure associated.
  75  */
  76 struct pmac_i2c_bus
  77 {
  78         struct list_head        link;
  79         struct device_node      *controller;
  80         struct device_node      *busnode;
  81         int                     type;
  82         int                     flags;
  83         struct i2c_adapter      *adapter;
  84         void                    *hostdata;
  85         int                     channel;        /* some hosts have multiple */
  86         int                     mode;           /* current mode */
  87         struct semaphore        sem;
  88         int                     opened;
  89         int                     polled;         /* open mode */
  90         struct platform_device  *platform_dev;
  91
  92         /* ops */
  93         int (*open)(struct pmac_i2c_bus *bus);
  94         void (*close)(struct pmac_i2c_bus *bus);
  95         int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
  96                     u32 subaddr, u8 *data, int len);
  97 };
  98
  99 static LIST_HEAD(pmac_i2c_busses);
 100
 101 /*
 102  * Keywest implementation
 103  */
 104
 105 struct pmac_i2c_host_kw
 106 {
 107         struct semaphore        mutex;          /* Access mutex for use by
 108                                                  * i2c-keywest */
 109         void __iomem            *base;          /* register base address */
 110         int                     bsteps;         /* register stepping */
 111         int                     speed;          /* speed */
 112         int                     irq;
 113         u8                      *data;
 114         unsigned                len;
 115         int                     state;
 116         int                     rw;
 117         int                     polled;
 118         int                     result;
 119         struct completion       complete;
 120         spinlock_t              lock;
 121         struct timer_list       timeout_timer;
 122 };
 123
 124 /* Register indices */
 125 typedef enum {
 126         reg_mode = 0,
 127         reg_control,
 128         reg_status,
 129         reg_isr,
 130         reg_ier,
 131         reg_addr,
 132         reg_subaddr,
 133         reg_data
 134 } reg_t;
 135
 136 /* The Tumbler audio equalizer can be really slow sometimes */
 137 #define KW_POLL_TIMEOUT         (2*HZ)
 138
 139 /* Mode register */
 140 #define KW_I2C_MODE_100KHZ      0x00
 141 #define KW_I2C_MODE_50KHZ       0x01
 142 #define KW_I2C_MODE_25KHZ       0x02
 143 #define KW_I2C_MODE_DUMB        0x00
 144 #define KW_I2C_MODE_STANDARD    0x04
 145 #define KW_I2C_MODE_STANDARDSUB 0x08
 146 #define KW_I2C_MODE_COMBINED    0x0C
 147 #define KW_I2C_MODE_MODE_MASK   0x0C
 148 #define KW_I2C_MODE_CHAN_MASK   0xF0
 149
 150 /* Control register */
 151 #define KW_I2C_CTL_AAK          0x01
 152 #define KW_I2C_CTL_XADDR        0x02
 153 #define KW_I2C_CTL_STOP         0x04
 154 #define KW_I2C_CTL_START        0x08
 155
 156 /* Status register */
 157 #define KW_I2C_STAT_BUSY        0x01
 158 #define KW_I2C_STAT_LAST_AAK    0x02
 159 #define KW_I2C_STAT_LAST_RW     0x04
 160 #define KW_I2C_STAT_SDA         0x08
 161 #define KW_I2C_STAT_SCL         0x10
 162
 163 /* IER & ISR registers */
 164 #define KW_I2C_IRQ_DATA         0x01
 165 #define KW_I2C_IRQ_ADDR         0x02
 166 #define KW_I2C_IRQ_STOP         0x04
 167 #define KW_I2C_IRQ_START        0x08
 168 #define KW_I2C_IRQ_MASK         0x0F
 169
 170 /* State machine states */
 171 enum {
 172         state_idle,
 173         state_addr,
 174         state_read,
 175         state_write,
 176         state_stop,
 177         state_dead
 178 };
 179
 180 #define WRONG_STATE(name) do {\
 181                 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
 182                        "(isr: %02x)\n", \
 183                        name, __kw_state_names[host->state], isr); \
 184         } while(0)
 185
 186 static const char *__kw_state_names[] = {
 187         "state_idle",
 188         "state_addr",
 189         "state_read",
 190         "state_write",
 191         "state_stop",
 192         "state_dead"
 193 };
 194
 195 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
 196 {
 197         return readb(host->base + (((unsigned int)reg) << host->bsteps));
 198 }
 199
 200 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
 201                                   reg_t reg, u8 val)
 202 {
 203         writeb(val, host->base + (((unsigned)reg) << host->bsteps));
 204         (void)__kw_read_reg(host, reg_subaddr);
 205 }
 206
 207 #define kw_write_reg(reg, val)  __kw_write_reg(host, reg, val)
 208 #define kw_read_reg(reg)        __kw_read_reg(host, reg)
 209
 210 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
 211 {
 212         int i, j;
 213         u8 isr;
 214
 215         for (i = 0; i < 1000; i++) {
 216                 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
 217                 if (isr != 0)
 218                         return isr;
 219
 220                 /* This code is used with the timebase frozen, we cannot rely
 221                  * on udelay nor schedule when in polled mode !
 222                  * For now, just use a bogus loop....
 223                  */
 224                 if (host->polled) {
 225                         for (j = 1; j < 100000; j++)
 226                                 mb();
 227                 } else
 228                         msleep(1);
 229         }
 230         return isr;
 231 }
 232
 233 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
 234 {
 235         u8 ack;
 236
 237         DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
 238                 __kw_state_names[host->state], isr);
 239
 240         if (host->state == state_idle) {
 241                 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
 242                        " interrupt, ignoring\n");
 243                 kw_write_reg(reg_isr, isr);
 244                 return;
 245         }
 246
 247         if (isr == 0) {
 248                 if (host->state != state_stop) {
 249                         DBG_LOW("KW: Timeout !\n");
 250                         host->result = -EIO;
 251                         goto stop;
 252                 }
 253                 if (host->state == state_stop) {
 254                         ack = kw_read_reg(reg_status);
 255                         if (ack & KW_I2C_STAT_BUSY)
 256                                 kw_write_reg(reg_status, 0);
 257                         host->state = state_idle;
 258                         kw_write_reg(reg_ier, 0x00);
 259                         if (!host->polled)
 260                                 complete(&host->complete);
 261                 }
 262                 return;
 263         }
 264
 265         if (isr & KW_I2C_IRQ_ADDR) {
 266                 ack = kw_read_reg(reg_status);
 267                 if (host->state != state_addr) {
 268                         kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
 269                         WRONG_STATE("KW_I2C_IRQ_ADDR");
 270                         host->result = -EIO;
 271                         goto stop;
 272                 }
 273                 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
 274                         host->result = -ENODEV;
 275                         DBG_LOW("KW: NAK on address\n");
 276                         host->state = state_stop;
 277                         return;
 278                 } else {
 279                         if (host->len == 0) {
 280                                 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
 281                                 goto stop;
 282                         }
 283                         if (host->rw) {
 284                                 host->state = state_read;
 285                                 if (host->len > 1)
 286                                         kw_write_reg(reg_control,
 287                                                      KW_I2C_CTL_AAK);
 288                         } else {
 289                                 host->state = state_write;
 290                                 kw_write_reg(reg_data, *(host->data++));
 291                                 host->len--;
 292                         }
 293                 }
 294                 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
 295         }
 296
 297         if (isr & KW_I2C_IRQ_DATA) {
 298                 if (host->state == state_read) {
 299                         *(host->data++) = kw_read_reg(reg_data);
 300                         host->len--;
 301                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 302                         if (host->len == 0)
 303                                 host->state = state_stop;
 304                         else if (host->len == 1)
 305                                 kw_write_reg(reg_control, 0);
 306                 } else if (host->state == state_write) {
 307                         ack = kw_read_reg(reg_status);
 308                         if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
 309                                 DBG_LOW("KW: nack on data write\n");
 310                                 host->result = -EIO;
 311                                 goto stop;
 312                         } else if (host->len) {
 313                                 kw_write_reg(reg_data, *(host->data++));
 314                                 host->len--;
 315                         } else {
 316                                 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
 317                                 host->state = state_stop;
 318                                 host->result = 0;
 319                         }
 320                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 321                 } else {
 322                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 323                         WRONG_STATE("KW_I2C_IRQ_DATA");
 324                         if (host->state != state_stop) {
 325                                 host->result = -EIO;
 326                                 goto stop;
 327                         }
 328                 }
 329         }
 330
 331         if (isr & KW_I2C_IRQ_STOP) {
 332                 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
 333                 if (host->state != state_stop) {
 334                         WRONG_STATE("KW_I2C_IRQ_STOP");
 335                         host->result = -EIO;
 336                 }
 337                 host->state = state_idle;
 338                 if (!host->polled)
 339                         complete(&host->complete);
 340         }
 341
 342         if (isr & KW_I2C_IRQ_START)
 343                 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
 344
 345         return;
 346  stop:
 347         kw_write_reg(reg_control, KW_I2C_CTL_STOP);
 348         host->state = state_stop;
 349         return;
 350 }
 351
 352 /* Interrupt handler */
 353 static irqreturn_t kw_i2c_irq(int irq, void *dev_id, struct pt_regs *regs)
 354 {
 355         struct pmac_i2c_host_kw *host = dev_id;
 356         unsigned long flags;
 357
 358         spin_lock_irqsave(&host->lock, flags);
 359         del_timer(&host->timeout_timer);
 360         kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
 361         if (host->state != state_idle) {
 362                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 363                 add_timer(&host->timeout_timer);
 364         }
 365         spin_unlock_irqrestore(&host->lock, flags);
 366         return IRQ_HANDLED;
 367 }
 368
 369 static void kw_i2c_timeout(unsigned long data)
 370 {
 371         struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
 372         unsigned long flags;
 373
 374         spin_lock_irqsave(&host->lock, flags);
 375         kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
 376         if (host->state != state_idle) {
 377                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 378                 add_timer(&host->timeout_timer);
 379         }
 380         spin_unlock_irqrestore(&host->lock, flags);
 381 }
 382
 383 static int kw_i2c_open(struct pmac_i2c_bus *bus)
 384 {
 385         struct pmac_i2c_host_kw *host = bus->hostdata;
 386         down(&host->mutex);
 387         return 0;
 388 }
 389
 390 static void kw_i2c_close(struct pmac_i2c_bus *bus)
 391 {
 392         struct pmac_i2c_host_kw *host = bus->hostdata;
 393         up(&host->mutex);
 394 }
 395
 396 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 397                        u32 subaddr, u8 *data, int len)
 398 {
 399         struct pmac_i2c_host_kw *host = bus->hostdata;
 400         u8 mode_reg = host->speed;
 401         int use_irq = host->irq != NO_IRQ && !bus->polled;
 402
 403         /* Setup mode & subaddress if any */
 404         switch(bus->mode) {
 405         case pmac_i2c_mode_dumb:
 406                 return -EINVAL;
 407         case pmac_i2c_mode_std:
 408                 mode_reg |= KW_I2C_MODE_STANDARD;
 409                 if (subsize != 0)
 410                         return -EINVAL;
 411                 break;
 412         case pmac_i2c_mode_stdsub:
 413                 mode_reg |= KW_I2C_MODE_STANDARDSUB;
 414                 if (subsize != 1)
 415                         return -EINVAL;
 416                 break;
 417         case pmac_i2c_mode_combined:
 418                 mode_reg |= KW_I2C_MODE_COMBINED;
 419                 if (subsize != 1)
 420                         return -EINVAL;
 421                 break;
 422         }
 423
 424         /* Setup channel & clear pending irqs */
 425         kw_write_reg(reg_isr, kw_read_reg(reg_isr));
 426         kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
 427         kw_write_reg(reg_status, 0);
 428
 429         /* Set up address and r/w bit, strip possible stale bus number from
 430          * address top bits
 431          */
 432         kw_write_reg(reg_addr, addrdir & 0xff);
 433
 434         /* Set up the sub address */
 435         if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
 436             || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
 437                 kw_write_reg(reg_subaddr, subaddr);
 438
 439         /* Prepare for async operations */
 440         host->data = data;
 441         host->len = len;
 442         host->state = state_addr;
 443         host->result = 0;
 444         host->rw = (addrdir & 1);
 445         host->polled = bus->polled;
 446
 447         /* Enable interrupt if not using polled mode and interrupt is
 448          * available
 449          */
 450         if (use_irq) {
 451                 /* Clear completion */
 452                 INIT_COMPLETION(host->complete);
 453                 /* Ack stale interrupts */
 454                 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
 455                 /* Arm timeout */
 456                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 457                 add_timer(&host->timeout_timer);
 458                 /* Enable emission */
 459                 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
 460         }
 461
 462         /* Start sending address */
 463         kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
 464
 465         /* Wait for completion */
 466         if (use_irq)
 467                 wait_for_completion(&host->complete);
 468         else {
 469                 while(host->state != state_idle) {
 470                         unsigned long flags;
 471
 472                         u8 isr = kw_i2c_wait_interrupt(host);
 473                         spin_lock_irqsave(&host->lock, flags);
 474                         kw_i2c_handle_interrupt(host, isr);
 475                         spin_unlock_irqrestore(&host->lock, flags);
 476                 }
 477         }
 478
 479         /* Disable emission */
 480         kw_write_reg(reg_ier, 0);
 481
 482         return host->result;
 483 }
 484
 485 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
 486 {
 487         struct pmac_i2c_host_kw *host;
 488         u32                     *psteps, *prate, *addrp, steps;
 489
 490         host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
 491         if (host == NULL) {
 492                 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
 493                        np->full_name);
 494                 return NULL;
 495         }
 496
 497         /* Apple is kind enough to provide a valid AAPL,address property
 498          * on all i2c keywest nodes so far ... we would have to fallback
 499          * to macio parsing if that wasn't the case
 500          */
 501         addrp = (u32 *)get_property(np, "AAPL,address", NULL);
 502         if (addrp == NULL) {
 503                 printk(KERN_ERR "low_i2c: Can't find address for %s\n",
 504                        np->full_name);
 505                 kfree(host);
 506                 return NULL;
 507         }
 508         init_MUTEX(&host->mutex);
 509         init_completion(&host->complete);
 510         spin_lock_init(&host->lock);
 511         init_timer(&host->timeout_timer);
 512         host->timeout_timer.function = kw_i2c_timeout;
 513         host->timeout_timer.data = (unsigned long)host;
 514
 515         psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
 516         steps = psteps ? (*psteps) : 0x10;
 517         for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
 518                 steps >>= 1;
 519         /* Select interface rate */
 520         host->speed = KW_I2C_MODE_25KHZ;
 521         prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
 522         if (prate) switch(*prate) {
 523         case 100:
 524                 host->speed = KW_I2C_MODE_100KHZ;
 525                 break;
 526         case 50:
 527                 host->speed = KW_I2C_MODE_50KHZ;
 528                 break;
 529         case 25:
 530                 host->speed = KW_I2C_MODE_25KHZ;
 531                 break;
 532         }
 533         if (np->n_intrs > 0)
 534                 host->irq = np->intrs[0].line;
 535         else
 536                 host->irq = NO_IRQ;
 537
 538         host->base = ioremap((*addrp), 0x1000);
 539         if (host->base == NULL) {
 540                 printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
 541                        np->full_name);
 542                 kfree(host);
 543                 return NULL;
 544         }
 545
 546         /* Make sure IRA is disabled */
 547         kw_write_reg(reg_ier, 0);
 548
 549         /* Request chip interrupt */
 550         if (request_irq(host->irq, kw_i2c_irq, SA_SHIRQ, "keywest i2c", host))
 551                 host->irq = NO_IRQ;
 552
 553         printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
 554                *addrp, host->irq, np->full_name);
 555
 556         return host;
 557 }
 558
 559
 560 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
 561                               struct device_node *controller,
 562                               struct device_node *busnode,
 563                               int channel)
 564 {
 565         struct pmac_i2c_bus *bus;
 566
 567         bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
 568         if (bus == NULL)
 569                 return;
 570
 571         bus->controller = of_node_get(controller);
 572         bus->busnode = of_node_get(busnode);
 573         bus->type = pmac_i2c_bus_keywest;
 574         bus->hostdata = host;
 575         bus->channel = channel;
 576         bus->mode = pmac_i2c_mode_std;
 577         bus->open = kw_i2c_open;
 578         bus->close = kw_i2c_close;
 579         bus->xfer = kw_i2c_xfer;
 580         init_MUTEX(&bus->sem);
 581         if (controller == busnode)
 582                 bus->flags = pmac_i2c_multibus;
 583         list_add(&bus->link, &pmac_i2c_busses);
 584
 585         printk(KERN_INFO " channel %d bus %s\n", channel,
 586                (controller == busnode) ? "<multibus>" : busnode->full_name);
 587 }
 588
 589 static void __init kw_i2c_probe(void)
 590 {
 591         struct device_node *np, *child, *parent;
 592
 593         /* Probe keywest-i2c busses */
 594         for (np = NULL;
 595              (np = of_find_compatible_node(np, "i2c","keywest-i2c")) != NULL;){
 596                 struct pmac_i2c_host_kw *host;
 597                 int multibus, chans, i;
 598
 599                 /* Found one, init a host structure */
 600                 host = kw_i2c_host_init(np);
 601                 if (host == NULL)
 602                         continue;
 603
 604                 /* Now check if we have a multibus setup (old style) or if we
 605                  * have proper bus nodes. Note that the "new" way (proper bus
 606                  * nodes) might cause us to not create some busses that are
 607                  * kept hidden in the device-tree. In the future, we might
 608                  * want to work around that by creating busses without a node
 609                  * but not for now
 610                  */
 611                 child = of_get_next_child(np, NULL);
 612                 multibus = !child || strcmp(child->name, "i2c-bus");
 613                 of_node_put(child);
 614
 615                 /* For a multibus setup, we get the bus count based on the
 616                  * parent type
 617                  */
 618                 if (multibus) {
 619                         parent = of_get_parent(np);
 620                         if (parent == NULL)
 621                                 continue;
 622                         chans = parent->name[0] == 'u' ? 2 : 1;
 623                         for (i = 0; i < chans; i++)
 624                                 kw_i2c_add(host, np, np, i);
 625                 } else {
 626                         for (child = NULL;
 627                              (child = of_get_next_child(np, child)) != NULL;) {
 628                                 u32 *reg =
 629                                         (u32 *)get_property(child, "reg", NULL);
 630                                 if (reg == NULL)
 631                                         continue;
 632                                 kw_i2c_add(host, np, child, *reg);
 633                         }
 634                 }
 635         }
 636 }
 637
 638
 639 /*
 640  *
 641  * PMU implementation
 642  *
 643  */
 644
 645 #ifdef CONFIG_ADB_PMU
 646
 647 /*
 648  * i2c command block to the PMU
 649  */
 650 struct pmu_i2c_hdr {
 651         u8      bus;
 652         u8      mode;
 653         u8      bus2;
 654         u8      address;
 655         u8      sub_addr;
 656         u8      comb_addr;
 657         u8      count;
 658         u8      data[];
 659 };
 660
 661 static void pmu_i2c_complete(struct adb_request *req)
 662 {
 663         complete(req->arg);
 664 }
 665
 666 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 667                         u32 subaddr, u8 *data, int len)
 668 {
 669         struct adb_request *req = bus->hostdata;
 670         struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
 671         struct completion comp;
 672         int read = addrdir & 1;
 673         int retry;
 674         int rc = 0;
 675
 676         /* For now, limit ourselves to 16 bytes transfers */
 677         if (len > 16)
 678                 return -EINVAL;
 679
 680         init_completion(&comp);
 681
 682         for (retry = 0; retry < 16; retry++) {
 683                 memset(req, 0, sizeof(struct adb_request));
 684                 hdr->bus = bus->channel;
 685                 hdr->count = len;
 686
 687                 switch(bus->mode) {
 688                 case pmac_i2c_mode_std:
 689                         if (subsize != 0)
 690                                 return -EINVAL;
 691                         hdr->address = addrdir;
 692                         hdr->mode = PMU_I2C_MODE_SIMPLE;
 693                         break;
 694                 case pmac_i2c_mode_stdsub:
 695                 case pmac_i2c_mode_combined:
 696                         if (subsize != 1)
 697                                 return -EINVAL;
 698                         hdr->address = addrdir & 0xfe;
 699                         hdr->comb_addr = addrdir;
 700                         hdr->sub_addr = subaddr;
 701                         if (bus->mode == pmac_i2c_mode_stdsub)
 702                                 hdr->mode = PMU_I2C_MODE_STDSUB;
 703                         else
 704                                 hdr->mode = PMU_I2C_MODE_COMBINED;
 705                         break;
 706                 default:
 707                         return -EINVAL;
 708                 }
 709
 710                 INIT_COMPLETION(comp);
 711                 req->data[0] = PMU_I2C_CMD;
 712                 req->reply[0] = 0xff;
 713                 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
 714                 req->done = pmu_i2c_complete;
 715                 req->arg = &comp;
 716                 if (!read && len) {
 717                         memcpy(hdr->data, data, len);
 718                         req->nbytes += len;
 719                 }
 720                 rc = pmu_queue_request(req);
 721                 if (rc)
 722                         return rc;
 723                 wait_for_completion(&comp);
 724                 if (req->reply[0] == PMU_I2C_STATUS_OK)
 725                         break;
 726                 msleep(15);
 727         }
 728         if (req->reply[0] != PMU_I2C_STATUS_OK)
 729                 return -EIO;
 730
 731         for (retry = 0; retry < 16; retry++) {
 732                 memset(req, 0, sizeof(struct adb_request));
 733
 734                 /* I know that looks like a lot, slow as hell, but darwin
 735                  * does it so let's be on the safe side for now
 736                  */
 737                 msleep(15);
 738
 739                 hdr->bus = PMU_I2C_BUS_STATUS;
 740
 741                 INIT_COMPLETION(comp);
 742                 req->data[0] = PMU_I2C_CMD;
 743                 req->reply[0] = 0xff;
 744                 req->nbytes = 2;
 745                 req->done = pmu_i2c_complete;
 746                 req->arg = &comp;
 747                 rc = pmu_queue_request(req);
 748                 if (rc)
 749                         return rc;
 750                 wait_for_completion(&comp);
 751
 752                 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
 753                         return 0;
 754                 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
 755                         int rlen = req->reply_len - 1;
 756
 757                         if (rlen != len) {
 758                                 printk(KERN_WARNING "low_i2c: PMU returned %d"
 759                                        " bytes, expected %d !\n", rlen, len);
 760                                 return -EIO;
 761                         }
 762                         if (len)
 763                                 memcpy(data, &req->reply[1], len);
 764                         return 0;
 765                 }
 766         }
 767         return -EIO;
 768 }
 769
 770 static void __init pmu_i2c_probe(void)
 771 {
 772         struct pmac_i2c_bus *bus;
 773         struct device_node *busnode;
 774         int channel, sz;
 775
 776         if (!pmu_present())
 777                 return;
 778
 779         /* There might or might not be a "pmu-i2c" node, we use that
 780          * or via-pmu itself, whatever we find. I haven't seen a machine
 781          * with separate bus nodes, so we assume a multibus setup
 782          */
 783         busnode = of_find_node_by_name(NULL, "pmu-i2c");
 784         if (busnode == NULL)
 785                 busnode = of_find_node_by_name(NULL, "via-pmu");
 786         if (busnode == NULL)
 787                 return;
 788
 789         printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
 790
 791         /*
 792          * We add bus 1 and 2 only for now, bus 0 is "special"
 793          */
 794         for (channel = 1; channel <= 2; channel++) {
 795                 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
 796                 bus = kzalloc(sz, GFP_KERNEL);
 797                 if (bus == NULL)
 798                         return;
 799
 800                 bus->controller = busnode;
 801                 bus->busnode = busnode;
 802                 bus->type = pmac_i2c_bus_pmu;
 803                 bus->channel = channel;
 804                 bus->mode = pmac_i2c_mode_std;
 805                 bus->hostdata = bus + 1;
 806                 bus->xfer = pmu_i2c_xfer;
 807                 init_MUTEX(&bus->sem);
 808                 bus->flags = pmac_i2c_multibus;
 809                 list_add(&bus->link, &pmac_i2c_busses);
 810
 811                 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
 812         }
 813 }
 814
 815 #endif /* CONFIG_ADB_PMU */
 816
 817
 818 /*
 819  *
 820  * SMU implementation
 821  *
 822  */
 823
 824 #ifdef CONFIG_PMAC_SMU
 825
 826 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
 827 {
 828         complete(misc);
 829 }
 830
 831 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 832                         u32 subaddr, u8 *data, int len)
 833 {
 834         struct smu_i2c_cmd *cmd = bus->hostdata;
 835         struct completion comp;
 836         int read = addrdir & 1;
 837         int rc = 0;
 838
 839         if ((read && len > SMU_I2C_READ_MAX) ||
 840             ((!read) && len > SMU_I2C_WRITE_MAX))
 841                 return -EINVAL;
 842
 843         memset(cmd, 0, sizeof(struct smu_i2c_cmd));
 844         cmd->info.bus = bus->channel;
 845         cmd->info.devaddr = addrdir;
 846         cmd->info.datalen = len;
 847
 848         switch(bus->mode) {
 849         case pmac_i2c_mode_std:
 850                 if (subsize != 0)
 851                         return -EINVAL;
 852                 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
 853                 break;
 854         case pmac_i2c_mode_stdsub:
 855         case pmac_i2c_mode_combined:
 856                 if (subsize > 3 || subsize < 1)
 857                         return -EINVAL;
 858                 cmd->info.sublen = subsize;
 859                 /* that's big-endian only but heh ! */
 860                 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
 861                        subsize);
 862                 if (bus->mode == pmac_i2c_mode_stdsub)
 863                         cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
 864                 else
 865                         cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
 866                 break;
 867         default:
 868                 return -EINVAL;
 869         }
 870         if (!read && len)
 871                 memcpy(cmd->info.data, data, len);
 872
 873         init_completion(&comp);
 874         cmd->done = smu_i2c_complete;
 875         cmd->misc = &comp;
 876         rc = smu_queue_i2c(cmd);
 877         if (rc < 0)
 878                 return rc;
 879         wait_for_completion(&comp);
 880         rc = cmd->status;
 881
 882         if (read && len)
 883                 memcpy(data, cmd->info.data, len);
 884         return rc < 0 ? rc : 0;
 885 }
 886
 887 static void __init smu_i2c_probe(void)
 888 {
 889         struct device_node *controller, *busnode;
 890         struct pmac_i2c_bus *bus;
 891         u32 *reg;
 892         int sz;
 893
 894         if (!smu_present())
 895                 return;
 896
 897         controller = of_find_node_by_name(NULL, "smu-i2c-control");
 898         if (controller == NULL)
 899                 controller = of_find_node_by_name(NULL, "smu");
 900         if (controller == NULL)
 901                 return;
 902
 903         printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
 904
 905         /* Look for childs, note that they might not be of the right
 906          * type as older device trees mix i2c busses and other thigns
 907          * at the same level
 908          */
 909         for (busnode = NULL;
 910              (busnode = of_get_next_child(controller, busnode)) != NULL;) {
 911                 if (strcmp(busnode->type, "i2c") &&
 912                     strcmp(busnode->type, "i2c-bus"))
 913                         continue;
 914                 reg = (u32 *)get_property(busnode, "reg", NULL);
 915                 if (reg == NULL)
 916                         continue;
 917
 918                 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
 919                 bus = kzalloc(sz, GFP_KERNEL);
 920                 if (bus == NULL)
 921                         return;
 922
 923                 bus->controller = controller;
 924                 bus->busnode = of_node_get(busnode);
 925                 bus->type = pmac_i2c_bus_smu;
 926                 bus->channel = *reg;
 927                 bus->mode = pmac_i2c_mode_std;
 928                 bus->hostdata = bus + 1;
 929                 bus->xfer = smu_i2c_xfer;
 930                 init_MUTEX(&bus->sem);
 931                 bus->flags = 0;
 932                 list_add(&bus->link, &pmac_i2c_busses);
 933
 934                 printk(KERN_INFO " channel %x bus %s\n",
 935                        bus->channel, busnode->full_name);
 936         }
 937 }
 938
 939 #endif /* CONFIG_PMAC_SMU */
 940
 941 /*
 942  *
 943  * Core code
 944  *
 945  */
 946
 947
 948 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
 949 {
 950         struct device_node *p = of_node_get(node);
 951         struct device_node *prev = NULL;
 952         struct pmac_i2c_bus *bus;
 953
 954         while(p) {
 955                 list_for_each_entry(bus, &pmac_i2c_busses, link) {
 956                         if (p == bus->busnode) {
 957                                 if (prev && bus->flags & pmac_i2c_multibus) {
 958                                         u32 *reg;
 959                                         reg = (u32 *)get_property(prev, "reg",
 960                                                                   NULL);
 961                                         if (!reg)
 962                                                 continue;
 963                                         if (((*reg) >> 8) != bus->channel)
 964                                                 continue;
 965                                 }
 966                                 of_node_put(p);
 967                                 of_node_put(prev);
 968                                 return bus;
 969                         }
 970                 }
 971                 of_node_put(prev);
 972                 prev = p;
 973                 p = of_get_parent(p);
 974         }
 975         return NULL;
 976 }
 977 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
 978
 979 u8 pmac_i2c_get_dev_addr(struct device_node *device)
 980 {
 981         u32 *reg = (u32 *)get_property(device, "reg", NULL);
 982
 983         if (reg == NULL)
 984                 return 0;
 985
 986         return (*reg) & 0xff;
 987 }
 988 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
 989
 990 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
 991 {
 992         return bus->controller;
 993 }
 994 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
 995
 996 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
 997 {
 998         return bus->busnode;
 999 }
1000 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1001
1002 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1003 {
1004         return bus->type;
1005 }
1006 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1007
1008 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1009 {
1010         return bus->flags;
1011 }
1012 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1013
1014 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1015 {
1016         return bus->channel;
1017 }
1018 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1019
1020
1021 void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
1022                              struct i2c_adapter *adapter)
1023 {
1024         WARN_ON(bus->adapter != NULL);
1025         bus->adapter = adapter;
1026 }
1027 EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter);
1028
1029 void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
1030                              struct i2c_adapter *adapter)
1031 {
1032         WARN_ON(bus->adapter != adapter);
1033         bus->adapter = NULL;
1034 }
1035 EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter);
1036
1037 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1038 {
1039         return bus->adapter;
1040 }
1041 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1042
1043 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1044 {
1045         struct pmac_i2c_bus *bus;
1046
1047         list_for_each_entry(bus, &pmac_i2c_busses, link)
1048                 if (bus->adapter == adapter)
1049                         return bus;
1050         return NULL;
1051 }
1052 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1053
1054 extern int pmac_i2c_match_adapter(struct device_node *dev,
1055                                   struct i2c_adapter *adapter)
1056 {
1057         struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1058
1059         if (bus == NULL)
1060                 return 0;
1061         return (bus->adapter == adapter);
1062 }
1063 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1064
1065 int pmac_low_i2c_lock(struct device_node *np)
1066 {
1067         struct pmac_i2c_bus *bus, *found = NULL;
1068
1069         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1070                 if (np == bus->controller) {
1071                         found = bus;
1072                         break;
1073                 }
1074         }
1075         if (!found)
1076                 return -ENODEV;
1077         return pmac_i2c_open(bus, 0);
1078 }
1079 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1080
1081 int pmac_low_i2c_unlock(struct device_node *np)
1082 {
1083         struct pmac_i2c_bus *bus, *found = NULL;
1084
1085         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1086                 if (np == bus->controller) {
1087                         found = bus;
1088                         break;
1089                 }
1090         }
1091         if (!found)
1092                 return -ENODEV;
1093         pmac_i2c_close(bus);
1094         return 0;
1095 }
1096 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1097
1098
1099 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1100 {
1101         int rc;
1102
1103         down(&bus->sem);
1104         bus->polled = polled || pmac_i2c_force_poll;
1105         bus->opened = 1;
1106         bus->mode = pmac_i2c_mode_std;
1107         if (bus->open && (rc = bus->open(bus)) != 0) {
1108                 bus->opened = 0;
1109                 up(&bus->sem);
1110                 return rc;
1111         }
1112         return 0;
1113 }
1114 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1115
1116 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1117 {
1118         WARN_ON(!bus->opened);
1119         if (bus->close)
1120                 bus->close(bus);
1121         bus->opened = 0;
1122         up(&bus->sem);
1123 }
1124 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1125
1126 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1127 {
1128         WARN_ON(!bus->opened);
1129
1130         /* Report me if you see the error below as there might be a new
1131          * "combined4" mode that I need to implement for the SMU bus
1132          */
1133         if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1134                 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1135                        " bus %s !\n", mode, bus->busnode->full_name);
1136                 return -EINVAL;
1137         }
1138         bus->mode = mode;
1139
1140         return 0;
1141 }
1142 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1143
1144 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1145                   u32 subaddr, u8 *data, int len)
1146 {
1147         int rc;
1148
1149         WARN_ON(!bus->opened);
1150
1151         DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1152             " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1153             subaddr, len, bus->busnode->full_name);
1154
1155         rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1156
1157 #ifdef DEBUG
1158         if (rc)
1159                 DBG("xfer error %d\n", rc);
1160 #endif
1161         return rc;
1162 }
1163 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1164
1165 /*
1166  * Initialize us: probe all i2c busses on the machine and instantiate
1167  * busses.
1168  */
1169 /* This is non-static as it might be called early by smp code */
1170 int __init pmac_i2c_init(void)
1171 {
1172         static int i2c_inited;
1173
1174         if (i2c_inited)
1175                 return 0;
1176         i2c_inited = 1;
1177
1178         /* Probe keywest-i2c busses */
1179         kw_i2c_probe();
1180
1181 #ifdef CONFIG_ADB_PMU
1182         /* Probe PMU i2c busses */
1183         pmu_i2c_probe();
1184 #endif
1185
1186 #ifdef CONFIG_PMAC_SMU
1187         /* Probe SMU i2c busses */
1188         smu_i2c_probe();
1189 #endif
1190         return 0;
1191 }
1192 arch_initcall(pmac_i2c_init);
1193
1194 /* Since pmac_i2c_init can be called too early for the platform device
1195  * registration, we need to do it at a later time. In our case, subsys
1196  * happens to fit well, though I agree it's a bit of a hack...
1197  */
1198 static int __init pmac_i2c_create_platform_devices(void)
1199 {
1200         struct pmac_i2c_bus *bus;
1201         int i = 0;
1202
1203         /* In the case where we are initialized from smp_init(), we must
1204          * not use the timer (and thus the irq). It's safe from now on
1205          * though
1206          */
1207         pmac_i2c_force_poll = 0;
1208
1209         /* Create platform devices */
1210         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1211                 bus->platform_dev =
1212                         platform_device_alloc("i2c-powermac", i++);
1213                 if (bus->platform_dev == NULL)
1214                         return -ENOMEM;
1215                 bus->platform_dev->dev.platform_data = bus;
1216                 platform_device_add(bus->platform_dev);
1217         }
1218
1219         return 0;
1220 }
1221 subsys_initcall(pmac_i2c_create_platform_devices);