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[POWERPC] Native cell support for MPIC in southbridge
[linux-2.6] / arch / powerpc / platforms / cell / setup.c
1 /*
2  *  linux/arch/powerpc/platforms/cell/cell_setup.c
3  *
4  *  Copyright (C) 1995  Linus Torvalds
5  *  Adapted from 'alpha' version by Gary Thomas
6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
7  *  Modified by PPC64 Team, IBM Corp
8  *  Modified by Cell Team, IBM Deutschland Entwicklung GmbH
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License
12  * as published by the Free Software Foundation; either version
13  * 2 of the License, or (at your option) any later version.
14  */
15 #undef DEBUG
16
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/slab.h>
23 #include <linux/user.h>
24 #include <linux/reboot.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/irq.h>
28 #include <linux/seq_file.h>
29 #include <linux/root_dev.h>
30 #include <linux/console.h>
31 #include <linux/mutex.h>
32 #include <linux/memory_hotplug.h>
33
34 #include <asm/mmu.h>
35 #include <asm/processor.h>
36 #include <asm/io.h>
37 #include <asm/kexec.h>
38 #include <asm/pgtable.h>
39 #include <asm/prom.h>
40 #include <asm/rtas.h>
41 #include <asm/pci-bridge.h>
42 #include <asm/iommu.h>
43 #include <asm/dma.h>
44 #include <asm/machdep.h>
45 #include <asm/time.h>
46 #include <asm/nvram.h>
47 #include <asm/cputable.h>
48 #include <asm/ppc-pci.h>
49 #include <asm/irq.h>
50 #include <asm/spu.h>
51 #include <asm/spu_priv1.h>
52 #include <asm/udbg.h>
53 #include <asm/mpic.h>
54
55 #include "interrupt.h"
56 #include "iommu.h"
57 #include "cbe_regs.h"
58 #include "pervasive.h"
59 #include "ras.h"
60
61 #ifdef DEBUG
62 #define DBG(fmt...) udbg_printf(fmt)
63 #else
64 #define DBG(fmt...)
65 #endif
66
67 static void cell_show_cpuinfo(struct seq_file *m)
68 {
69         struct device_node *root;
70         const char *model = "";
71
72         root = of_find_node_by_path("/");
73         if (root)
74                 model = get_property(root, "model", NULL);
75         seq_printf(m, "machine\t\t: CHRP %s\n", model);
76         of_node_put(root);
77 }
78
79 static void cell_progress(char *s, unsigned short hex)
80 {
81         printk("*** %04x : %s\n", hex, s ? s : "");
82 }
83
84 static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
85 {
86         struct mpic *mpic = desc->handler_data;
87         unsigned int virq;
88
89         virq = mpic_get_one_irq(mpic);
90         if (virq != NO_IRQ)
91                 generic_handle_irq(virq);
92         desc->chip->eoi(irq);
93 }
94
95 static void __init mpic_init_IRQ(void)
96 {
97         struct device_node *dn;
98         struct mpic *mpic;
99         unsigned int virq;
100
101         for (dn = NULL;
102              (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
103                 if (!device_is_compatible(dn, "CBEA,platform-open-pic"))
104                         continue;
105
106                 /* The MPIC driver will get everything it needs from the
107                  * device-tree, just pass 0 to all arguments
108                  */
109                 mpic = mpic_alloc(dn, 0, 0, 0, 0, " MPIC     ");
110                 if (mpic == NULL)
111                         continue;
112                 mpic_init(mpic);
113
114                 virq = irq_of_parse_and_map(dn, 0);
115                 if (virq == NO_IRQ)
116                         continue;
117
118                 printk(KERN_INFO "%s : hooking up to IRQ %d\n",
119                        dn->full_name, virq);
120                 set_irq_data(virq, mpic);
121                 set_irq_chained_handler(virq, cell_mpic_cascade);
122         }
123 }
124
125
126 static void __init cell_init_irq(void)
127 {
128         iic_init_IRQ();
129         spider_init_IRQ();
130         mpic_init_IRQ();
131 }
132
133 static void __init cell_setup_arch(void)
134 {
135 #ifdef CONFIG_SPU_BASE
136         spu_priv1_ops         = &spu_priv1_mmio_ops;
137 #endif
138
139         cbe_regs_init();
140
141 #ifdef CONFIG_CBE_RAS
142         cbe_ras_init();
143 #endif
144
145 #ifdef CONFIG_SMP
146         smp_init_cell();
147 #endif
148
149         /* init to some ~sane value until calibrate_delay() runs */
150         loops_per_jiffy = 50000000;
151
152         if (ROOT_DEV == 0) {
153                 printk("No ramdisk, default root is /dev/hda2\n");
154                 ROOT_DEV = Root_HDA2;
155         }
156
157         /* Find and initialize PCI host bridges */
158         init_pci_config_tokens();
159         find_and_init_phbs();
160         cbe_pervasive_init();
161 #ifdef CONFIG_DUMMY_CONSOLE
162         conswitchp = &dummy_con;
163 #endif
164
165         mmio_nvram_init();
166 }
167
168 /*
169  * Early initialization.  Relocation is on but do not reference unbolted pages
170  */
171 static void __init cell_init_early(void)
172 {
173         DBG(" -> cell_init_early()\n");
174
175         cell_init_iommu();
176
177         DBG(" <- cell_init_early()\n");
178 }
179
180
181 static int __init cell_probe(void)
182 {
183         unsigned long root = of_get_flat_dt_root();
184
185         if (!of_flat_dt_is_compatible(root, "IBM,CBEA") &&
186             !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
187                 return 0;
188
189         hpte_init_native();
190
191         return 1;
192 }
193
194 /*
195  * Cell has no legacy IO; anything calling this function has to
196  * fail or bad things will happen
197  */
198 static int cell_check_legacy_ioport(unsigned int baseport)
199 {
200         return -ENODEV;
201 }
202
203 define_machine(cell) {
204         .name                   = "Cell",
205         .probe                  = cell_probe,
206         .setup_arch             = cell_setup_arch,
207         .init_early             = cell_init_early,
208         .show_cpuinfo           = cell_show_cpuinfo,
209         .restart                = rtas_restart,
210         .power_off              = rtas_power_off,
211         .halt                   = rtas_halt,
212         .get_boot_time          = rtas_get_boot_time,
213         .get_rtc_time           = rtas_get_rtc_time,
214         .set_rtc_time           = rtas_set_rtc_time,
215         .calibrate_decr         = generic_calibrate_decr,
216         .check_legacy_ioport    = cell_check_legacy_ioport,
217         .progress               = cell_progress,
218         .init_IRQ               = cell_init_irq,
219 #ifdef CONFIG_KEXEC
220         .machine_kexec          = default_machine_kexec,
221         .machine_kexec_prepare  = default_machine_kexec_prepare,
222         .machine_crash_shutdown = default_machine_crash_shutdown,
223 #endif
224 };