2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@samba.org)
14 * This file handles the architecture-dependent parts of hardware exceptions
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
21 #include <linux/stddef.h>
22 #include <linux/unistd.h>
23 #include <linux/ptrace.h>
24 #include <linux/slab.h>
25 #include <linux/user.h>
26 #include <linux/a.out.h>
27 #include <linux/interrupt.h>
28 #include <linux/init.h>
29 #include <linux/module.h>
30 #include <linux/prctl.h>
31 #include <linux/delay.h>
32 #include <linux/kprobes.h>
33 #include <linux/kexec.h>
34 #include <linux/backlight.h>
36 #include <asm/kdebug.h>
37 #include <asm/pgtable.h>
38 #include <asm/uaccess.h>
39 #include <asm/system.h>
41 #include <asm/machdep.h>
47 #ifdef CONFIG_PMAC_BACKLIGHT
48 #include <asm/backlight.h>
51 #include <asm/firmware.h>
52 #include <asm/processor.h>
54 #include <asm/kexec.h>
56 #ifdef CONFIG_PPC64 /* XXX */
57 #define _IO_BASE pci_io_base
59 cpumask_t cpus_in_sr = CPU_MASK_NONE;
63 #ifdef CONFIG_DEBUGGER
64 int (*__debugger)(struct pt_regs *regs);
65 int (*__debugger_ipi)(struct pt_regs *regs);
66 int (*__debugger_bpt)(struct pt_regs *regs);
67 int (*__debugger_sstep)(struct pt_regs *regs);
68 int (*__debugger_iabr_match)(struct pt_regs *regs);
69 int (*__debugger_dabr_match)(struct pt_regs *regs);
70 int (*__debugger_fault_handler)(struct pt_regs *regs);
72 EXPORT_SYMBOL(__debugger);
73 EXPORT_SYMBOL(__debugger_ipi);
74 EXPORT_SYMBOL(__debugger_bpt);
75 EXPORT_SYMBOL(__debugger_sstep);
76 EXPORT_SYMBOL(__debugger_iabr_match);
77 EXPORT_SYMBOL(__debugger_dabr_match);
78 EXPORT_SYMBOL(__debugger_fault_handler);
81 ATOMIC_NOTIFIER_HEAD(powerpc_die_chain);
83 int register_die_notifier(struct notifier_block *nb)
85 return atomic_notifier_chain_register(&powerpc_die_chain, nb);
87 EXPORT_SYMBOL(register_die_notifier);
89 int unregister_die_notifier(struct notifier_block *nb)
91 return atomic_notifier_chain_unregister(&powerpc_die_chain, nb);
93 EXPORT_SYMBOL(unregister_die_notifier);
96 * Trap & Exception support
99 static DEFINE_SPINLOCK(die_lock);
101 int die(const char *str, struct pt_regs *regs, long err)
103 static int die_counter;
109 spin_lock_irq(&die_lock);
111 #ifdef CONFIG_PMAC_BACKLIGHT
112 mutex_lock(&pmac_backlight_mutex);
113 if (machine_is(powermac) && pmac_backlight) {
114 struct backlight_properties *props;
116 down(&pmac_backlight->sem);
117 props = pmac_backlight->props;
118 props->brightness = props->max_brightness;
119 props->power = FB_BLANK_UNBLANK;
120 props->update_status(pmac_backlight);
121 up(&pmac_backlight->sem);
123 mutex_unlock(&pmac_backlight_mutex);
125 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
126 #ifdef CONFIG_PREEMPT
130 printk("SMP NR_CPUS=%d ", NR_CPUS);
132 #ifdef CONFIG_DEBUG_PAGEALLOC
133 printk("DEBUG_PAGEALLOC ");
138 printk("%s\n", ppc_md.name ? "" : ppc_md.name);
143 spin_unlock_irq(&die_lock);
145 if (kexec_should_crash(current) ||
146 kexec_sr_activated(smp_processor_id()))
148 crash_kexec_secondary(regs);
151 panic("Fatal exception in interrupt");
155 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
158 panic("Fatal exception");
165 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
169 if (!user_mode(regs)) {
170 if (die("Exception in kernel mode", regs, signr))
174 memset(&info, 0, sizeof(info));
175 info.si_signo = signr;
177 info.si_addr = (void __user *) addr;
178 force_sig_info(signr, &info, current);
181 * Init gets no signals that it doesn't have a handler for.
182 * That's all very well, but if it has caused a synchronous
183 * exception and we ignore the resulting signal, it will just
184 * generate the same exception over and over again and we get
185 * nowhere. Better to kill it and let the kernel panic.
187 if (current->pid == 1) {
188 __sighandler_t handler;
190 spin_lock_irq(¤t->sighand->siglock);
191 handler = current->sighand->action[signr-1].sa.sa_handler;
192 spin_unlock_irq(¤t->sighand->siglock);
193 if (handler == SIG_DFL) {
194 /* init has generated a synchronous exception
195 and it doesn't have a handler for the signal */
196 printk(KERN_CRIT "init has generated signal %d "
197 "but has no handler for it\n", signr);
204 void system_reset_exception(struct pt_regs *regs)
206 /* See if any machine dependent calls */
207 if (ppc_md.system_reset_exception) {
208 if (ppc_md.system_reset_exception(regs))
213 cpu_set(smp_processor_id(), cpus_in_sr);
216 die("System Reset", regs, SIGABRT);
218 /* Must die if the interrupt is not recoverable */
219 if (!(regs->msr & MSR_RI))
220 panic("Unrecoverable System Reset");
222 /* What should we do here? We could issue a shutdown or hard reset. */
227 * I/O accesses can cause machine checks on powermacs.
228 * Check if the NIP corresponds to the address of a sync
229 * instruction for which there is an entry in the exception
231 * Note that the 601 only takes a machine check on TEA
232 * (transfer error ack) signal assertion, and does not
233 * set any of the top 16 bits of SRR1.
236 static inline int check_io_access(struct pt_regs *regs)
238 #if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)
239 unsigned long msr = regs->msr;
240 const struct exception_table_entry *entry;
241 unsigned int *nip = (unsigned int *)regs->nip;
243 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
244 && (entry = search_exception_tables(regs->nip)) != NULL) {
246 * Check that it's a sync instruction, or somewhere
247 * in the twi; isync; nop sequence that inb/inw/inl uses.
248 * As the address is in the exception table
249 * we should be able to read the instr there.
250 * For the debug message, we look at the preceding
253 if (*nip == 0x60000000) /* nop */
255 else if (*nip == 0x4c00012c) /* isync */
257 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
262 rb = (*nip >> 11) & 0x1f;
263 printk(KERN_DEBUG "%s bad port %lx at %p\n",
264 (*nip & 0x100)? "OUT to": "IN from",
265 regs->gpr[rb] - _IO_BASE, nip);
267 regs->nip = entry->fixup;
271 #endif /* CONFIG_PPC_PMAC && CONFIG_PPC32 */
275 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
276 /* On 4xx, the reason for the machine check or program exception
278 #define get_reason(regs) ((regs)->dsisr)
279 #ifndef CONFIG_FSL_BOOKE
280 #define get_mc_reason(regs) ((regs)->dsisr)
282 #define get_mc_reason(regs) (mfspr(SPRN_MCSR))
284 #define REASON_FP ESR_FP
285 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
286 #define REASON_PRIVILEGED ESR_PPR
287 #define REASON_TRAP ESR_PTR
289 /* single-step stuff */
290 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
291 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
294 /* On non-4xx, the reason for the machine check or program
295 exception is in the MSR. */
296 #define get_reason(regs) ((regs)->msr)
297 #define get_mc_reason(regs) ((regs)->msr)
298 #define REASON_FP 0x100000
299 #define REASON_ILLEGAL 0x80000
300 #define REASON_PRIVILEGED 0x40000
301 #define REASON_TRAP 0x20000
303 #define single_stepping(regs) ((regs)->msr & MSR_SE)
304 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
308 * This is "fall-back" implementation for configurations
309 * which don't provide platform-specific machine check info
311 void __attribute__ ((weak))
312 platform_machine_check(struct pt_regs *regs)
316 void machine_check_exception(struct pt_regs *regs)
319 unsigned long reason = get_mc_reason(regs);
321 /* See if any machine dependent calls */
322 if (ppc_md.machine_check_exception)
323 recover = ppc_md.machine_check_exception(regs);
328 if (user_mode(regs)) {
330 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
334 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
335 /* the qspan pci read routines can cause machine checks -- Cort */
336 bad_page_fault(regs, regs->dar, SIGBUS);
340 if (debugger_fault_handler(regs)) {
345 if (check_io_access(regs))
348 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
349 if (reason & ESR_IMCP) {
350 printk("Instruction");
351 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
354 printk(" machine check in kernel mode.\n");
355 #elif defined(CONFIG_440A)
356 printk("Machine check in kernel mode.\n");
357 if (reason & ESR_IMCP){
358 printk("Instruction Synchronous Machine Check exception\n");
359 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
362 u32 mcsr = mfspr(SPRN_MCSR);
364 printk("Instruction Read PLB Error\n");
366 printk("Data Read PLB Error\n");
368 printk("Data Write PLB Error\n");
369 if (mcsr & MCSR_TLBP)
370 printk("TLB Parity Error\n");
371 if (mcsr & MCSR_ICP){
372 flush_instruction_cache();
373 printk("I-Cache Parity Error\n");
375 if (mcsr & MCSR_DCSP)
376 printk("D-Cache Search Parity Error\n");
377 if (mcsr & MCSR_DCFP)
378 printk("D-Cache Flush Parity Error\n");
379 if (mcsr & MCSR_IMPE)
380 printk("Machine Check exception is imprecise\n");
383 mtspr(SPRN_MCSR, mcsr);
385 #elif defined (CONFIG_E500)
386 printk("Machine check in kernel mode.\n");
387 printk("Caused by (from MCSR=%lx): ", reason);
389 if (reason & MCSR_MCP)
390 printk("Machine Check Signal\n");
391 if (reason & MCSR_ICPERR)
392 printk("Instruction Cache Parity Error\n");
393 if (reason & MCSR_DCP_PERR)
394 printk("Data Cache Push Parity Error\n");
395 if (reason & MCSR_DCPERR)
396 printk("Data Cache Parity Error\n");
397 if (reason & MCSR_GL_CI)
398 printk("Guarded Load or Cache-Inhibited stwcx.\n");
399 if (reason & MCSR_BUS_IAERR)
400 printk("Bus - Instruction Address Error\n");
401 if (reason & MCSR_BUS_RAERR)
402 printk("Bus - Read Address Error\n");
403 if (reason & MCSR_BUS_WAERR)
404 printk("Bus - Write Address Error\n");
405 if (reason & MCSR_BUS_IBERR)
406 printk("Bus - Instruction Data Error\n");
407 if (reason & MCSR_BUS_RBERR)
408 printk("Bus - Read Data Bus Error\n");
409 if (reason & MCSR_BUS_WBERR)
410 printk("Bus - Read Data Bus Error\n");
411 if (reason & MCSR_BUS_IPERR)
412 printk("Bus - Instruction Parity Error\n");
413 if (reason & MCSR_BUS_RPERR)
414 printk("Bus - Read Parity Error\n");
415 #elif defined (CONFIG_E200)
416 printk("Machine check in kernel mode.\n");
417 printk("Caused by (from MCSR=%lx): ", reason);
419 if (reason & MCSR_MCP)
420 printk("Machine Check Signal\n");
421 if (reason & MCSR_CP_PERR)
422 printk("Cache Push Parity Error\n");
423 if (reason & MCSR_CPERR)
424 printk("Cache Parity Error\n");
425 if (reason & MCSR_EXCP_ERR)
426 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
427 if (reason & MCSR_BUS_IRERR)
428 printk("Bus - Read Bus Error on instruction fetch\n");
429 if (reason & MCSR_BUS_DRERR)
430 printk("Bus - Read Bus Error on data load\n");
431 if (reason & MCSR_BUS_WRERR)
432 printk("Bus - Write Bus Error on buffered store or cache line push\n");
433 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */
434 printk("Machine check in kernel mode.\n");
435 printk("Caused by (from SRR1=%lx): ", reason);
436 switch (reason & 0x601F0000) {
438 printk("Machine check signal\n");
440 case 0: /* for 601 */
442 case 0x140000: /* 7450 MSS error and TEA */
443 printk("Transfer error ack signal\n");
446 printk("Data parity error signal\n");
449 printk("Address parity error signal\n");
452 printk("L1 Data Cache error\n");
455 printk("L1 Instruction Cache error\n");
458 printk("L2 data cache parity error\n");
461 printk("Unknown values in msr\n");
463 #endif /* CONFIG_4xx */
466 * Optional platform-provided routine to print out
467 * additional info, e.g. bus error registers.
469 platform_machine_check(regs);
471 if (debugger_fault_handler(regs))
473 die("Machine check", regs, SIGBUS);
475 /* Must die if the interrupt is not recoverable */
476 if (!(regs->msr & MSR_RI))
477 panic("Unrecoverable Machine check");
480 void SMIException(struct pt_regs *regs)
482 die("System Management Interrupt", regs, SIGABRT);
485 void unknown_exception(struct pt_regs *regs)
487 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
488 regs->nip, regs->msr, regs->trap);
490 _exception(SIGTRAP, regs, 0, 0);
493 void instruction_breakpoint_exception(struct pt_regs *regs)
495 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
496 5, SIGTRAP) == NOTIFY_STOP)
498 if (debugger_iabr_match(regs))
500 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
503 void RunModeException(struct pt_regs *regs)
505 _exception(SIGTRAP, regs, 0, 0);
508 void __kprobes single_step_exception(struct pt_regs *regs)
510 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
512 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
513 5, SIGTRAP) == NOTIFY_STOP)
515 if (debugger_sstep(regs))
518 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
522 * After we have successfully emulated an instruction, we have to
523 * check if the instruction was being single-stepped, and if so,
524 * pretend we got a single-step exception. This was pointed out
525 * by Kumar Gala. -- paulus
527 static void emulate_single_step(struct pt_regs *regs)
529 if (single_stepping(regs)) {
530 clear_single_step(regs);
531 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
535 static void parse_fpe(struct pt_regs *regs)
540 flush_fp_to_thread(current);
542 fpscr = current->thread.fpscr.val;
544 /* Invalid operation */
545 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
549 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
553 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
557 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
561 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
564 _exception(SIGFPE, regs, code, regs->nip);
568 * Illegal instruction emulation support. Originally written to
569 * provide the PVR to user applications using the mfspr rd, PVR.
570 * Return non-zero if we can't emulate, or -EFAULT if the associated
571 * memory access caused an access fault. Return zero on success.
573 * There are a couple of ways to do this, either "decode" the instruction
574 * or directly match lots of bits. In this case, matching lots of
575 * bits is faster and easier.
578 #define INST_MFSPR_PVR 0x7c1f42a6
579 #define INST_MFSPR_PVR_MASK 0xfc1fffff
581 #define INST_DCBA 0x7c0005ec
582 #define INST_DCBA_MASK 0x7c0007fe
584 #define INST_MCRXR 0x7c000400
585 #define INST_MCRXR_MASK 0x7c0007fe
587 #define INST_STRING 0x7c00042a
588 #define INST_STRING_MASK 0x7c0007fe
589 #define INST_STRING_GEN_MASK 0x7c00067e
590 #define INST_LSWI 0x7c0004aa
591 #define INST_LSWX 0x7c00042a
592 #define INST_STSWI 0x7c0005aa
593 #define INST_STSWX 0x7c00052a
595 static int emulate_string_inst(struct pt_regs *regs, u32 instword)
597 u8 rT = (instword >> 21) & 0x1f;
598 u8 rA = (instword >> 16) & 0x1f;
599 u8 NB_RB = (instword >> 11) & 0x1f;
604 /* Early out if we are an invalid form of lswx */
605 if ((instword & INST_STRING_MASK) == INST_LSWX)
606 if ((rT == rA) || (rT == NB_RB))
609 EA = (rA == 0) ? 0 : regs->gpr[rA];
611 switch (instword & INST_STRING_MASK) {
615 num_bytes = regs->xer & 0x7f;
619 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
625 while (num_bytes != 0)
628 u32 shift = 8 * (3 - (pos & 0x3));
630 switch ((instword & INST_STRING_MASK)) {
633 if (get_user(val, (u8 __user *)EA))
635 /* first time updating this reg,
639 regs->gpr[rT] |= val << shift;
643 val = regs->gpr[rT] >> shift;
644 if (put_user(val, (u8 __user *)EA))
648 /* move EA to next address */
652 /* manage our position within the register */
663 static int emulate_instruction(struct pt_regs *regs)
668 if (!user_mode(regs) || (regs->msr & MSR_LE))
670 CHECK_FULL_REGS(regs);
672 if (get_user(instword, (u32 __user *)(regs->nip)))
675 /* Emulate the mfspr rD, PVR. */
676 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
677 rd = (instword >> 21) & 0x1f;
678 regs->gpr[rd] = mfspr(SPRN_PVR);
682 /* Emulating the dcba insn is just a no-op. */
683 if ((instword & INST_DCBA_MASK) == INST_DCBA)
686 /* Emulate the mcrxr insn. */
687 if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
688 int shift = (instword >> 21) & 0x1c;
689 unsigned long msk = 0xf0000000UL >> shift;
691 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
692 regs->xer &= ~0xf0000000UL;
696 /* Emulate load/store string insn. */
697 if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
698 return emulate_string_inst(regs, instword);
704 * Look through the list of trap instructions that are used for BUG(),
705 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know
706 * that the exception was caused by a trap instruction of some kind.
707 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
710 extern struct bug_entry __start___bug_table[], __stop___bug_table[];
712 #ifndef CONFIG_MODULES
713 #define module_find_bug(x) NULL
716 struct bug_entry *find_bug(unsigned long bugaddr)
718 struct bug_entry *bug;
720 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
721 if (bugaddr == bug->bug_addr)
723 return module_find_bug(bugaddr);
726 static int check_bug_trap(struct pt_regs *regs)
728 struct bug_entry *bug;
731 if (regs->msr & MSR_PR)
732 return 0; /* not in kernel */
733 addr = regs->nip; /* address of trap instruction */
734 if (addr < PAGE_OFFSET)
736 bug = find_bug(regs->nip);
739 if (bug->line & BUG_WARNING_TRAP) {
740 /* this is a WARN_ON rather than BUG/BUG_ON */
741 printk(KERN_ERR "Badness in %s at %s:%ld\n",
742 bug->function, bug->file,
743 bug->line & ~BUG_WARNING_TRAP);
747 printk(KERN_CRIT "kernel BUG in %s at %s:%ld!\n",
748 bug->function, bug->file, bug->line);
753 void __kprobes program_check_exception(struct pt_regs *regs)
755 unsigned int reason = get_reason(regs);
756 extern int do_mathemu(struct pt_regs *regs);
758 #ifdef CONFIG_MATH_EMULATION
759 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
760 * but there seems to be a hardware bug on the 405GP (RevD)
761 * that means ESR is sometimes set incorrectly - either to
762 * ESR_DST (!?) or 0. In the process of chasing this with the
763 * hardware people - not sure if it can happen on any illegal
764 * instruction or only on FP instructions, whether there is a
765 * pattern to occurences etc. -dgibson 31/Mar/2003 */
766 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
767 emulate_single_step(regs);
770 #endif /* CONFIG_MATH_EMULATION */
772 if (reason & REASON_FP) {
773 /* IEEE FP exception */
777 if (reason & REASON_TRAP) {
779 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
782 if (debugger_bpt(regs))
784 if (check_bug_trap(regs)) {
788 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
794 /* Try to emulate it if we should. */
795 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
796 switch (emulate_instruction(regs)) {
799 emulate_single_step(regs);
802 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
807 if (reason & REASON_PRIVILEGED)
808 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
810 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
813 void alignment_exception(struct pt_regs *regs)
817 /* we don't implement logging of alignment exceptions */
818 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
819 fixed = fix_alignment(regs);
822 regs->nip += 4; /* skip over emulated instruction */
823 emulate_single_step(regs);
827 /* Operand address was bad */
828 if (fixed == -EFAULT) {
830 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
832 /* Search exception table */
833 bad_page_fault(regs, regs->dar, SIGSEGV);
836 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
839 void StackOverflow(struct pt_regs *regs)
841 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
842 current, regs->gpr[1]);
845 panic("kernel stack overflow");
848 void nonrecoverable_exception(struct pt_regs *regs)
850 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
851 regs->nip, regs->msr);
853 die("nonrecoverable exception", regs, SIGKILL);
856 void trace_syscall(struct pt_regs *regs)
858 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
859 current, current->pid, regs->nip, regs->link, regs->gpr[0],
860 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
863 void kernel_fp_unavailable_exception(struct pt_regs *regs)
865 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
866 "%lx at %lx\n", regs->trap, regs->nip);
867 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
870 void altivec_unavailable_exception(struct pt_regs *regs)
872 #if !defined(CONFIG_ALTIVEC)
873 if (user_mode(regs)) {
874 /* A user program has executed an altivec instruction,
875 but this kernel doesn't support altivec. */
876 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
880 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
881 "%lx at %lx\n", regs->trap, regs->nip);
882 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
885 void performance_monitor_exception(struct pt_regs *regs)
891 void SoftwareEmulation(struct pt_regs *regs)
893 extern int do_mathemu(struct pt_regs *);
894 extern int Soft_emulate_8xx(struct pt_regs *);
897 CHECK_FULL_REGS(regs);
899 if (!user_mode(regs)) {
901 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
904 #ifdef CONFIG_MATH_EMULATION
905 errcode = do_mathemu(regs);
907 errcode = Soft_emulate_8xx(regs);
911 _exception(SIGFPE, regs, 0, 0);
912 else if (errcode == -EFAULT)
913 _exception(SIGSEGV, regs, 0, 0);
915 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
917 emulate_single_step(regs);
919 #endif /* CONFIG_8xx */
921 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
923 void DebugException(struct pt_regs *regs, unsigned long debug_status)
925 if (debug_status & DBSR_IC) { /* instruction completion */
926 regs->msr &= ~MSR_DE;
927 if (user_mode(regs)) {
928 current->thread.dbcr0 &= ~DBCR0_IC;
930 /* Disable instruction completion */
931 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
932 /* Clear the instruction completion event */
933 mtspr(SPRN_DBSR, DBSR_IC);
934 if (debugger_sstep(regs))
937 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
940 #endif /* CONFIG_4xx || CONFIG_BOOKE */
942 #if !defined(CONFIG_TAU_INT)
943 void TAUException(struct pt_regs *regs)
945 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
946 regs->nip, regs->msr, regs->trap, print_tainted());
948 #endif /* CONFIG_INT_TAU */
950 #ifdef CONFIG_ALTIVEC
951 void altivec_assist_exception(struct pt_regs *regs)
955 if (!user_mode(regs)) {
956 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
957 " at %lx\n", regs->nip);
958 die("Kernel VMX/Altivec assist exception", regs, SIGILL);
961 flush_altivec_to_thread(current);
963 err = emulate_altivec(regs);
965 regs->nip += 4; /* skip emulated instruction */
966 emulate_single_step(regs);
970 if (err == -EFAULT) {
971 /* got an error reading the instruction */
972 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
974 /* didn't recognize the instruction */
975 /* XXX quick hack for now: set the non-Java bit in the VSCR */
976 if (printk_ratelimit())
977 printk(KERN_ERR "Unrecognized altivec instruction "
978 "in %s at %lx\n", current->comm, regs->nip);
979 current->thread.vscr.u[3] |= 0x10000;
982 #endif /* CONFIG_ALTIVEC */
984 #ifdef CONFIG_FSL_BOOKE
985 void CacheLockingException(struct pt_regs *regs, unsigned long address,
986 unsigned long error_code)
988 /* We treat cache locking instructions from the user
989 * as priv ops, in the future we could try to do
992 if (error_code & (ESR_DLK|ESR_ILK))
993 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
996 #endif /* CONFIG_FSL_BOOKE */
999 void SPEFloatingPointException(struct pt_regs *regs)
1001 unsigned long spefscr;
1005 spefscr = current->thread.spefscr;
1006 fpexc_mode = current->thread.fpexc_mode;
1008 /* Hardware does not neccessarily set sticky
1009 * underflow/overflow/invalid flags */
1010 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
1012 spefscr |= SPEFSCR_FOVFS;
1014 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
1016 spefscr |= SPEFSCR_FUNFS;
1018 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
1020 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
1022 spefscr |= SPEFSCR_FINVS;
1024 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
1027 current->thread.spefscr = spefscr;
1029 _exception(SIGFPE, regs, code, regs->nip);
1035 * We enter here if we get an unrecoverable exception, that is, one
1036 * that happened at a point where the RI (recoverable interrupt) bit
1037 * in the MSR is 0. This indicates that SRR0/1 are live, and that
1038 * we therefore lost state by taking this exception.
1040 void unrecoverable_exception(struct pt_regs *regs)
1042 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
1043 regs->trap, regs->nip);
1044 die("Unrecoverable exception", regs, SIGABRT);
1047 #ifdef CONFIG_BOOKE_WDT
1049 * Default handler for a Watchdog exception,
1050 * spins until a reboot occurs
1052 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
1054 /* Generic WatchdogHandler, implement your own */
1055 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
1059 void WatchdogException(struct pt_regs *regs)
1061 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
1062 WatchdogHandler(regs);
1067 * We enter here if we discover during exception entry that we are
1068 * running in supervisor mode with a userspace value in the stack pointer.
1070 void kernel_bad_stack(struct pt_regs *regs)
1072 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
1073 regs->gpr[1], regs->nip);
1074 die("Bad kernel stack pointer", regs, SIGABRT);
1077 void __init trap_init(void)