2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
4 * Rewrite, cleanup, new allocation schemes, virtual merging:
5 * Copyright (C) 2004 Olof Johansson, IBM Corporation
6 * and Ben. Herrenschmidt, IBM Corporation
8 * Dynamic DMA mapping support, bus-independent parts.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/slab.h>
30 #include <linux/spinlock.h>
31 #include <linux/string.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/init.h>
34 #include <linux/bitops.h>
37 #include <asm/iommu.h>
38 #include <asm/pci-bridge.h>
39 #include <asm/machdep.h>
40 #include <asm/kdump.h>
44 #ifdef CONFIG_IOMMU_VMERGE
45 static int novmerge = 0;
47 static int novmerge = 1;
50 static inline unsigned long iommu_num_pages(unsigned long vaddr,
55 npages = IOMMU_PAGE_ALIGN(vaddr + slen) - (vaddr & IOMMU_PAGE_MASK);
56 npages >>= IOMMU_PAGE_SHIFT;
61 static int __init setup_iommu(char *str)
63 if (!strcmp(str, "novmerge"))
65 else if (!strcmp(str, "vmerge"))
70 __setup("iommu=", setup_iommu);
72 static unsigned long iommu_range_alloc(struct iommu_table *tbl,
74 unsigned long *handle,
76 unsigned int align_order)
78 unsigned long n, end, i, start;
79 unsigned long start_addr, end_addr;
81 int largealloc = npages > 15;
83 unsigned long align_mask;
85 align_mask = 0xffffffffffffffffl >> (64 - align_order);
87 /* This allocator was derived from x86_64's bit string search */
90 if (unlikely(npages == 0)) {
91 if (printk_ratelimit())
93 return DMA_ERROR_CODE;
96 if (handle && *handle)
99 start = largealloc ? tbl->it_largehint : tbl->it_hint;
101 /* Use only half of the table for small allocs (15 pages or less) */
102 limit = largealloc ? tbl->it_size : tbl->it_halfpoint;
104 if (largealloc && start < tbl->it_halfpoint)
105 start = tbl->it_halfpoint;
107 /* The case below can happen if we have a small segment appended
108 * to a large, or when the previous alloc was at the very end of
109 * the available space. If so, go back to the initial start.
112 start = largealloc ? tbl->it_largehint : tbl->it_hint;
116 if (limit + tbl->it_offset > mask) {
117 limit = mask - tbl->it_offset + 1;
118 /* If we're constrained on address range, first try
119 * at the masked hint to avoid O(n) search complexity,
120 * but on second pass, start at 0.
122 if ((start & mask) >= limit || pass > 0)
128 n = find_next_zero_bit(tbl->it_map, limit, start);
130 /* Align allocation */
131 n = (n + align_mask) & ~align_mask;
135 if (unlikely(end >= limit)) {
136 if (likely(pass < 2)) {
137 /* First failure, just rescan the half of the table.
138 * Second failure, rescan the other half of the table.
140 start = (largealloc ^ pass) ? tbl->it_halfpoint : 0;
141 limit = pass ? tbl->it_size : limit;
145 /* Third failure, give up */
146 return DMA_ERROR_CODE;
150 /* DMA cannot cross 4 GB boundary */
151 start_addr = (n + tbl->it_offset) << PAGE_SHIFT;
152 end_addr = (end + tbl->it_offset) << PAGE_SHIFT;
153 if ((start_addr >> 32) != (end_addr >> 32)) {
154 end_addr &= 0xffffffff00000000l;
155 start = (end_addr >> PAGE_SHIFT) - tbl->it_offset;
159 for (i = n; i < end; i++)
160 if (test_bit(i, tbl->it_map)) {
165 for (i = n; i < end; i++)
166 __set_bit(i, tbl->it_map);
168 /* Bump the hint to a new block for small allocs. */
170 /* Don't bump to new block to avoid fragmentation */
171 tbl->it_largehint = end;
173 /* Overflow will be taken care of at the next allocation */
174 tbl->it_hint = (end + tbl->it_blocksize - 1) &
175 ~(tbl->it_blocksize - 1);
178 /* Update handle for SG allocations */
185 static dma_addr_t iommu_alloc(struct iommu_table *tbl, void *page,
186 unsigned int npages, enum dma_data_direction direction,
187 unsigned long mask, unsigned int align_order)
189 unsigned long entry, flags;
190 dma_addr_t ret = DMA_ERROR_CODE;
192 spin_lock_irqsave(&(tbl->it_lock), flags);
194 entry = iommu_range_alloc(tbl, npages, NULL, mask, align_order);
196 if (unlikely(entry == DMA_ERROR_CODE)) {
197 spin_unlock_irqrestore(&(tbl->it_lock), flags);
198 return DMA_ERROR_CODE;
201 entry += tbl->it_offset; /* Offset into real TCE table */
202 ret = entry << IOMMU_PAGE_SHIFT; /* Set the return dma address */
204 /* Put the TCEs in the HW table */
205 ppc_md.tce_build(tbl, entry, npages, (unsigned long)page & IOMMU_PAGE_MASK,
209 /* Flush/invalidate TLB caches if necessary */
210 if (ppc_md.tce_flush)
211 ppc_md.tce_flush(tbl);
213 spin_unlock_irqrestore(&(tbl->it_lock), flags);
215 /* Make sure updates are seen by hardware */
221 static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
224 unsigned long entry, free_entry;
227 entry = dma_addr >> IOMMU_PAGE_SHIFT;
228 free_entry = entry - tbl->it_offset;
230 if (((free_entry + npages) > tbl->it_size) ||
231 (entry < tbl->it_offset)) {
232 if (printk_ratelimit()) {
233 printk(KERN_INFO "iommu_free: invalid entry\n");
234 printk(KERN_INFO "\tentry = 0x%lx\n", entry);
235 printk(KERN_INFO "\tdma_addr = 0x%lx\n", (u64)dma_addr);
236 printk(KERN_INFO "\tTable = 0x%lx\n", (u64)tbl);
237 printk(KERN_INFO "\tbus# = 0x%lx\n", (u64)tbl->it_busno);
238 printk(KERN_INFO "\tsize = 0x%lx\n", (u64)tbl->it_size);
239 printk(KERN_INFO "\tstartOff = 0x%lx\n", (u64)tbl->it_offset);
240 printk(KERN_INFO "\tindex = 0x%lx\n", (u64)tbl->it_index);
246 ppc_md.tce_free(tbl, entry, npages);
248 for (i = 0; i < npages; i++)
249 __clear_bit(free_entry+i, tbl->it_map);
252 static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
257 spin_lock_irqsave(&(tbl->it_lock), flags);
259 __iommu_free(tbl, dma_addr, npages);
261 /* Make sure TLB cache is flushed if the HW needs it. We do
262 * not do an mb() here on purpose, it is not needed on any of
263 * the current platforms.
265 if (ppc_md.tce_flush)
266 ppc_md.tce_flush(tbl);
268 spin_unlock_irqrestore(&(tbl->it_lock), flags);
271 int iommu_map_sg(struct iommu_table *tbl, struct scatterlist *sglist,
272 int nelems, unsigned long mask,
273 enum dma_data_direction direction)
275 dma_addr_t dma_next = 0, dma_addr;
277 struct scatterlist *s, *outs, *segstart;
278 int outcount, incount;
279 unsigned long handle;
281 BUG_ON(direction == DMA_NONE);
283 if ((nelems == 0) || !tbl)
286 outs = s = segstart = &sglist[0];
291 /* Init first segment length for backout at failure */
292 outs->dma_length = 0;
294 DBG("sg mapping %d elements:\n", nelems);
296 spin_lock_irqsave(&(tbl->it_lock), flags);
298 for (s = outs; nelems; nelems--, s++) {
299 unsigned long vaddr, npages, entry, slen;
307 /* Allocate iommu entries for that segment */
308 vaddr = (unsigned long)page_address(s->page) + s->offset;
309 npages = iommu_num_pages(vaddr, slen);
310 entry = iommu_range_alloc(tbl, npages, &handle, mask >> IOMMU_PAGE_SHIFT, 0);
312 DBG(" - vaddr: %lx, size: %lx\n", vaddr, slen);
315 if (unlikely(entry == DMA_ERROR_CODE)) {
316 if (printk_ratelimit())
317 printk(KERN_INFO "iommu_alloc failed, tbl %p vaddr %lx"
318 " npages %lx\n", tbl, vaddr, npages);
322 /* Convert entry to a dma_addr_t */
323 entry += tbl->it_offset;
324 dma_addr = entry << IOMMU_PAGE_SHIFT;
325 dma_addr |= (s->offset & ~IOMMU_PAGE_MASK);
327 DBG(" - %lu pages, entry: %lx, dma_addr: %lx\n",
328 npages, entry, dma_addr);
330 /* Insert into HW table */
331 ppc_md.tce_build(tbl, entry, npages, vaddr & IOMMU_PAGE_MASK, direction);
333 /* If we are in an open segment, try merging */
335 DBG(" - trying merge...\n");
336 /* We cannot merge if:
337 * - allocated dma_addr isn't contiguous to previous allocation
339 if (novmerge || (dma_addr != dma_next)) {
340 /* Can't merge: create a new segment */
343 DBG(" can't merge, new segment.\n");
345 outs->dma_length += s->length;
346 DBG(" merged, new len: %ux\n", outs->dma_length);
351 /* This is a new segment, fill entries */
352 DBG(" - filling new segment.\n");
353 outs->dma_address = dma_addr;
354 outs->dma_length = slen;
357 /* Calculate next page pointer for contiguous check */
358 dma_next = dma_addr + slen;
360 DBG(" - dma next is: %lx\n", dma_next);
363 /* Flush/invalidate TLB caches if necessary */
364 if (ppc_md.tce_flush)
365 ppc_md.tce_flush(tbl);
367 spin_unlock_irqrestore(&(tbl->it_lock), flags);
369 DBG("mapped %d elements:\n", outcount);
371 /* For the sake of iommu_unmap_sg, we clear out the length in the
372 * next entry of the sglist if we didn't fill the list completely
374 if (outcount < incount) {
376 outs->dma_address = DMA_ERROR_CODE;
377 outs->dma_length = 0;
380 /* Make sure updates are seen by hardware */
386 for (s = &sglist[0]; s <= outs; s++) {
387 if (s->dma_length != 0) {
388 unsigned long vaddr, npages;
390 vaddr = s->dma_address & IOMMU_PAGE_MASK;
391 npages = iommu_num_pages(s->dma_address, s->dma_length);
392 __iommu_free(tbl, vaddr, npages);
393 s->dma_address = DMA_ERROR_CODE;
397 spin_unlock_irqrestore(&(tbl->it_lock), flags);
402 void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
403 int nelems, enum dma_data_direction direction)
407 BUG_ON(direction == DMA_NONE);
412 spin_lock_irqsave(&(tbl->it_lock), flags);
416 dma_addr_t dma_handle = sglist->dma_address;
418 if (sglist->dma_length == 0)
420 npages = iommu_num_pages(dma_handle,sglist->dma_length);
421 __iommu_free(tbl, dma_handle, npages);
425 /* Flush/invalidate TLBs if necessary. As for iommu_free(), we
426 * do not do an mb() here, the affected platforms do not need it
429 if (ppc_md.tce_flush)
430 ppc_md.tce_flush(tbl);
432 spin_unlock_irqrestore(&(tbl->it_lock), flags);
436 * Build a iommu_table structure. This contains a bit map which
437 * is used to manage allocation of the tce space.
439 struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid)
442 static int welcomed = 0;
445 /* Set aside 1/4 of the table for large allocations. */
446 tbl->it_halfpoint = tbl->it_size * 3 / 4;
448 /* number of bytes needed for the bitmap */
449 sz = (tbl->it_size + 7) >> 3;
451 page = alloc_pages_node(nid, GFP_ATOMIC, get_order(sz));
453 panic("iommu_init_table: Can't allocate %ld bytes\n", sz);
454 tbl->it_map = page_address(page);
455 memset(tbl->it_map, 0, sz);
458 tbl->it_largehint = tbl->it_halfpoint;
459 spin_lock_init(&tbl->it_lock);
461 #ifdef CONFIG_CRASH_DUMP
462 if (ppc_md.tce_get) {
463 unsigned long index, tceval;
464 unsigned long tcecount = 0;
467 * Reserve the existing mappings left by the first kernel.
469 for (index = 0; index < tbl->it_size; index++) {
470 tceval = ppc_md.tce_get(tbl, index + tbl->it_offset);
472 * Freed TCE entry contains 0x7fffffffffffffff on JS20
474 if (tceval && (tceval != 0x7fffffffffffffffUL)) {
475 __set_bit(index, tbl->it_map);
479 if ((tbl->it_size - tcecount) < KDUMP_MIN_TCE_ENTRIES) {
480 printk(KERN_WARNING "TCE table is full; ");
481 printk(KERN_WARNING "freeing %d entries for the kdump boot\n",
482 KDUMP_MIN_TCE_ENTRIES);
483 for (index = tbl->it_size - KDUMP_MIN_TCE_ENTRIES;
484 index < tbl->it_size; index++)
485 __clear_bit(index, tbl->it_map);
489 /* Clear the hardware table in case firmware left allocations in it */
490 ppc_md.tce_free(tbl, tbl->it_offset, tbl->it_size);
494 printk(KERN_INFO "IOMMU table initialized, virtual merging %s\n",
495 novmerge ? "disabled" : "enabled");
502 void iommu_free_table(struct device_node *dn)
504 struct pci_dn *pdn = dn->data;
505 struct iommu_table *tbl = pdn->iommu_table;
506 unsigned long bitmap_sz, i;
509 if (!tbl || !tbl->it_map) {
510 printk(KERN_ERR "%s: expected TCE map for %s\n", __FUNCTION__,
515 /* verify that table contains no entries */
516 /* it_size is in entries, and we're examining 64 at a time */
517 for (i = 0; i < (tbl->it_size/64); i++) {
518 if (tbl->it_map[i] != 0) {
519 printk(KERN_WARNING "%s: Unexpected TCEs for %s\n",
520 __FUNCTION__, dn->full_name);
525 /* calculate bitmap size in bytes */
526 bitmap_sz = (tbl->it_size + 7) / 8;
529 order = get_order(bitmap_sz);
530 free_pages((unsigned long) tbl->it_map, order);
536 /* Creates TCEs for a user provided buffer. The user buffer must be
537 * contiguous real kernel storage (not vmalloc). The address of the buffer
538 * passed here is the kernel (virtual) address of the buffer. The buffer
539 * need not be page aligned, the dma_addr_t returned will point to the same
540 * byte within the page as vaddr.
542 dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr,
543 size_t size, unsigned long mask,
544 enum dma_data_direction direction)
546 dma_addr_t dma_handle = DMA_ERROR_CODE;
550 BUG_ON(direction == DMA_NONE);
552 uaddr = (unsigned long)vaddr;
553 npages = iommu_num_pages(uaddr, size);
556 dma_handle = iommu_alloc(tbl, vaddr, npages, direction,
557 mask >> IOMMU_PAGE_SHIFT, 0);
558 if (dma_handle == DMA_ERROR_CODE) {
559 if (printk_ratelimit()) {
560 printk(KERN_INFO "iommu_alloc failed, "
561 "tbl %p vaddr %p npages %d\n",
565 dma_handle |= (uaddr & ~IOMMU_PAGE_MASK);
571 void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
572 size_t size, enum dma_data_direction direction)
576 BUG_ON(direction == DMA_NONE);
579 npages = iommu_num_pages(dma_handle, size);
580 iommu_free(tbl, dma_handle, npages);
584 /* Allocates a contiguous real buffer and creates mappings over it.
585 * Returns the virtual address of the buffer and sets dma_handle
586 * to the dma address (mapping) of the first page.
588 void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size,
589 dma_addr_t *dma_handle, unsigned long mask, gfp_t flag, int node)
594 unsigned int nio_pages, io_order;
597 size = PAGE_ALIGN(size);
598 order = get_order(size);
601 * Client asked for way too much space. This is checked later
602 * anyway. It is easier to debug here for the drivers than in
605 if (order >= IOMAP_MAX_ORDER) {
606 printk("iommu_alloc_consistent size too large: 0x%lx\n", size);
613 /* Alloc enough pages (and possibly more) */
614 page = alloc_pages_node(node, flag, order);
617 ret = page_address(page);
618 memset(ret, 0, size);
620 /* Set up tces to cover the allocated range */
621 nio_pages = size >> IOMMU_PAGE_SHIFT;
622 io_order = get_iommu_order(size);
623 mapping = iommu_alloc(tbl, ret, nio_pages, DMA_BIDIRECTIONAL,
624 mask >> IOMMU_PAGE_SHIFT, io_order);
625 if (mapping == DMA_ERROR_CODE) {
626 free_pages((unsigned long)ret, order);
629 *dma_handle = mapping;
633 void iommu_free_coherent(struct iommu_table *tbl, size_t size,
634 void *vaddr, dma_addr_t dma_handle)
637 unsigned int nio_pages;
639 size = PAGE_ALIGN(size);
640 nio_pages = size >> IOMMU_PAGE_SHIFT;
641 iommu_free(tbl, dma_handle, nio_pages);
642 size = PAGE_ALIGN(size);
643 free_pages((unsigned long)vaddr, get_order(size));