3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
5 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
6 * Adapted for Power Macintosh by Paul Mackerras.
7 * Low-level exception handlers and MMU support
8 * rewritten by Paul Mackerras.
9 * Copyright (C) 1996 Paul Mackerras.
10 * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
12 * This file contains the system call entry code, context switch
13 * code, and exception/interrupt return code for PowerPC.
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
21 #include <linux/errno.h>
22 #include <asm/unistd.h>
23 #include <asm/processor.h>
26 #include <asm/thread_info.h>
27 #include <asm/ppc_asm.h>
28 #include <asm/asm-offsets.h>
29 #include <asm/cputable.h>
30 #include <asm/firmware.h>
32 #include <asm/ptrace.h>
33 #include <asm/irqflags.h>
34 #include <asm/ftrace.h>
41 .tc .sys_call_table[TC],.sys_call_table
43 /* This value is used to mark exception frames on the stack. */
45 .tc ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER
52 .globl system_call_common
56 addi r1,r1,-INT_FRAME_SIZE
65 ACCOUNT_CPU_USER_ENTRY(r10, r11)
91 addi r9,r1,STACK_FRAME_OVERHEAD
92 ld r11,exception_marker@toc(r2)
93 std r11,-16(r9) /* "regshere" marker */
94 #ifdef CONFIG_TRACE_IRQFLAGS
99 addi r9,r1,STACK_FRAME_OVERHEAD
101 #endif /* CONFIG_TRACE_IRQFLAGS */
103 stb r10,PACASOFTIRQEN(r13)
104 stb r10,PACAHARDIRQEN(r13)
106 #ifdef CONFIG_PPC_ISERIES
108 /* Hack for handling interrupts when soft-enabling on iSeries */
109 cmpdi cr1,r0,0x5555 /* syscall 0x5555 */
110 andi. r10,r12,MSR_PR /* from kernel */
111 crand 4*cr0+eq,4*cr1+eq,4*cr0+eq
113 b hardware_interrupt_entry
115 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
116 #endif /* CONFIG_PPC_ISERIES */
126 addi r9,r1,STACK_FRAME_OVERHEAD
128 clrrdi r11,r1,THREAD_SHIFT
130 andi. r11,r10,_TIF_SYSCALL_T_OR_A
132 syscall_dotrace_cont:
133 cmpldi 0,r0,NR_syscalls
136 system_call: /* label this so stack traces look sane */
138 * Need to vector to 32 Bit or default sys_call_table here,
139 * based on caller's run-mode / personality.
141 ld r11,.SYS_CALL_TABLE@toc(2)
142 andi. r10,r10,_TIF_32BIT
144 addi r11,r11,8 /* use 32-bit syscall entries */
153 ldx r10,r11,r0 /* Fetch system call handler [ptr] */
155 bctrl /* Call handler */
160 bl .do_show_syscall_exit
163 clrrdi r12,r1,THREAD_SHIFT
165 /* disable interrupts so current_thread_info()->flags can't change,
166 and so that we don't get interrupted after loading SRR0/1. */
176 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK)
177 bne- syscall_exit_work
183 stdcx. r0,0,r1 /* to clear the reservation */
187 * Clear RI before restoring r13. If we are returning to
188 * userspace and we take an exception after restoring r13,
189 * we end up corrupting the userspace r13 value.
193 mtmsrd r11,1 /* clear MSR.RI */
195 ACCOUNT_CPU_USER_EXIT(r11, r12)
196 ld r13,GPR13(r1) /* only restore r13 if returning to usermode */
204 b . /* prevent speculative execution */
207 oris r5,r5,0x1000 /* Set SO bit in CR */
212 /* Traced system call support */
215 addi r3,r1,STACK_FRAME_OVERHEAD
216 bl .do_syscall_trace_enter
217 ld r0,GPR0(r1) /* Restore original registers */
224 addi r9,r1,STACK_FRAME_OVERHEAD
225 clrrdi r10,r1,THREAD_SHIFT
227 b syscall_dotrace_cont
234 /* If TIF_RESTOREALL is set, don't scribble on either r3 or ccr.
235 If TIF_NOERROR is set, just save r3 as it is. */
237 andi. r0,r9,_TIF_RESTOREALL
241 0: cmpld r3,r11 /* r10 is -LAST_ERRNO */
243 andi. r0,r9,_TIF_NOERROR
247 oris r5,r5,0x1000 /* Set SO bit in CR */
250 2: andi. r0,r9,(_TIF_PERSYSCALL_MASK)
253 /* Clear per-syscall TIF flags if any are set. */
255 li r11,_TIF_PERSYSCALL_MASK
256 addi r12,r12,TI_FLAGS
261 subi r12,r12,TI_FLAGS
263 4: /* Anything else left to do? */
264 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
265 beq .ret_from_except_lite
267 /* Re-enable interrupts */
273 addi r3,r1,STACK_FRAME_OVERHEAD
274 bl .do_syscall_trace_leave
277 /* Save non-volatile GPRs, if not already saved. */
289 * The sigsuspend and rt_sigsuspend system calls can call do_signal
290 * and thus put the process into the stopped state where we might
291 * want to examine its user state with ptrace. Therefore we need
292 * to save all the nonvolatile registers (r14 - r31) before calling
293 * the C code. Similarly, fork, vfork and clone need the full
294 * register state on the stack so that it can be copied to the child.
312 _GLOBAL(ppc32_swapcontext)
314 bl .compat_sys_swapcontext
317 _GLOBAL(ppc64_swapcontext)
322 _GLOBAL(ret_from_fork)
329 * This routine switches between two different tasks. The process
330 * state of one is saved on its kernel stack. Then the state
331 * of the other is restored from its kernel stack. The memory
332 * management hardware is updated to the second process's state.
333 * Finally, we can return to the second process, via ret_from_except.
334 * On entry, r3 points to the THREAD for the current task, r4
335 * points to the THREAD for the new task.
337 * Note: there are two ways to get to the "going out" portion
338 * of this code; either by coming in via the entry (_switch)
339 * or via "fork" which must set up an environment equivalent
340 * to the "_switch" path. If you change this you'll have to change
341 * the fork code also.
343 * The code which creates the new task context is in 'copy_thread'
344 * in arch/powerpc/kernel/process.c
350 stdu r1,-SWITCH_FRAME_SIZE(r1)
351 /* r3-r13 are caller saved -- Cort */
354 mflr r20 /* Return to switch caller */
357 #ifdef CONFIG_ALTIVEC
359 oris r0,r0,MSR_VEC@h /* Disable altivec */
360 mfspr r24,SPRN_VRSAVE /* save vrsave register value */
361 std r24,THREAD_VRSAVE(r3)
362 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
363 #endif /* CONFIG_ALTIVEC */
372 std r1,KSP(r3) /* Set old stack pointer */
375 /* We need a sync somewhere here to make sure that if the
376 * previous task gets rescheduled on another CPU, it sees all
377 * stores it has performed on this one.
380 #endif /* CONFIG_SMP */
382 addi r6,r4,-THREAD /* Convert THREAD to 'current' */
383 std r6,PACACURRENT(r13) /* Set new 'current' */
385 ld r8,KSP(r4) /* new stack pointer */
388 END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
390 clrrdi r6,r8,28 /* get its ESID */
391 clrrdi r9,r1,28 /* get current sp ESID */
392 END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
394 clrrdi r6,r8,40 /* get its 1T ESID */
395 clrrdi r9,r1,40 /* get current sp 1T ESID */
396 END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
397 clrldi. r0,r6,2 /* is new ESID c00000000? */
398 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
400 beq 2f /* if yes, don't slbie it */
402 /* Bolt in the new stack SLB entry */
403 ld r7,KSP_VSID(r4) /* Get new stack's VSID */
404 oris r0,r6,(SLB_ESID_V)@h
405 ori r0,r0,(SLB_NUM_BOLTED-1)@l
407 li r9,MMU_SEGSIZE_1T /* insert B field */
408 oris r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
409 rldimi r7,r9,SLB_VSID_SSIZE_SHIFT,0
410 END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
412 /* Update the last bolted SLB. No write barriers are needed
413 * here, provided we only update the current CPU's SLB shadow
416 ld r9,PACA_SLBSHADOWPTR(r13)
418 std r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
419 std r7,SLBSHADOW_STACKVSID(r9) /* Save VSID */
420 std r0,SLBSHADOW_STACKESID(r9) /* Save ESID */
422 /* No need to check for CPU_FTR_NO_SLBIE_B here, since when
423 * we have 1TB segments, the only CPUs known to have the errata
424 * only support less than 1TB of system memory and we'll never
425 * actually hit this code path.
429 slbie r6 /* Workaround POWER5 < DD2.1 issue */
434 clrrdi r7,r8,THREAD_SHIFT /* base of new stack */
435 /* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
436 because we don't need to leave the 288-byte ABI gap at the
437 top of the kernel stack. */
438 addi r7,r7,THREAD_SIZE-SWITCH_FRAME_SIZE
440 mr r1,r8 /* start using new stack pointer */
441 std r7,PACAKSAVE(r13)
446 #ifdef CONFIG_ALTIVEC
448 ld r0,THREAD_VRSAVE(r4)
449 mtspr SPRN_VRSAVE,r0 /* if G4, restore VRSAVE reg */
450 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
451 #endif /* CONFIG_ALTIVEC */
453 /* r3-r13 are destroyed -- Cort */
457 /* convert old thread to its task_struct for return value */
459 ld r7,_NIP(r1) /* Return to _switch caller in new task */
461 addi r1,r1,SWITCH_FRAME_SIZE
465 _GLOBAL(ret_from_except)
468 bne .ret_from_except_lite
471 _GLOBAL(ret_from_except_lite)
473 * Disable interrupts so that current_thread_info()->flags
474 * can't change between when we test it and when we return
475 * from the interrupt.
477 mfmsr r10 /* Get current interrupt state */
478 rldicl r9,r10,48,1 /* clear MSR_EE */
480 mtmsrd r9,1 /* Update machine state */
482 #ifdef CONFIG_PREEMPT
483 clrrdi r9,r1,THREAD_SHIFT /* current_thread_info() */
484 li r0,_TIF_NEED_RESCHED /* bits to check */
487 /* Move MSR_PR bit in r3 to _TIF_SIGPENDING position in r0 */
488 rlwimi r0,r3,32+TIF_SIGPENDING-MSR_PR_LG,_TIF_SIGPENDING
489 and. r0,r4,r0 /* check NEED_RESCHED and maybe SIGPENDING */
492 #else /* !CONFIG_PREEMPT */
493 ld r3,_MSR(r1) /* Returning to user mode? */
495 beq restore /* if not, just restore regs and return */
497 /* Check current_thread_info()->flags */
498 clrrdi r9,r1,THREAD_SHIFT
500 andi. r0,r4,_TIF_USER_WORK_MASK
506 #ifdef CONFIG_PPC_ISERIES
510 /* Check for pending interrupts (iSeries) */
511 ld r3,PACALPPACAPTR(r13)
512 ld r3,LPPACAANYINT(r3)
514 beq+ 4f /* skip do_IRQ if no interrupts */
517 stb r3,PACASOFTIRQEN(r13) /* ensure we are soft-disabled */
518 #ifdef CONFIG_TRACE_IRQFLAGS
519 bl .trace_hardirqs_off
523 mtmsrd r10 /* hard-enable again */
524 addi r3,r1,STACK_FRAME_OVERHEAD
526 b .ret_from_except_lite /* loop back and handle more */
528 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
530 TRACE_AND_RESTORE_IRQ(r5);
532 /* extract EE bit and use it to restore paca->hard_enabled */
534 rldicl r4,r3,49,63 /* r0 = (r3 >> 15) & 1 */
535 stb r4,PACAHARDIRQEN(r13)
549 stdcx. r0,0,r1 /* to clear the reservation */
552 * Clear RI before restoring r13. If we are returning to
553 * userspace and we take an exception after restoring r13,
554 * we end up corrupting the userspace r13 value.
557 andc r4,r4,r0 /* r0 contains MSR_RI here */
561 * r13 is our per cpu area, only restore it if we are returning to
566 ACCOUNT_CPU_USER_EXIT(r2, r4)
583 b . /* prevent speculative execution */
586 #ifdef CONFIG_PREEMPT
587 andi. r0,r3,MSR_PR /* Returning to user mode? */
589 /* Check that preempt_count() == 0 and interrupts are enabled */
590 lwz r8,TI_PREEMPT(r9)
594 crandc eq,cr1*4+eq,eq
596 /* here we are preempting the current task */
598 #ifdef CONFIG_TRACE_IRQFLAGS
599 bl .trace_hardirqs_on
600 /* Note: we just clobbered r10 which used to contain the previous
601 * MSR before the hard-disabling done by the caller of do_work.
602 * We don't have that value anymore, but it doesn't matter as
603 * we will hard-enable unconditionally, we can just reload the
604 * current MSR into r10
607 #endif /* CONFIG_TRACE_IRQFLAGS */
609 stb r0,PACASOFTIRQEN(r13)
610 stb r0,PACAHARDIRQEN(r13)
612 mtmsrd r10,1 /* reenable interrupts */
615 clrrdi r9,r1,THREAD_SHIFT
616 rldicl r10,r10,48,1 /* disable interrupts again */
620 andi. r0,r4,_TIF_NEED_RESCHED
626 /* Enable interrupts */
630 andi. r0,r4,_TIF_NEED_RESCHED
633 b .ret_from_except_lite
637 addi r4,r1,STACK_FRAME_OVERHEAD
642 addi r3,r1,STACK_FRAME_OVERHEAD
643 bl .unrecoverable_exception
646 #ifdef CONFIG_PPC_RTAS
648 * On CHRP, the Run-Time Abstraction Services (RTAS) have to be
649 * called with the MMU off.
651 * In addition, we need to be in 32b mode, at least for now.
653 * Note: r3 is an input parameter to rtas, so don't trash it...
658 stdu r1,-RTAS_FRAME_SIZE(r1) /* Save SP and create stack space. */
660 /* Because RTAS is running in 32b mode, it clobbers the high order half
661 * of all registers that it saves. We therefore save those registers
662 * RTAS might touch to the stack. (r0, r3-r13 are caller saved)
664 SAVE_GPR(2, r1) /* Save the TOC */
665 SAVE_GPR(13, r1) /* Save paca */
666 SAVE_8GPRS(14, r1) /* Save the non-volatiles */
667 SAVE_10GPRS(22, r1) /* ditto */
684 /* Temporary workaround to clear CR until RTAS can be modified to
691 /* There is no way it is acceptable to get here with interrupts enabled,
692 * check it with the asm equivalent of WARN_ON
694 lbz r0,PACASOFTIRQEN(r13)
696 EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,BUGFLAG_WARNING
699 /* Hard-disable interrupts */
705 /* Unfortunately, the stack pointer and the MSR are also clobbered,
706 * so they are saved in the PACA which allows us to restore
707 * our original state after RTAS returns.
710 std r6,PACASAVEDMSR(r13)
712 /* Setup our real return addr */
713 LOAD_REG_ADDR(r4,.rtas_return_loc)
714 clrldi r4,r4,2 /* convert to realmode address */
718 ori r0,r0,MSR_EE|MSR_SE|MSR_BE|MSR_RI
722 rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG)
723 ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP
726 sync /* disable interrupts so SRR0/1 */
727 mtmsrd r0 /* don't get trashed */
729 LOAD_REG_ADDR(r4, rtas)
730 ld r5,RTASENTRY(r4) /* get the rtas->entry value */
731 ld r4,RTASBASE(r4) /* get the rtas->base value */
736 b . /* prevent speculative execution */
738 _STATIC(rtas_return_loc)
739 /* relocation is off at this point */
740 mfspr r4,SPRN_SPRG3 /* Get PACA */
741 clrldi r4,r4,2 /* convert to realmode address */
749 ld r1,PACAR1(r4) /* Restore our SP */
750 LOAD_REG_IMMEDIATE(r3,.rtas_restore_regs)
751 ld r4,PACASAVEDMSR(r4) /* Restore our MSR */
756 b . /* prevent speculative execution */
758 _STATIC(rtas_restore_regs)
759 /* relocation is on at this point */
760 REST_GPR(2, r1) /* Restore the TOC */
761 REST_GPR(13, r1) /* Restore paca */
762 REST_8GPRS(14, r1) /* Restore the non-volatiles */
763 REST_10GPRS(22, r1) /* ditto */
782 addi r1,r1,RTAS_FRAME_SIZE /* Unstack our frame */
783 ld r0,16(r1) /* get return address */
786 blr /* return to caller */
788 #endif /* CONFIG_PPC_RTAS */
793 stdu r1,-PROM_FRAME_SIZE(r1) /* Save SP and create stack space */
795 /* Because PROM is running in 32b mode, it clobbers the high order half
796 * of all registers that it saves. We therefore save those registers
797 * PROM might touch to the stack. (r0, r3-r13 are caller saved)
820 /* Get the PROM entrypoint */
824 /* Switch MSR to 32 bits mode
828 rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG)
831 rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG)
836 /* Restore arguments & enter PROM here... */
840 /* Just make sure that r1 top 32 bits didn't get
845 /* Restore the MSR (back to 64 bits) */
850 /* Restore other registers */
870 addi r1,r1,PROM_FRAME_SIZE
876 #ifdef CONFIG_DYNAMIC_FTRACE
879 /* Taken from output of objdump from lib64/glibc */
883 subi r3, r3, MCOUNT_INSN_SIZE
893 _GLOBAL(ftrace_caller)
894 /* Taken from output of objdump from lib64/glibc */
900 subi r3, r3, MCOUNT_INSN_SIZE
915 /* Taken from output of objdump from lib64/glibc */
922 subi r3, r3, MCOUNT_INSN_SIZE
923 LOAD_REG_ADDR(r5,ftrace_trace_function)