1 /* Device Tree Source for Motorola PrPMC2800
3 * Author: Mark A. Greer <mgreer@mvista.com>
5 * 2007 (c) MontaVista, Software, Inc. This file is licensed under
6 * the terms of the GNU General Public License version 2. This program
7 * is licensed "as is" without any warranty of any kind, whether express
10 * Property values that are labeled as "Default" will be updated by bootwrapper
11 * if it can determine the exact PrPMC type.
17 model = "PrPMC280/PrPMC2800"; /* Default */
18 compatible = "motorola,PrPMC2800";
28 clock-frequency = <2bb0b140>; /* Default (733 MHz) */
29 bus-frequency = <7f28155>; /* 133.333333 MHz */
30 timebase-frequency = <1fca055>; /* 33.333333 MHz */
31 i-cache-line-size = <20>;
32 d-cache-line-size = <20>;
33 i-cache-size = <8000>;
34 d-cache-size = <8000>;
39 device_type = "memory";
40 reg = <00000000 20000000>; /* Default (512MB) */
43 mv64x60@f1000000 { /* Marvell Discovery */
46 #interrupt-cells = <1>;
47 model = "mv64360"; /* Default */
48 compatible = "marvell,mv64x60";
49 clock-frequency = <7f28155>; /* 133.333333 MHz */
50 reg = <f1000000 00010000>;
51 virtual-reg = <f1000000>;
52 ranges = <88000000 88000000 01000000 /* PCI 0 I/O Space */
53 80000000 80000000 08000000 /* PCI 0 MEM Space */
54 a0000000 a0000000 04000000 /* User FLASH */
55 00000000 f1000000 00010000 /* Bridge's regs */
56 f2000000 f2000000 00040000>; /* Integrated SRAM */
60 compatible = "direct-mapped";
61 reg = <a0000000 4000000>; /* Default (64MB) */
64 partitions = <00000000 00100000 /* RO */
65 00100000 00040001 /* RW */
66 00140000 00400000 /* RO */
67 00540000 039c0000 /* RO */
68 03f00000 00100000>; /* RO */
69 partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B";
76 compatible = "marvell,mv64x60-mdio";
78 device_type = "ethernet-phy";
79 compatible = "broadcom,bcm5421";
80 interrupts = <4c>; /* GPP 12 */
81 interrupt-parent = <&/mv64x60/pic>;
85 device_type = "ethernet-phy";
86 compatible = "broadcom,bcm5421";
87 interrupts = <4c>; /* GPP 12 */
88 interrupt-parent = <&/mv64x60/pic>;
96 device_type = "network";
97 compatible = "marvell,mv64x60-eth";
100 interrupt-parent = <&/mv64x60/pic>;
101 phy = <&/mv64x60/mdio/ethernet-phy@1>;
102 local-mac-address = [ 00 00 00 00 00 00 ];
105 device_type = "network";
106 compatible = "marvell,mv64x60-eth";
109 interrupt-parent = <&/mv64x60/pic>;
110 phy = <&/mv64x60/mdio/ethernet-phy@3>;
111 local-mac-address = [ 00 00 00 00 00 00 ];
117 compatible = "marvell,mv64x60-sdma";
119 virtual-reg = <f1004000>;
120 interrupt-base = <0>;
122 interrupt-parent = <&/mv64x60/pic>;
127 compatible = "marvell,mv64x60-sdma";
129 virtual-reg = <f1006000>;
130 interrupt-base = <0>;
132 interrupt-parent = <&/mv64x60/pic>;
136 compatible = "marvell,mv64x60-brg";
139 clock-frequency = <7ed6b40>;
140 current-speed = <2580>;
145 compatible = "marvell,mv64x60-brg";
148 clock-frequency = <7ed6b40>;
149 current-speed = <2580>;
163 virtual-reg = <f100b800>;
167 device_type = "serial";
168 compatible = "marvell,mpsc";
170 virtual-reg = <f1008000>;
171 sdma = <&/mv64x60/sdma@4000>;
172 brg = <&/mv64x60/brg@b200>;
173 cunit = <&/mv64x60/cunit@f200>;
174 mpscrouting = <&/mv64x60/mpscrouting@b400>;
175 mpscintr = <&/mv64x60/mpscintr@b800>;
183 interrupt-parent = <&/mv64x60/pic>;
187 device_type = "serial";
188 compatible = "marvell,mpsc";
190 virtual-reg = <f1009000>;
191 sdma = <&/mv64x60/sdma@6000>;
192 brg = <&/mv64x60/brg@b208>;
193 cunit = <&/mv64x60/cunit@f200>;
194 mpscrouting = <&/mv64x60/mpscrouting@b400>;
195 mpscintr = <&/mv64x60/mpscintr@b800>;
203 interrupt-parent = <&/mv64x60/pic>;
206 wdt@b410 { /* watchdog timer */
207 compatible = "marvell,mv64x60-wdt";
209 timeout = <a>; /* wdt timeout in seconds */
214 compatible = "marvell,mv64x60-i2c";
216 virtual-reg = <f100c000>;
219 timeout = <3e8>; /* 1000 = 1 second */
222 interrupt-parent = <&/mv64x60/pic>;
226 #interrupt-cells = <1>;
227 #address-cells = <0>;
228 compatible = "marvell,mv64x60-pic";
230 interrupt-controller;
234 compatible = "marvell,mv64x60-mpp";
239 compatible = "marvell,mv64x60-gpp";
244 #address-cells = <3>;
246 #interrupt-cells = <1>;
248 compatible = "marvell,mv64x60-pci";
250 ranges = <01000000 0 0 88000000 0 01000000
251 02000000 0 80000000 80000000 0 08000000>;
253 clock-frequency = <3EF1480>;
254 interrupt-pci-iack = <0c34>;
255 interrupt-parent = <&/mv64x60/pic>;
256 interrupt-map-mask = <f800 0 0 7>;
259 5000 0 0 1 &/mv64x60/pic 50
260 5000 0 0 2 &/mv64x60/pic 51
261 5000 0 0 3 &/mv64x60/pic 5b
262 5000 0 0 4 &/mv64x60/pic 5d
265 5800 0 0 1 &/mv64x60/pic 5b
266 5800 0 0 2 &/mv64x60/pic 5d
267 5800 0 0 3 &/mv64x60/pic 50
268 5800 0 0 4 &/mv64x60/pic 51
271 6000 0 0 1 &/mv64x60/pic 5b
272 6000 0 0 2 &/mv64x60/pic 5d
273 6000 0 0 3 &/mv64x60/pic 50
274 6000 0 0 4 &/mv64x60/pic 51
277 6800 0 0 1 &/mv64x60/pic 5d
278 6800 0 0 2 &/mv64x60/pic 50
279 6800 0 0 3 &/mv64x60/pic 51
280 6800 0 0 4 &/mv64x60/pic 5b
285 compatible = "marvell,mv64x60-cpu-error";
286 reg = <0070 10 0128 28>;
288 interrupt-parent = <&/mv64x60/pic>;
292 compatible = "marvell,mv64x60-sram-ctrl";
295 interrupt-parent = <&/mv64x60/pic>;
299 compatible = "marvell,mv64x60-pci-error";
300 reg = <1d40 40 0c28 4>;
302 interrupt-parent = <&/mv64x60/pic>;
306 compatible = "marvell,mv64x60-mem-ctrl";
309 interrupt-parent = <&/mv64x60/pic>;
315 linux,stdout-path = "/mv64x60@f1000000/mpsc@8000";