2 * MPC8610 HPCD Device Tree Source
4 * Copyright 2007-2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License Version 2 as published
8 * by the Free Software Foundation.
14 model = "MPC8610HPCD";
15 compatible = "fsl,MPC8610HPCD";
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>; // L1
36 i-cache-size = <32768>; // L1
37 timebase-frequency = <0>; // From uboot
38 bus-frequency = <0>; // From uboot
39 clock-frequency = <0>; // From uboot
44 device_type = "memory";
45 reg = <0x00000000 0x20000000>; // 512M at 0x0
48 board-control@e8000000 {
49 compatible = "fsl,fpga-pixis";
50 reg = <0xe8000000 32>; // pixis at 0xe8000000
56 #interrupt-cells = <2>;
58 compatible = "fsl,mpc8610-immr", "simple-bus";
59 ranges = <0x0 0xe0000000 0x00100000>;
60 reg = <0xe0000000 0x1000>;
67 compatible = "fsl-i2c";
70 interrupt-parent = <&mpic>;
74 compatible = "cirrus,cs4270";
76 /* MCLK source is a stand-alone oscillator */
77 clock-frequency = <12288000>;
85 compatible = "fsl-i2c";
88 interrupt-parent = <&mpic>;
92 serial0: serial@4500 {
94 device_type = "serial";
95 compatible = "ns16550";
97 clock-frequency = <0>;
99 interrupt-parent = <&mpic>;
102 serial1: serial@4600 {
104 device_type = "serial";
105 compatible = "ns16550";
106 reg = <0x4600 0x100>;
107 clock-frequency = <0>;
109 interrupt-parent = <&mpic>;
113 compatible = "fsl,diu";
116 interrupt-parent = <&mpic>;
119 mpic: interrupt-controller@40000 {
120 clock-frequency = <0>;
121 interrupt-controller;
122 #address-cells = <0>;
123 #interrupt-cells = <2>;
124 reg = <0x40000 0x40000>;
125 compatible = "chrp,open-pic";
126 device_type = "open-pic";
130 global-utilities@e0000 {
131 compatible = "fsl,mpc8610-guts";
132 reg = <0xe0000 0x1000>;
137 compatible = "fsl,mpc8610-ssi";
139 reg = <0x16000 0x100>;
140 interrupt-parent = <&mpic>;
142 fsl,mode = "i2s-slave";
143 codec-handle = <&cs4270>;
147 compatible = "fsl,mpc8610-ssi";
149 reg = <0x16100 0x100>;
150 interrupt-parent = <&mpic>;
155 #address-cells = <1>;
157 compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma";
159 reg = <0x21300 0x4>; /* DMA general status register */
160 ranges = <0x0 0x21100 0x200>;
163 compatible = "fsl,mpc8610-dma-channel",
164 "fsl,eloplus-dma-channel";
167 interrupt-parent = <&mpic>;
171 compatible = "fsl,mpc8610-dma-channel",
172 "fsl,eloplus-dma-channel";
175 interrupt-parent = <&mpic>;
179 compatible = "fsl,mpc8610-dma-channel",
180 "fsl,eloplus-dma-channel";
183 interrupt-parent = <&mpic>;
187 compatible = "fsl,mpc8610-dma-channel",
188 "fsl,eloplus-dma-channel";
191 interrupt-parent = <&mpic>;
197 #address-cells = <1>;
199 compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma";
201 reg = <0xc300 0x4>; /* DMA general status register */
202 ranges = <0x0 0xc100 0x200>;
205 compatible = "fsl,mpc8610-dma-channel",
206 "fsl,mpc8540-dma-channel";
209 interrupt-parent = <&mpic>;
213 compatible = "fsl,mpc8610-dma-channel",
214 "fsl,mpc8540-dma-channel";
217 interrupt-parent = <&mpic>;
221 compatible = "fsl,mpc8610-dma-channel",
222 "fsl,mpc8540-dma-channel";
225 interrupt-parent = <&mpic>;
229 compatible = "fsl,mpc8610-dma-channel",
230 "fsl,mpc8540-dma-channel";
233 interrupt-parent = <&mpic>;
242 compatible = "fsl,mpc8610-pci";
244 #interrupt-cells = <1>;
246 #address-cells = <3>;
247 reg = <0xe0008000 0x1000>;
249 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
250 0x01000000 0x0 0x00000000 0xe1000000 0x0 0x00100000>;
251 clock-frequency = <33333333>;
252 interrupt-parent = <&mpic>;
254 interrupt-map-mask = <0xf800 0 0 7>;
257 0x8800 0 0 1 &mpic 4 1
258 0x8800 0 0 2 &mpic 5 1
259 0x8800 0 0 3 &mpic 6 1
260 0x8800 0 0 4 &mpic 7 1
263 0x9000 0 0 1 &mpic 5 1
264 0x9000 0 0 2 &mpic 6 1
265 0x9000 0 0 3 &mpic 7 1
266 0x9000 0 0 4 &mpic 4 1
270 pci1: pcie@e000a000 {
272 compatible = "fsl,mpc8641-pcie";
274 #interrupt-cells = <1>;
276 #address-cells = <3>;
277 reg = <0xe000a000 0x1000>;
279 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
280 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
281 clock-frequency = <33333333>;
282 interrupt-parent = <&mpic>;
284 interrupt-map-mask = <0xf800 0 0 7>;
288 0xd800 0 0 1 &mpic 2 1
291 0xe000 0 0 1 &mpic 1 1
292 0xe000 0 0 2 &mpic 1 1
293 0xe000 0 0 3 &mpic 1 1
294 0xe000 0 0 4 &mpic 1 1
297 0xf800 0 0 1 &mpic 3 0
298 0xf800 0 0 2 &mpic 0 1
304 #address-cells = <3>;
306 ranges = <0x02000000 0x0 0xa0000000
307 0x02000000 0x0 0xa0000000
309 0x01000000 0x0 0x00000000
310 0x01000000 0x0 0x00000000
315 #address-cells = <3>;
316 ranges = <0x02000000 0x0 0xa0000000
317 0x02000000 0x0 0xa0000000
319 0x01000000 0x0 0x00000000
320 0x01000000 0x0 0x00000000