2 * MPC8377E MDS Device Tree Source
4 * Copyright 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "fsl,mpc8377emds";
16 compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
35 d-cache-line-size = <0x20>;
36 i-cache-line-size = <0x20>;
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
39 timebase-frequency = <0>;
41 clock-frequency = <0>;
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x00000200>;
59 compatible = "mpc83xx_wdt";
67 compatible = "fsl-i2c";
69 interrupts = <0xe 0x8>;
70 interrupt-parent = < &ipic >;
78 compatible = "fsl-i2c";
80 interrupts = <0xf 0x8>;
81 interrupt-parent = < &ipic >;
87 compatible = "fsl,spi";
88 reg = <0x7000 0x1000>;
89 interrupts = <0x10 0x8>;
90 interrupt-parent = < &ipic >;
94 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
96 compatible = "fsl-usb2-dr";
97 reg = <0x23000 0x1000>;
100 interrupt-parent = < &ipic >;
101 interrupts = <0x26 0x8>;
102 phy_type = "utmi_wide";
106 #address-cells = <1>;
108 compatible = "fsl,gianfar-mdio";
109 reg = <0x24520 0x20>;
110 phy2: ethernet-phy@2 {
111 interrupt-parent = < &ipic >;
112 interrupts = <0x11 0x8>;
114 device_type = "ethernet-phy";
116 phy3: ethernet-phy@3 {
117 interrupt-parent = < &ipic >;
118 interrupts = <0x12 0x8>;
120 device_type = "ethernet-phy";
124 enet0: ethernet@24000 {
126 device_type = "network";
128 compatible = "gianfar";
129 reg = <0x24000 0x1000>;
130 local-mac-address = [ 00 00 00 00 00 00 ];
131 interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
132 phy-connection-type = "mii";
133 interrupt-parent = < &ipic >;
134 phy-handle = < &phy2 >;
137 enet1: ethernet@25000 {
139 device_type = "network";
141 compatible = "gianfar";
142 reg = <0x25000 0x1000>;
143 local-mac-address = [ 00 00 00 00 00 00 ];
144 interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
145 phy-connection-type = "mii";
146 interrupt-parent = < &ipic >;
147 phy-handle = < &phy3 >;
150 serial0: serial@4500 {
152 device_type = "serial";
153 compatible = "ns16550";
154 reg = <0x4500 0x100>;
155 clock-frequency = <0>;
156 interrupts = <0x9 0x8>;
157 interrupt-parent = < &ipic >;
160 serial1: serial@4600 {
162 device_type = "serial";
163 compatible = "ns16550";
164 reg = <0x4600 0x100>;
165 clock-frequency = <0>;
166 interrupts = <0xa 0x8>;
167 interrupt-parent = < &ipic >;
172 compatible = "talitos";
173 reg = <0x30000 0x10000>;
174 interrupts = <0xb 0x8>;
175 interrupt-parent = < &ipic >;
176 /* Rev. 3.0 geometry */
178 channel-fifo-len = <0x18>;
179 exec-units-mask = <0x000001fe>;
180 descriptor-types-mask = <0x03ab0ebf>;
185 compatible = "fsl,esdhc";
186 reg = <0x2e000 0x1000>;
187 interrupts = <0x2a 0x8>;
188 interrupt-parent = < &ipic >;
192 compatible = "fsl,mpc8379-sata";
193 reg = <0x18000 0x1000>;
194 interrupts = <0x2c 0x8>;
195 interrupt-parent = < &ipic >;
199 compatible = "fsl,mpc8379-sata";
200 reg = <0x19000 0x1000>;
201 interrupts = <0x2d 0x8>;
202 interrupt-parent = < &ipic >;
206 * interrupts cell = <intr #, sense>
207 * sense values match linux IORESOURCE_IRQ_* defines:
208 * sense == 8: Level, low assertion
209 * sense == 2: Edge, high-to-low change
212 compatible = "fsl,ipic";
213 interrupt-controller;
214 #address-cells = <0>;
215 #interrupt-cells = <2>;
222 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
226 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
227 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
228 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
229 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
232 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
233 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
234 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
235 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
238 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
239 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
240 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
241 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
244 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
245 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
246 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
247 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
250 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
251 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
252 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
253 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
256 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
257 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
258 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
259 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
262 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
263 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
264 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
265 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
266 interrupt-parent = < &ipic >;
267 interrupts = <0x42 0x8>;
269 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
270 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
271 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
272 clock-frequency = <0>;
273 #interrupt-cells = <1>;
275 #address-cells = <3>;
276 reg = <0xe0008500 0x100>;
277 compatible = "fsl,mpc8349-pci";