err.no Git - linux-2.6/blob - arch/powerpc/boot/dts/mpc8272ads.dts

   1 /*
   2  * MPC8272 ADS Device Tree Source
   3  *
   4  * Copyright 2005 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8272ADS";
  14         compatible = "MPC8260ADS";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 PowerPC,8272@0 {
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                         d-cache-line-size = <20>;       // 32 bytes
  26                         i-cache-line-size = <20>;       // 32 bytes
  27                         d-cache-size = <4000>;          // L1, 16K
  28                         i-cache-size = <4000>;          // L1, 16K
  29                         timebase-frequency = <0>;
  30                         bus-frequency = <0>;
  31                         clock-frequency = <0>;
  32                         32-bit;
  33                 };
  34         };
  35
  36         pci_pic: interrupt-controller@f8200000 {
  37                 #address-cells = <0>;
  38                 #interrupt-cells = <2>;
  39                 interrupt-controller;
  40                 reg = <f8200000 f8200004>;
  41                 built-in;
  42                 device_type = "pci-pic";
  43         };
  44
  45         memory {
  46                 device_type = "memory";
  47                 reg = <00000000 4000000 f4500000 00000020>;
  48         };
  49
  50         chosen {
  51                 name = "chosen";
  52                 linux,platform = <0>;
  53                 interrupt-controller = <&Cpm_pic>;
  54         };
  55
  56         soc8272@f0000000 {
  57                 #address-cells = <1>;
  58                 #size-cells = <1>;
  59                 #interrupt-cells = <2>;
  60                 device_type = "soc";
  61                 ranges = <00000000 f0000000 00053000>;
  62                 reg = <f0000000 10000>;
  63
  64                 mdio@0 {
  65                         device_type = "mdio";
  66                         compatible = "fs_enet";
  67                         reg = <0 0>;
  68                         #address-cells = <1>;
  69                         #size-cells = <0>;
  70
  71                         phy0:ethernet-phy@0 {
  72                                 interrupt-parent = <&Cpm_pic>;
  73                                 interrupts = <17 4>;
  74                                 reg = <0>;
  75                                 bitbang = [ 12 12 13 02 02 01 ];
  76                                 device_type = "ethernet-phy";
  77                         };
  78
  79                         phy1:ethernet-phy@1 {
  80                                 interrupt-parent = <&Cpm_pic>;
  81                                 interrupts = <17 4>;
  82                                 bitbang = [ 12 12 13 02 02 01 ];
  83                                 reg = <3>;
  84                                 device_type = "ethernet-phy";
  85                         };
  86                 };
  87
  88                 ethernet@24000 {
  89                         #address-cells = <1>;
  90                         #size-cells = <0>;
  91                         device_type = "network";
  92                         device-id = <1>;
  93                         compatible = "fs_enet";
  94                         model = "FCC";
  95                         reg = <11300 20 8400 100 11380 30>;
  96                         mac-address = [ 00 11 2F 99 43 54 ];
  97                         interrupts = <20 2>;
  98                         interrupt-parent = <&Cpm_pic>;
  99                         phy-handle = <&Phy0>;
 100                         rx-clock = <13>;
 101                         tx-clock = <12>;
 102                 };
 103
 104                 ethernet@25000 {
 105                         device_type = "network";
 106                         device-id = <2>;
 107                         compatible = "fs_enet";
 108                         model = "FCC";
 109                         reg = <11320 20 8500 100 113b0 30>;
 110                         mac-address = [ 00 11 2F 99 44 54 ];
 111                         interrupts = <21 2>;
 112                         interrupt-parent = <&Cpm_pic>;
 113                         phy-handle = <&Phy1>;
 114                         rx-clock = <17>;
 115                         tx-clock = <18>;
 116                 };
 117
 118                 cpm@f0000000 {
 119                         #address-cells = <1>;
 120                         #size-cells = <1>;
 121                         #interrupt-cells = <2>;
 122                         device_type = "cpm";
 123                         model = "CPM2";
 124                         ranges = <00000000 00000000 20000>;
 125                         reg = <0 20000>;
 126                         command-proc = <119c0>;
 127                         brg-frequency = <17D7840>;
 128                         cpm_clk = <BEBC200>;
 129
 130                         scc@11a00 {
 131                                 device_type = "serial";
 132                                 compatible = "cpm_uart";
 133                                 model = "SCC";
 134                                 device-id = <1>;
 135                                 reg = <11a00 20 8000 100>;
 136                                 current-speed = <1c200>;
 137                                 interrupts = <28 2>;
 138                                 interrupt-parent = <&Cpm_pic>;
 139                                 clock-setup = <0 00ffffff>;
 140                                 rx-clock = <1>;
 141                                 tx-clock = <1>;
 142                         };
 143
 144                         scc@11a60 {
 145                                 device_type = "serial";
 146                                 compatible = "cpm_uart";
 147                                 model = "SCC";
 148                                 device-id = <4>;
 149                                 reg = <11a60 20 8300 100>;
 150                                 current-speed = <1c200>;
 151                                 interrupts = <2b 2>;
 152                                 interrupt-parent = <&Cpm_pic>;
 153                                 clock-setup = <1b ffffff00>;
 154                                 rx-clock = <4>;
 155                                 tx-clock = <4>;
 156                         };
 157                 };
 158
 159                 cpm_pic:interrupt-controller@10c00 {
 160                         #address-cells = <0>;
 161                         #interrupt-cells = <2>;
 162                         interrupt-controller;
 163                         reg = <10c00 80>;
 164                         built-in;
 165                         device_type = "cpm-pic";
 166                         compatible = "CPM2";
 167                 };
 168
 169                 pci@0500 {
 170                         #interrupt-cells = <1>;
 171                         #size-cells = <2>;
 172                         #address-cells = <3>;
 173                         compatible = "8272";
 174                         device_type = "pci";
 175                         reg = <10430 4dc>;
 176                         clock-frequency = <3f940aa>;
 177                         interrupt-map-mask = <f800 0 0 7>;
 178                         interrupt-map = <
 179                                         /* IDSEL 0x16 */
 180                                          b000 0 0 1 f8200000 40 8
 181                                          b000 0 0 2 f8200000 41 8
 182                                          b000 0 0 3 f8200000 42 8
 183                                          b000 0 0 4 f8200000 43 8
 184
 185                                         /* IDSEL 0x17 */
 186                                          b800 0 0 1 f8200000 43 8
 187                                          b800 0 0 2 f8200000 40 8
 188                                          b800 0 0 3 f8200000 41 8
 189                                          b800 0 0 4 f8200000 42 8
 190
 191                                         /* IDSEL 0x18 */
 192                                          c000 0 0 1 f8200000 42 8
 193                                          c000 0 0 2 f8200000 43 8
 194                                          c000 0 0 3 f8200000 40 8
 195                                          c000 0 0 4 f8200000 41 8>;
 196                         interrupt-parent = <&Cpm_pic>;
 197                         interrupts = <14 8>;
 198                         bus-range = <0 0>;
 199                         ranges = <02000000 0 80000000 80000000 0 40000000
 200                                   01000000 0 00000000 f6000000 0 02000000>;
 201                 };
 202
 203 /* May need to remove if on a part without crypto engine */
 204                 crypto@30000 {
 205                         device_type = "crypto";
 206                         model = "SEC2";
 207                         compatible = "talitos";
 208                         reg = <30000 10000>;
 209                         interrupts = <b 2>;
 210                         interrupt-parent = <&Cpm_pic>;
 211                         num-channels = <4>;
 212                         channel-fifo-len = <18>;
 213                         exec-units-mask = <0000007e>;
 214 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
 215                         descriptor-types-mask = <01010ebf>;
 216                 };
 217         };
 218 };