2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2007 MIPS Technologies, Inc.
10 #include <linux/fcntl.h>
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/linkage.h>
14 #include <linux/module.h>
15 #include <linux/sched.h>
18 #include <asm/cacheflush.h>
19 #include <asm/processor.h>
21 #include <asm/cpu-features.h>
23 /* Cache operations. */
24 void (*flush_cache_all)(void);
25 void (*__flush_cache_all)(void);
26 void (*flush_cache_mm)(struct mm_struct *mm);
27 void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
29 void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
31 void (*flush_icache_range)(unsigned long start, unsigned long end);
33 /* MIPS specific cache operations */
34 void (*flush_cache_sigtramp)(unsigned long addr);
35 void (*local_flush_data_cache_page)(void * addr);
36 void (*flush_data_cache_page)(unsigned long addr);
37 void (*flush_icache_all)(void);
39 EXPORT_SYMBOL_GPL(local_flush_data_cache_page);
40 EXPORT_SYMBOL(flush_data_cache_page);
42 #ifdef CONFIG_DMA_NONCOHERENT
44 /* DMA cache operations. */
45 void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
46 void (*_dma_cache_wback)(unsigned long start, unsigned long size);
47 void (*_dma_cache_inv)(unsigned long start, unsigned long size);
49 EXPORT_SYMBOL(_dma_cache_wback_inv);
51 #endif /* CONFIG_DMA_NONCOHERENT */
54 * We could optimize the case where the cache argument is not BCACHE but
55 * that seems very atypical use ...
57 asmlinkage int sys_cacheflush(unsigned long addr,
58 unsigned long bytes, unsigned int cache)
62 if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
65 flush_icache_range(addr, addr + bytes);
70 void __flush_dcache_page(struct page *page)
72 struct address_space *mapping = page_mapping(page);
75 if (PageHighMem(page))
77 if (mapping && !mapping_mapped(mapping)) {
78 SetPageDcacheDirty(page);
83 * We could delay the flush for the !page_mapping case too. But that
84 * case is for exec env/arg pages and those are %99 certainly going to
85 * get faulted into the tlb (and thus flushed) anyways.
87 addr = (unsigned long) page_address(page);
88 flush_data_cache_page(addr);
91 EXPORT_SYMBOL(__flush_dcache_page);
93 void __flush_anon_page(struct page *page, unsigned long vmaddr)
95 if (pages_do_alias((unsigned long)page_address(page), vmaddr)) {
98 kaddr = kmap_coherent(page, vmaddr);
99 flush_data_cache_page((unsigned long)kaddr);
104 EXPORT_SYMBOL(__flush_anon_page);
106 void __update_cache(struct vm_area_struct *vma, unsigned long address,
110 unsigned long pfn, addr;
111 int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
114 if (unlikely(!pfn_valid(pfn)))
116 page = pfn_to_page(pfn);
117 if (page_mapping(page) && Page_dcache_dirty(page)) {
118 addr = (unsigned long) page_address(page);
119 if (exec || pages_do_alias(addr, address & PAGE_MASK))
120 flush_data_cache_page(addr);
121 ClearPageDcacheDirty(page);
125 static char cache_panic[] __initdata = "Yeee, unsupported cache architecture.";
127 void __init cpu_cache_init(void)
129 if (cpu_has_3k_cache) {
130 extern void __weak r3k_cache_init(void);
135 if (cpu_has_6k_cache) {
136 extern void __weak r6k_cache_init(void);
141 if (cpu_has_4k_cache) {
142 extern void __weak r4k_cache_init(void);
147 if (cpu_has_8k_cache) {
148 extern void __weak r8k_cache_init(void);
153 if (cpu_has_tx39_cache) {
154 extern void __weak tx39_cache_init(void);
163 int __weak __uncached_access(struct file *file, unsigned long addr)
165 if (file->f_flags & O_SYNC)
168 return addr >= __pa(high_memory);