2 * BRIEF MODULE DESCRIPTION
3 * IT8172/QED5231 board setup.
5 * Copyright 2000 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 #include <linux/init.h>
30 #include <linux/sched.h>
31 #include <linux/ioport.h>
32 #include <linux/irq.h>
33 #include <linux/serial_reg.h>
34 #include <linux/major.h>
35 #include <linux/kdev_t.h>
36 #include <linux/root_dev.h>
42 #include <asm/bootinfo.h>
44 #include <asm/mipsregs.h>
45 #include <asm/reboot.h>
46 #include <asm/traps.h>
47 #include <asm/it8172/it8172.h>
48 #include <asm/it8712.h>
50 extern struct resource ioport_resource;
51 #ifdef CONFIG_SERIO_I8042
52 int init_8712_keyboard(void);
55 extern int SearchIT8712(void);
56 extern void InitLPCInterface(void);
57 extern char * __init prom_getcmdline(void);
58 extern void it8172_restart(char *command);
59 extern void it8172_halt(void);
60 extern void it8172_power_off(void);
62 extern void it8172_time_init(void);
64 #ifdef CONFIG_IT8172_REVC
67 struct resource pci_mem;
68 struct resource pci_io;
69 struct resource flash;
71 } it8172_resources = {
73 .start = 0, /* to be initted */
76 .flags = IORESOURCE_MEM
81 .flags = IORESOURCE_MEM
99 struct resource pci_mem0;
100 struct resource pci_mem1;
101 struct resource pci_io;
102 struct resource pci_mem2;
103 struct resource pci_mem3;
104 struct resource flash;
105 struct resource boot;
106 } it8172_resources = {
108 .start = 0, /* to be initted */
111 .flags = IORESOURCE_MEM
116 .flags = IORESOURCE_MEM
121 .flags = IORESOURCE_MEM
130 .flags = IORESOURCE_MEM
135 .flags = IORESOURCE_MEM
149 void __init it8172_init_ram_resource(unsigned long memsize)
151 it8172_resources.ram.end = memsize;
154 void __init plat_mem_setup(void)
159 argptr = prom_getcmdline();
160 #ifdef CONFIG_SERIAL_CONSOLE
161 if ((argptr = strstr(argptr, "console=")) == NULL) {
162 argptr = prom_getcmdline();
163 strcat(argptr, " console=ttyS0,115200");
167 clear_c0_status(ST0_FR);
169 board_time_init = it8172_time_init;
171 _machine_restart = it8172_restart;
172 _machine_halt = it8172_halt;
173 pm_power_off = it8172_power_off;
180 set_io_port_base(KSEG1);
181 ioport_resource.start = it8172_resources.pci_io.start;
182 ioport_resource.end = it8172_resources.pci_io.end;
183 #ifdef CONFIG_IT8172_REVC
184 iomem_resource.start = it8172_resources.pci_mem.start;
185 iomem_resource.end = it8172_resources.pci_mem.end;
187 iomem_resource.start = it8172_resources.pci_mem0.start;
188 iomem_resource.end = it8172_resources.pci_mem3.end;
191 #ifdef CONFIG_BLK_DEV_INITRD
192 ROOT_DEV = Root_RAM0;
196 * Pull enabled devices out of standby
198 IT_IO_READ16(IT_PM_DSR, dsr);
201 * Fixme: This breaks when these drivers are modules!!!
203 #ifdef CONFIG_SOUND_IT8172
204 dsr &= ~IT_PM_DSR_ACSB;
206 dsr |= IT_PM_DSR_ACSB;
208 #ifdef CONFIG_BLK_DEV_IT8172
209 dsr &= ~IT_PM_DSR_IDESB;
211 dsr |= IT_PM_DSR_IDESB;
213 IT_IO_WRITE16(IT_PM_DSR, dsr);
217 #ifdef CONFIG_MIPS_ITE8172
218 if (SearchIT8712()) {
219 printk("Found IT8712 Super IO\n");
220 /* enable IT8712 serial port */
221 LPCSetConfig(LDN_SERIAL1, 0x30, 0x01); /* enable */
222 LPCSetConfig(LDN_SERIAL1, 0x23, 0x01); /* clock selection */
223 #ifdef CONFIG_SERIO_I8042
224 if (init_8712_keyboard()) {
225 printk("Unable to initialize keyboard\n");
226 LPCSetConfig(LDN_KEYBOARD, 0x30, 0x0); /* disable keyboard */
228 LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); /* enable keyboard */
229 LPCSetConfig(LDN_KEYBOARD, 0xf0, 0x2);
230 LPCSetConfig(LDN_KEYBOARD, 0x71, 0x3);
232 LPCSetConfig(LDN_MOUSE, 0x30, 0x1); /* enable mouse */
234 LPCSetConfig(0x4, 0x30, 0x1);
235 LPCSetConfig(0x4, 0xf4, LPCGetConfig(0x4, 0xf4) | 0x80);
237 if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
238 (LPCGetConfig(LDN_MOUSE, 0x30) == 0))
239 printk("Error: keyboard or mouse not enabled\n");
245 printk("IT8712 Super IO not found\n");
249 #ifdef CONFIG_IT8172_CIR
252 //printk("Enabling CIR0\n");
253 IT_IO_READ16(IT_PM_DSR, data);
254 data &= ~IT_PM_DSR_CIR0SB;
255 IT_IO_WRITE16(IT_PM_DSR, data);
256 //printk("DSR register: %x\n", (unsigned)IT_IO_READ16(IT_PM_DSR, data));
259 #ifdef CONFIG_IT8172_SCR0
262 /* Enable Smart Card Reader 0 */
263 /* First power it up */
264 IT_IO_READ16(IT_PM_DSR, i);
265 i &= ~IT_PM_DSR_SCR0SB;
266 IT_IO_WRITE16(IT_PM_DSR, i);
267 /* Then initialize its registers */
268 outb(( IT_SCR_SFR_GATE_UART_OFF << IT_SCR_SFR_GATE_UART_BIT
269 |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
270 |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
271 |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
272 |IT_SCR_SFR_ENABLE_ON << IT_SCR_SFR_ENABLE_BIT),
273 IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SFR);
274 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
275 IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SCDR);
277 #endif /* CONFIG_IT8172_SCR0 */
278 #ifdef CONFIG_IT8172_SCR1
281 /* Enable Smart Card Reader 1 */
282 /* First power it up */
283 IT_IO_READ16(IT_PM_DSR, i);
284 i &= ~IT_PM_DSR_SCR1SB;
285 IT_IO_WRITE16(IT_PM_DSR, i);
286 /* Then initialize its registers */
287 outb(( IT_SCR_SFR_GATE_UART_OFF << IT_SCR_SFR_GATE_UART_BIT
288 |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
289 |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
290 |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
291 |IT_SCR_SFR_ENABLE_ON << IT_SCR_SFR_ENABLE_BIT),
292 IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SFR);
293 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
294 IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SCDR);
296 #endif /* CONFIG_IT8172_SCR1 */
299 #ifdef CONFIG_SERIO_I8042
301 * According to the ITE Special BIOS Note for waking up the
302 * keyboard controller...
304 static int init_8712_keyboard(void)
306 unsigned int cmd_port = 0x14000064;
307 unsigned int data_port = 0x14000060;
309 Somebody here doesn't grok the concept of io ports.
314 outb(0xaa, cmd_port); /* send self-test cmd */
316 while (!(inb(cmd_port) & 0x1)) { /* wait output buffer full */
322 data = inb(data_port);
323 outb(0xcb, cmd_port); /* set ps2 mode */
324 while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
329 outb(0x01, data_port);
330 while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
336 outb(0x60, cmd_port); /* write 8042 command byte */
337 while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
342 outb(0x45, data_port); /* at interface, keyboard enabled, system flag */
343 while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
349 outb(0xae, cmd_port); /* enable interface */