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[MIPS] Nuke redeclarations of board_time_init.
[linux-2.6] / arch / mips / ite-boards / generic / it8172_setup.c
1 /*
2  * BRIEF MODULE DESCRIPTION
3  *      IT8172/QED5231 board setup.
4  *
5  * Copyright 2000 MontaVista Software Inc.
6  * Author: MontaVista Software, Inc.
7  *              ppopov@mvista.com or source@mvista.com
8  *
9  *  This program is free software; you can redistribute  it and/or modify it
10  *  under  the terms of  the GNU General  Public License as published by the
11  *  Free Software Foundation;  either version 2 of the  License, or (at your
12  *  option) any later version.
13  *
14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  *
25  *  You should have received a copy of the  GNU General Public License along
26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
27  *  675 Mass Ave, Cambridge, MA 02139, USA.
28  */
29 #include <linux/init.h>
30 #include <linux/sched.h>
31 #include <linux/ioport.h>
32 #include <linux/irq.h>
33 #include <linux/serial_reg.h>
34 #include <linux/major.h>
35 #include <linux/kdev_t.h>
36 #include <linux/root_dev.h>
37 #include <linux/pm.h>
38
39 #include <asm/cpu.h>
40 #include <asm/time.h>
41 #include <asm/io.h>
42 #include <asm/bootinfo.h>
43 #include <asm/irq.h>
44 #include <asm/mipsregs.h>
45 #include <asm/reboot.h>
46 #include <asm/traps.h>
47 #include <asm/it8172/it8172.h>
48 #include <asm/it8712.h>
49
50 extern struct resource ioport_resource;
51 #ifdef CONFIG_SERIO_I8042
52 int init_8712_keyboard(void);
53 #endif
54
55 extern int SearchIT8712(void);
56 extern void InitLPCInterface(void);
57 extern char * __init prom_getcmdline(void);
58 extern void it8172_restart(char *command);
59 extern void it8172_halt(void);
60 extern void it8172_power_off(void);
61
62 extern void it8172_time_init(void);
63 extern void it8172_timer_setup(struct irqaction *irq);
64
65 #ifdef CONFIG_IT8172_REVC
66 struct {
67     struct resource ram;
68     struct resource pci_mem;
69     struct resource pci_io;
70     struct resource flash;
71     struct resource boot;
72 } it8172_resources = {
73         {
74                 .start  = 0,                            /* to be initted */
75                 .end    = 0,
76                 .name   = "RAM",
77                 .flags  = IORESOURCE_MEM
78         }, {
79                 .start  = 0x10000000,
80                 .end    = 0x13FFFFFF,
81                 .name   = "PCI Mem",
82                 .flags  = IORESOURCE_MEM
83         }, {
84                 .start  = 0x14000000,
85                 .end    = 0x17FFFFFF
86                 .name   = "PCI I/O",
87         }, {
88                 .start  = 0x08000000,
89                 .end    = 0x0CFFFFFF
90                 .name   = "Flash",
91         }, {
92                 .start  = 0x1FC00000,
93                 .end    = 0x1FFFFFFF
94                 .name   = "Boot ROM",
95         }
96 };
97 #else
98 struct {
99     struct resource ram;
100     struct resource pci_mem0;
101     struct resource pci_mem1;
102     struct resource pci_io;
103     struct resource pci_mem2;
104     struct resource pci_mem3;
105     struct resource flash;
106     struct resource boot;
107 } it8172_resources = {
108         {
109                 .start  = 0,                            /* to be initted */
110                 .end    = 0,
111                 .name   = "RAM",
112                 .flags  = IORESOURCE_MEM
113         }, {
114                 .start  = 0x0C000000,
115                 .end    = 0x0FFFFFFF,
116                 .name   = "PCI Mem0",
117                 .flags  = IORESOURCE_MEM
118          }, {
119                 .start  = 0x10000000,
120                 .end    = 0x13FFFFFF,
121                 .name   = "PCI Mem1",
122                 .flags  = IORESOURCE_MEM
123          }, {
124                 .start  = 0x14000000,
125                 .end    = 0x17FFFFFF
126                 .name   = "PCI I/O",
127         }, {
128                 .start  = 0x1A000000,
129                 .end    = 0x1BFFFFFF,
130                 .name   = "PCI Mem2",
131                 .flags  = IORESOURCE_MEM
132         }, {
133                 .start  = 0x1C000000,
134                 .end    = 0x1FBFFFFF,
135                 .name   = "PCI Mem3",
136                 .flags  = IORESOURCE_MEM
137         }, {
138                 .start  = 0x08000000,
139                 .end    = 0x0CFFFFFF
140                 .name   = "Flash",
141         }, {
142                 .start  = 0x1FC00000,
143                 .end    = 0x1FFFFFFF
144                 .name   = "Boot ROM",
145         }
146 };
147 #endif
148
149
150 void __init it8172_init_ram_resource(unsigned long memsize)
151 {
152         it8172_resources.ram.end = memsize;
153 }
154
155 void __init plat_mem_setup(void)
156 {
157         unsigned short dsr;
158         char *argptr;
159
160         argptr = prom_getcmdline();
161 #ifdef CONFIG_SERIAL_CONSOLE
162         if ((argptr = strstr(argptr, "console=")) == NULL) {
163                 argptr = prom_getcmdline();
164                 strcat(argptr, " console=ttyS0,115200");
165         }
166 #endif
167
168         clear_c0_status(ST0_FR);
169
170         board_time_init = it8172_time_init;
171         board_timer_setup = it8172_timer_setup;
172
173         _machine_restart = it8172_restart;
174         _machine_halt = it8172_halt;
175         pm_power_off = it8172_power_off;
176
177         /*
178          * IO/MEM resources.
179          *
180          * revisit this area.
181          */
182         set_io_port_base(KSEG1);
183         ioport_resource.start = it8172_resources.pci_io.start;
184         ioport_resource.end = it8172_resources.pci_io.end;
185 #ifdef CONFIG_IT8172_REVC
186         iomem_resource.start = it8172_resources.pci_mem.start;
187         iomem_resource.end = it8172_resources.pci_mem.end;
188 #else
189         iomem_resource.start = it8172_resources.pci_mem0.start;
190         iomem_resource.end = it8172_resources.pci_mem3.end;
191 #endif
192
193 #ifdef CONFIG_BLK_DEV_INITRD
194         ROOT_DEV = Root_RAM0;
195 #endif
196
197         /*
198          * Pull enabled devices out of standby
199          */
200         IT_IO_READ16(IT_PM_DSR, dsr);
201
202         /*
203          * Fixme: This breaks when these drivers are modules!!!
204          */
205 #ifdef CONFIG_SOUND_IT8172
206         dsr &= ~IT_PM_DSR_ACSB;
207 #else
208         dsr |= IT_PM_DSR_ACSB;
209 #endif
210 #ifdef CONFIG_BLK_DEV_IT8172
211         dsr &= ~IT_PM_DSR_IDESB;
212 #else
213         dsr |= IT_PM_DSR_IDESB;
214 #endif
215         IT_IO_WRITE16(IT_PM_DSR, dsr);
216
217         InitLPCInterface();
218
219 #ifdef CONFIG_MIPS_ITE8172
220         if (SearchIT8712()) {
221                 printk("Found IT8712 Super IO\n");
222                 /* enable IT8712 serial port */
223                 LPCSetConfig(LDN_SERIAL1, 0x30, 0x01); /* enable */
224                 LPCSetConfig(LDN_SERIAL1, 0x23, 0x01); /* clock selection */
225 #ifdef CONFIG_SERIO_I8042
226                 if (init_8712_keyboard()) {
227                         printk("Unable to initialize keyboard\n");
228                         LPCSetConfig(LDN_KEYBOARD, 0x30, 0x0); /* disable keyboard */
229                 } else {
230                         LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); /* enable keyboard */
231                         LPCSetConfig(LDN_KEYBOARD, 0xf0, 0x2);
232                         LPCSetConfig(LDN_KEYBOARD, 0x71, 0x3);
233
234                         LPCSetConfig(LDN_MOUSE, 0x30, 0x1); /* enable mouse */
235
236                         LPCSetConfig(0x4, 0x30, 0x1);
237                         LPCSetConfig(0x4, 0xf4, LPCGetConfig(0x4, 0xf4) | 0x80);
238
239                         if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
240                                         (LPCGetConfig(LDN_MOUSE, 0x30) == 0))
241                                 printk("Error: keyboard or mouse not enabled\n");
242
243                 }
244 #endif
245         }
246         else {
247                 printk("IT8712 Super IO not found\n");
248         }
249 #endif
250
251 #ifdef CONFIG_IT8172_CIR
252         {
253                 unsigned long data;
254                 //printk("Enabling CIR0\n");
255                 IT_IO_READ16(IT_PM_DSR, data);
256                 data &= ~IT_PM_DSR_CIR0SB;
257                 IT_IO_WRITE16(IT_PM_DSR, data);
258                 //printk("DSR register: %x\n", (unsigned)IT_IO_READ16(IT_PM_DSR, data));
259         }
260 #endif
261 #ifdef CONFIG_IT8172_SCR0
262         {
263                 unsigned i;
264                 /* Enable Smart Card Reader 0 */
265                 /* First power it up */
266                 IT_IO_READ16(IT_PM_DSR, i);
267                 i &= ~IT_PM_DSR_SCR0SB;
268                 IT_IO_WRITE16(IT_PM_DSR, i);
269                 /* Then initialize its registers */
270                 outb(( IT_SCR_SFR_GATE_UART_OFF     << IT_SCR_SFR_GATE_UART_BIT
271                       |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
272                       |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
273                       |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
274                       |IT_SCR_SFR_ENABLE_ON         << IT_SCR_SFR_ENABLE_BIT),
275                      IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SFR);
276                 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
277                      IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SCDR);
278         }
279 #endif /* CONFIG_IT8172_SCR0 */
280 #ifdef CONFIG_IT8172_SCR1
281         {
282                 unsigned i;
283                 /* Enable Smart Card Reader 1 */
284                 /* First power it up */
285                 IT_IO_READ16(IT_PM_DSR, i);
286                 i &= ~IT_PM_DSR_SCR1SB;
287                 IT_IO_WRITE16(IT_PM_DSR, i);
288                 /* Then initialize its registers */
289                 outb(( IT_SCR_SFR_GATE_UART_OFF     << IT_SCR_SFR_GATE_UART_BIT
290                       |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
291                       |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
292                       |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
293                       |IT_SCR_SFR_ENABLE_ON         << IT_SCR_SFR_ENABLE_BIT),
294                      IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SFR);
295                 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
296                      IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SCDR);
297         }
298 #endif /* CONFIG_IT8172_SCR1 */
299 }
300
301 #ifdef CONFIG_SERIO_I8042
302 /*
303  * According to the ITE Special BIOS Note for waking up the
304  * keyboard controller...
305  */
306 static int init_8712_keyboard(void)
307 {
308         unsigned int cmd_port = 0x14000064;
309         unsigned int data_port = 0x14000060;
310                                  ^^^^^^^^^^^
311         Somebody here doesn't grok the concept of io ports.
312
313         unsigned char data;
314         int i;
315
316         outb(0xaa, cmd_port); /* send self-test cmd */
317         i = 0;
318         while (!(inb(cmd_port) & 0x1)) { /* wait output buffer full */
319                 i++;
320                 if (i > 0xffffff)
321                         return 1;
322         }
323
324         data = inb(data_port);
325         outb(0xcb, cmd_port); /* set ps2 mode */
326         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
327                 i++;
328                 if (i > 0xffffff)
329                         return 1;
330         }
331         outb(0x01, data_port);
332         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
333                 i++;
334                 if (i > 0xffffff)
335                         return 1;
336         }
337
338         outb(0x60, cmd_port); /* write 8042 command byte */
339         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
340                 i++;
341                 if (i > 0xffffff)
342                         return 1;
343         }
344         outb(0x45, data_port); /* at interface, keyboard enabled, system flag */
345         while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
346                 i++;
347                 if (i > 0xffffff)
348                         return 1;
349         }
350
351         outb(0xae, cmd_port); /* enable interface */
352         return 0;
353 }
354 #endif