2 # This file is subject to the terms and conditions of the GNU General Public
3 # License. See the file "COPYING" in the main directory of this archive
6 # Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7 # DECStation modifications by Paul M. Antoine, 1996
8 # Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
10 # This file is included by the global makefile so that you can add your own
11 # architecture-specific flags and dependencies. Remember to do have actions
12 # for "archclean" cleaning up for this architecture.
18 # Select the object file format to substitute into the linker script.
20 ifdef CONFIG_CPU_LITTLE_ENDIAN
21 32bit-tool-prefix = mipsel-linux-
22 64bit-tool-prefix = mips64el-linux-
23 32bit-bfd = elf32-tradlittlemips
24 64bit-bfd = elf64-tradlittlemips
25 32bit-emul = elf32ltsmip
26 64bit-emul = elf64ltsmip
28 32bit-tool-prefix = mips-linux-
29 64bit-tool-prefix = mips64-linux-
30 32bit-bfd = elf32-tradbigmips
31 64bit-bfd = elf64-tradbigmips
32 32bit-emul = elf32btsmip
33 64bit-emul = elf64btsmip
37 tool-prefix = $(32bit-tool-prefix)
41 tool-prefix = $(64bit-tool-prefix)
45 ifdef CONFIG_CROSSCOMPILE
46 CROSS_COMPILE := $(tool-prefix)
50 ld-emul = $(32bit-emul)
52 vmlinux-64 = vmlinux.64
58 ld-emul = $(64bit-emul)
59 vmlinux-32 = vmlinux.32
63 ifdef CONFIG_BUILD_ELF64
64 cflags-y += $(call cc-option,-mno-explicit-relocs)
66 cflags-y += $(call cc-option,-msym32)
72 # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
73 # code since it only slows down the whole thing. At some point we might make
74 # use of global pointer optimizations but their use of $28 conflicts with
75 # the current pointer optimization.
77 # The DECStation requires an ECOFF kernel for remote booting, other MIPS
78 # machines may also. Since BFD is incredibly buggy with respect to
79 # crossformat linking we rely on the elf2ecoff tool for format conversion.
81 cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
82 cflags-y += -msoft-float
83 LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
84 MODFLAGS += -mlong-calls
86 cflags-y += -ffreestanding
89 # We explicitly add the endianness specifier if needed, this allows
90 # to compile kernels with a toolchain for the other endianness. We
91 # carefully avoid to add it redundantly because gcc 3.3/3.4 complains
92 # when fed the toolchain default!
94 cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB -D__MIPSEB__)
95 cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL -D__MIPSEL__)
97 cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
98 -fno-omit-frame-pointer
101 # CPU-dependent compiler/assembler options for optimization.
103 cflags-$(CONFIG_CPU_R3000) += -march=r3000
104 cflags-$(CONFIG_CPU_TX39XX) += -march=r3900
105 cflags-$(CONFIG_CPU_R6000) += -march=r6000 -Wa,--trap
106 cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
107 cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
108 cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
109 cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
110 cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
111 -Wa,-mips32 -Wa,--trap
112 cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
113 -Wa,-mips32r2 -Wa,--trap
114 cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
115 -Wa,-mips64 -Wa,--trap
116 cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
117 -Wa,-mips64r2 -Wa,--trap
118 cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
119 cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
121 cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
123 cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
125 cflags-$(CONFIG_CPU_RM9000) += $(call cc-option,-march=rm9000,-march=r5000) \
127 cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \
129 cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
130 cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
134 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
135 MODFLAGS += -msb1-pass1-workarounds
142 libs-$(CONFIG_ARC) += arch/mips/arc/
143 libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
146 # Board-dependent options and extra files
150 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
152 core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
153 cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
154 load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
157 # Common Alchemy Au1x00 stuff
159 core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
160 cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
163 # AMD Alchemy Pb1000 eval board
165 libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
166 cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
167 load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
170 # AMD Alchemy Pb1100 eval board
172 libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
173 cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
174 load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
177 # AMD Alchemy Pb1500 eval board
179 libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
180 cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
181 load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
184 # AMD Alchemy Pb1550 eval board
186 libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
187 cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
188 load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
191 # AMD Alchemy Pb1200 eval board
193 libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
194 cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
195 load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
198 # AMD Alchemy Db1000 eval board
200 libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
201 cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
202 load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
205 # AMD Alchemy Db1100 eval board
207 libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
208 cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
209 load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
212 # AMD Alchemy Db1500 eval board
214 libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
215 cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
216 load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
219 # AMD Alchemy Db1550 eval board
221 libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
222 cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
223 load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
226 # AMD Alchemy Db1200 eval board
228 libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
229 cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
230 load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
233 # AMD Alchemy Bosporus eval board
235 libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
236 cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
237 load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
240 # AMD Alchemy Mirage eval board
242 libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
243 cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
244 load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
247 # 4G-Systems eval board
249 libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
250 load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
255 libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
256 load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
261 core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
262 cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
263 load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
268 core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
269 cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
270 libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
271 load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
272 CLEAN_FILES += drivers/tc/lk201-map.c
275 # Galileo EV64120 Board
277 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
278 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
279 cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
280 load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
283 # Galileo EV96100 Board
285 core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
286 cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
287 load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
290 # Wind River PPMC Board (4KC + GT64120)
292 core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
293 cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc
294 load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
297 # Globespan IVR eval board with QED 5231 CPU
299 core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
300 core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
301 load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
304 # ITE 8172 eval board with QED 5231 CPU
306 core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
307 load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
310 # For all MIPS, Inc. eval boards
312 core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
317 core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
318 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
319 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
320 load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
325 core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
326 cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
327 load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
332 core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
333 load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
338 core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
339 cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
340 load-$(CONFIG_MIPS_SIM) += 0x80100000
343 # Momentum Ocelot board
345 # The Ocelot setup.o must be linked early - it does the ioremap() for the
348 core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
349 arch/mips/gt64120/momenco_ocelot/
350 cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
351 load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
354 # Momentum Ocelot-G board
356 # The Ocelot-G setup.o must be linked early - it does the ioremap() for the
359 core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
360 load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
363 # Momentum Ocelot-C and -CS boards
365 # The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
367 core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
368 load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
371 # PMC-Sierra Yosemite
373 core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
374 cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
375 load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
377 # Qemu simulating MIPS32 4Kc
379 core-$(CONFIG_QEMU) += arch/mips/qemu/
380 cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
381 load-$(CONFIG_QEMU) += 0xffffffff80010000
386 core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
387 cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
388 load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
391 # Momentum Jaguar ATX
393 core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
394 cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
395 #ifdef CONFIG_JAGUAR_DMALOW
396 #load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
398 load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
404 core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
409 core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
410 load-$(CONFIG_DDB5477) += 0xffffffff80100000
412 core-$(CONFIG_LASAT) += arch/mips/lasat/
413 cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
414 load-$(CONFIG_LASAT) += 0xffffffff80000000
419 core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
420 cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
425 core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
426 load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
429 # ZAO Networks Capcella (VR4131)
431 load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
434 # Victor MP-C303/304 (VR4122)
436 load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
439 # IBM WorkPad z50 (VR4121)
441 core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
442 load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
445 # CASIO CASSIPEIA E-55/65 (VR4111)
447 core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
448 load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
451 # TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
453 load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
456 # Common Philips PNX8550
458 core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
459 cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
462 # Philips PNX8550 JBS board
464 libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
465 #cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
466 load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
469 # SGI IP22 (Indy/Indigo2)
471 # Set the load address to >= 0xffffffff88069000 if you want to leave space for
472 # symmon, 0xffffffff80002000 for production kernels. Note that the value must
473 # be aligned to a multiple of the kernel stack size or the handling of the
474 # current variable will break so for 64-bit kernels we have to raise the start
477 core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
478 cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
480 load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
483 load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
487 # SGI-IP27 (Origin200/2000)
489 # Set the load address to >= 0xc000000000300000 if you want to leave space for
490 # symmon, 0xc00000000001c000 for production kernels. Note that the value must
491 # be 16kb aligned or the handling of the current variable will break.
493 ifdef CONFIG_SGI_IP27
494 core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
495 cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
496 ifdef CONFIG_MAPPED_KERNEL
497 load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
498 OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
499 dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
501 load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
502 OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
509 # Set the load address to >= 80069000 if you want to leave space for symmon,
510 # 0xffffffff80004000 for production kernels. Note that the value must be aligned to
511 # a multiple of the kernel stack size or the handling of the current variable
514 core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
515 cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
516 load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
521 # This is a LIB so that it links at the end, and initcalls are later
522 # the sequence; but it is built as an object so that modules don't get
523 # removed (as happens, even if they have __initcall/module_init)
525 core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
526 cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
527 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
529 core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
530 cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
531 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
533 core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
534 cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
535 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
537 core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
538 cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
539 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
542 # Sibyte BCM91120x (Carmel) board
543 # Sibyte BCM91120C (CRhine) board
544 # Sibyte BCM91125C (CRhone) board
545 # Sibyte BCM91125E (Rhone) board
547 # Sibyte BCM91x80 (BigSur) board
549 libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
550 load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
551 libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
552 load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
553 libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
554 load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
555 libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
556 load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
557 libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
558 load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
559 libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
560 load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
561 libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
562 load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
567 core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
568 cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
569 load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
572 # Toshiba JMR-TX3927 board
574 core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
575 arch/mips/jmr3927/common/
576 cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
577 load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
580 # Toshiba RBTX4927 board or
581 # Toshiba RBTX4937 board
583 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
584 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
585 load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
588 # Toshiba RBTX4938 board
590 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
591 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
592 load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
594 cflags-y += -Iinclude/asm-mips/mach-generic
595 drivers-$(CONFIG_PCI) += arch/mips/pci/
598 ifdef CONFIG_CPU_LITTLE_ENDIAN
601 JIFFIES = jiffies_64 + 4
607 AFLAGS += $(cflags-y)
608 CFLAGS += $(cflags-y)
610 LDFLAGS += -m $(ld-emul)
613 CHECKFLAGS += $(shell $(CC) $(CFLAGS) -dM -E -xc /dev/null | \
614 egrep -vw '__GNUC_(MAJOR|MINOR|PATCHLEVEL)__' | \
615 sed -e 's/^\#define /-D/' -e "s/ /='/" -e "s/$$/'/")
621 OBJCOPYFLAGS += --remove-section=.reginfo
624 # Choosing incompatible machines durings configuration will result in
625 # error messages during linking. Select a default linkscript if
626 # none has been choosen above.
629 CPPFLAGS_vmlinux.lds := \
631 -D"LOADADDR=$(load-y)" \
632 -D"JIFFIES=$(JIFFIES)" \
633 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
635 head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
637 libs-y += arch/mips/lib/
638 libs-$(CONFIG_32BIT) += arch/mips/lib-32/
639 libs-$(CONFIG_64BIT) += arch/mips/lib-64/
641 core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
643 drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
646 rom.bin rom.sw: vmlinux
647 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
651 # Some machines like the Indy need 32-bit ELF binaries for booting purposes.
652 # Other need ECOFF, so we build a 32-bit ELF binary for them which we then
653 # convert to ECOFF using elf2ecoff.
656 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
659 # The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
660 # ELF files from 32-bit files by conversion.
663 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
665 makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
667 ifdef CONFIG_BOOT_ELF32
671 ifdef CONFIG_BOOT_ELF64
675 ifdef CONFIG_MIPS_ATLAS
679 ifdef CONFIG_MIPS_MALTA
683 ifdef CONFIG_MIPS_SEAD
691 ifdef CONFIG_SNI_RM200_PCI
695 vmlinux.bin: $(vmlinux-32)
696 +@$(call makeboot,$@)
698 vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
699 +@$(call makeboot,$@)
701 vmlinux.srec: $(vmlinux-32)
702 +@$(call makeboot,$@)
704 CLEAN_FILES += vmlinux.ecoff \
710 @$(MAKE) $(clean)=arch/mips/boot
711 @$(MAKE) $(clean)=arch/mips/lasat
713 CLEAN_FILES += vmlinux.32 \