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[linux-2.6] / arch / ia64 / kernel / patch.c
1 /*
2  * Instruction-patching support.
3  *
4  * Copyright (C) 2003 Hewlett-Packard Co
5  *      David Mosberger-Tang <davidm@hpl.hp.com>
6  */
7 #include <linux/init.h>
8 #include <linux/string.h>
9
10 #include <asm/patch.h>
11 #include <asm/processor.h>
12 #include <asm/sections.h>
13 #include <asm/system.h>
14 #include <asm/unistd.h>
15
16 /*
17  * This was adapted from code written by Tony Luck:
18  *
19  * The 64-bit value in a "movl reg=value" is scattered between the two words of the bundle
20  * like this:
21  *
22  * 6  6         5         4         3         2         1
23  * 3210987654321098765432109876543210987654321098765432109876543210
24  * ABBBBBBBBBBBBBBBBBBBBBBBCCCCCCCCCCCCCCCCCCDEEEEEFFFFFFFFFGGGGGGG
25  *
26  * CCCCCCCCCCCCCCCCCCxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
27  * xxxxAFFFFFFFFFEEEEEDxGGGGGGGxxxxxxxxxxxxxBBBBBBBBBBBBBBBBBBBBBBB
28  */
29 static u64
30 get_imm64 (u64 insn_addr)
31 {
32         u64 *p = (u64 *) (insn_addr & -16);     /* mask out slot number */
33
34         return ( (p[1] & 0x0800000000000000UL) << 4)  | /*A*/
35                 ((p[1] & 0x00000000007fffffUL) << 40) | /*B*/
36                 ((p[0] & 0xffffc00000000000UL) >> 24) | /*C*/
37                 ((p[1] & 0x0000100000000000UL) >> 23) | /*D*/
38                 ((p[1] & 0x0003e00000000000UL) >> 29) | /*E*/
39                 ((p[1] & 0x07fc000000000000UL) >> 43) | /*F*/
40                 ((p[1] & 0x000007f000000000UL) >> 36);  /*G*/
41 }
42
43 /* Patch instruction with "val" where "mask" has 1 bits. */
44 void
45 ia64_patch (u64 insn_addr, u64 mask, u64 val)
46 {
47         u64 m0, m1, v0, v1, b0, b1, *b = (u64 *) (insn_addr & -16);
48 #       define insn_mask ((1UL << 41) - 1)
49         unsigned long shift;
50
51         b0 = b[0]; b1 = b[1];
52         shift = 5 + 41 * (insn_addr % 16); /* 5 bits of template, then 3 x 41-bit instructions */
53         if (shift >= 64) {
54                 m1 = mask << (shift - 64);
55                 v1 = val << (shift - 64);
56         } else {
57                 m0 = mask << shift; m1 = mask >> (64 - shift);
58                 v0 = val  << shift; v1 = val >> (64 - shift);
59                 b[0] = (b0 & ~m0) | (v0 & m0);
60         }
61         b[1] = (b1 & ~m1) | (v1 & m1);
62 }
63
64 void
65 ia64_patch_imm64 (u64 insn_addr, u64 val)
66 {
67         ia64_patch(insn_addr,
68                    0x01fffefe000UL, (  ((val & 0x8000000000000000UL) >> 27) /* bit 63 -> 36 */
69                                      | ((val & 0x0000000000200000UL) <<  0) /* bit 21 -> 21 */
70                                      | ((val & 0x00000000001f0000UL) <<  6) /* bit 16 -> 22 */
71                                      | ((val & 0x000000000000ff80UL) << 20) /* bit  7 -> 27 */
72                                      | ((val & 0x000000000000007fUL) << 13) /* bit  0 -> 13 */));
73         ia64_patch(insn_addr - 1, 0x1ffffffffffUL, val >> 22);
74 }
75
76 void
77 ia64_patch_imm60 (u64 insn_addr, u64 val)
78 {
79         ia64_patch(insn_addr,
80                    0x011ffffe000UL, (  ((val & 0x0800000000000000UL) >> 23) /* bit 59 -> 36 */
81                                      | ((val & 0x00000000000fffffUL) << 13) /* bit  0 -> 13 */));
82         ia64_patch(insn_addr - 1, 0x1fffffffffcUL, val >> 18);
83 }
84
85 /*
86  * We need sometimes to load the physical address of a kernel
87  * object.  Often we can convert the virtual address to physical
88  * at execution time, but sometimes (either for performance reasons
89  * or during error recovery) we cannot to this.  Patch the marked
90  * bundles to load the physical address.
91  */
92 void __init
93 ia64_patch_vtop (unsigned long start, unsigned long end)
94 {
95         s32 *offp = (s32 *) start;
96         u64 ip;
97
98         while (offp < (s32 *) end) {
99                 ip = (u64) offp + *offp;
100
101                 /* replace virtual address with corresponding physical address: */
102                 ia64_patch_imm64(ip, ia64_tpa(get_imm64(ip)));
103                 ia64_fc((void *) ip);
104                 ++offp;
105         }
106         ia64_sync_i();
107         ia64_srlz_i();
108 }
109
110 void
111 ia64_patch_mckinley_e9 (unsigned long start, unsigned long end)
112 {
113         static int first_time = 1;
114         int need_workaround;
115         s32 *offp = (s32 *) start;
116         u64 *wp;
117
118         need_workaround = (local_cpu_data->family == 0x1f && local_cpu_data->model == 0);
119
120         if (first_time) {
121                 first_time = 0;
122                 if (need_workaround)
123                         printk(KERN_INFO "Leaving McKinley Errata 9 workaround enabled\n");
124                 else
125                         printk(KERN_INFO "McKinley Errata 9 workaround not needed; "
126                                "disabling it\n");
127         }
128         if (need_workaround)
129                 return;
130
131         while (offp < (s32 *) end) {
132                 wp = (u64 *) ia64_imva((char *) offp + *offp);
133                 wp[0] = 0x0000000100000000UL; /* nop.m 0; nop.i 0; nop.i 0 */
134                 wp[1] = 0x0004000000000200UL;
135                 wp[2] = 0x0000000100000011UL; /* nop.m 0; nop.i 0; br.ret.sptk.many b6 */
136                 wp[3] = 0x0084006880000200UL;
137                 ia64_fc(wp); ia64_fc(wp + 2);
138                 ++offp;
139         }
140         ia64_sync_i();
141         ia64_srlz_i();
142 }
143
144 static void
145 patch_fsyscall_table (unsigned long start, unsigned long end)
146 {
147         extern unsigned long fsyscall_table[NR_syscalls];
148         s32 *offp = (s32 *) start;
149         u64 ip;
150
151         while (offp < (s32 *) end) {
152                 ip = (u64) ia64_imva((char *) offp + *offp);
153                 ia64_patch_imm64(ip, (u64) fsyscall_table);
154                 ia64_fc((void *) ip);
155                 ++offp;
156         }
157         ia64_sync_i();
158         ia64_srlz_i();
159 }
160
161 static void
162 patch_brl_fsys_bubble_down (unsigned long start, unsigned long end)
163 {
164         extern char fsys_bubble_down[];
165         s32 *offp = (s32 *) start;
166         u64 ip;
167
168         while (offp < (s32 *) end) {
169                 ip = (u64) offp + *offp;
170                 ia64_patch_imm60((u64) ia64_imva((void *) ip),
171                                  (u64) (fsys_bubble_down - (ip & -16)) / 16);
172                 ia64_fc((void *) ip);
173                 ++offp;
174         }
175         ia64_sync_i();
176         ia64_srlz_i();
177 }
178
179 void
180 ia64_patch_gate (void)
181 {
182 #       define START(name)      ((unsigned long) __start_gate_##name##_patchlist)
183 #       define END(name)        ((unsigned long)__end_gate_##name##_patchlist)
184
185         patch_fsyscall_table(START(fsyscall), END(fsyscall));
186         patch_brl_fsys_bubble_down(START(brl_fsys_bubble_down), END(brl_fsys_bubble_down));
187         ia64_patch_vtop(START(vtop), END(vtop));
188         ia64_patch_mckinley_e9(START(mckinley_e9), END(mckinley_e9));
189 }