2 * Unmaintained SGI Visual Workstation support.
3 * Split out from setup.c by davej@suse.de
7 #include <linux/init.h>
9 #include <linux/interrupt.h>
11 #include <asm/fixmap.h>
12 #include <asm/arch_hooks.h>
17 char visws_board_type = -1;
18 char visws_board_rev = -1;
20 void __init visws_get_board_type_and_rev(void)
24 visws_board_type = (char)(inb_p(PIIX_GPI_BD_REG) & PIIX_GPI_BD_REG)
28 * First, we have to initialize the 307 part to allow us access
29 * to the GPIO registers. Let's map them at 0x0fc0 which is right
30 * after the PIIX4 PM section.
32 outb_p(SIO_DEV_SEL, SIO_INDEX);
33 outb_p(SIO_GP_DEV, SIO_DATA); /* Talk to GPIO regs. */
35 outb_p(SIO_DEV_MSB, SIO_INDEX);
36 outb_p(SIO_GP_MSB, SIO_DATA); /* MSB of GPIO base address */
38 outb_p(SIO_DEV_LSB, SIO_INDEX);
39 outb_p(SIO_GP_LSB, SIO_DATA); /* LSB of GPIO base address */
41 outb_p(SIO_DEV_ENB, SIO_INDEX);
42 outb_p(1, SIO_DATA); /* Enable GPIO registers. */
45 * Now, we have to map the power management section to write
46 * a bit which enables access to the GPIO registers.
47 * What lunatic came up with this shit?
49 outb_p(SIO_DEV_SEL, SIO_INDEX);
50 outb_p(SIO_PM_DEV, SIO_DATA); /* Talk to GPIO regs. */
52 outb_p(SIO_DEV_MSB, SIO_INDEX);
53 outb_p(SIO_PM_MSB, SIO_DATA); /* MSB of PM base address */
55 outb_p(SIO_DEV_LSB, SIO_INDEX);
56 outb_p(SIO_PM_LSB, SIO_DATA); /* LSB of PM base address */
58 outb_p(SIO_DEV_ENB, SIO_INDEX);
59 outb_p(1, SIO_DATA); /* Enable PM registers. */
62 * Now, write the PM register which enables the GPIO registers.
64 outb_p(SIO_PM_FER2, SIO_PM_INDEX);
65 outb_p(SIO_PM_GP_EN, SIO_PM_DATA);
68 * Now, initialize the GPIO registers.
69 * We want them all to be inputs which is the
70 * power on default, so let's leave them alone.
71 * So, let's just read the board rev!
73 raw = inb_p(SIO_GP_DATA1);
74 raw &= 0x7f; /* 7 bits of valid board revision ID. */
76 if (visws_board_type == VISWS_320) {
79 } else if (raw < 0xc) {
84 } else if (visws_board_type == VISWS_540) {
87 visws_board_rev = raw;
90 printk(KERN_INFO "Silicon Graphics Visual Workstation %s (rev %d) detected\n",
91 (visws_board_type == VISWS_320 ? "320" :
92 (visws_board_type == VISWS_540 ? "540" :
93 "unknown")), visws_board_rev);
96 void __init pre_intr_init_hook(void)
98 init_VISWS_APIC_irqs();
101 void __init intr_init_hook(void)
103 #ifdef CONFIG_X86_LOCAL_APIC
108 void __init pre_setup_arch_hook()
110 visws_get_board_type_and_rev();
113 static struct irqaction irq0 = {
114 .handler = timer_interrupt,
115 .flags = SA_INTERRUPT,
119 void __init time_init_hook(void)
121 printk(KERN_INFO "Starting Cobalt Timer system clock\n");
123 /* Set the countdown value */
124 co_cpu_write(CO_CPU_TIMEVAL, CO_TIME_HZ/HZ);
126 /* Start the timer */
127 co_cpu_write(CO_CPU_CTRL, co_cpu_read(CO_CPU_CTRL) | CO_CTRL_TIMERUN);
129 /* Enable (unmask) the timer interrupt */
130 co_cpu_write(CO_CPU_CTRL, co_cpu_read(CO_CPU_CTRL) & ~CO_CTRL_TIMEMASK);
132 /* Wire cpu IDT entry to s/w handler (and Cobalt APIC to IDT) */