2 * linux/arch/i386/kernel/time_hpet.c
3 * This code largely copied from arch/x86_64/kernel/time.c
4 * See that file for credits.
6 * 2003-06-30 Venkatesh Pallipadi - Additional changes for HPET support
9 #include <linux/errno.h>
10 #include <linux/kernel.h>
11 #include <linux/param.h>
12 #include <linux/string.h>
13 #include <linux/init.h>
14 #include <linux/smp.h>
16 #include <asm/timer.h>
17 #include <asm/fixmap.h>
20 #include <linux/timex.h>
23 #include <linux/hpet.h>
25 static unsigned long hpet_period; /* fsecs / HPET clock */
26 unsigned long hpet_tick; /* hpet clks count per tick */
27 unsigned long hpet_address; /* hpet memory map physical address */
30 static int use_hpet; /* can be used for runtime check of hpet */
31 static int boot_hpet_disable; /* boottime override for HPET timer */
32 static void __iomem * hpet_virt_address; /* hpet kernel virtual address */
34 #define FSEC_TO_USEC (1000000000UL)
36 int hpet_readl(unsigned long a)
38 return readl(hpet_virt_address + a);
41 static void hpet_writel(unsigned long d, unsigned long a)
43 writel(d, hpet_virt_address + a);
46 #ifdef CONFIG_X86_LOCAL_APIC
48 * HPET counters dont wrap around on every tick. They just change the
49 * comparator value and continue. Next tick can be caught by checking
50 * for a change in the comparator value. Used in apic.c.
52 static void __devinit wait_hpet_tick(void)
54 unsigned int start_cmp_val, end_cmp_val;
56 start_cmp_val = hpet_readl(HPET_T0_CMP);
58 end_cmp_val = hpet_readl(HPET_T0_CMP);
59 } while (start_cmp_val == end_cmp_val);
63 static int hpet_timer_stop_set_go(unsigned long tick)
68 * Stop the timers and reset the main counter.
70 cfg = hpet_readl(HPET_CFG);
71 cfg &= ~HPET_CFG_ENABLE;
72 hpet_writel(cfg, HPET_CFG);
73 hpet_writel(0, HPET_COUNTER);
74 hpet_writel(0, HPET_COUNTER + 4);
78 * Set up timer 0, as periodic with first interrupt to happen at
79 * hpet_tick, and period also hpet_tick.
81 cfg = hpet_readl(HPET_T0_CFG);
82 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
83 HPET_TN_SETVAL | HPET_TN_32BIT;
84 hpet_writel(cfg, HPET_T0_CFG);
87 * The first write after writing TN_SETVAL to the config register sets
88 * the counter value, the second write sets the threshold.
90 hpet_writel(tick, HPET_T0_CMP);
91 hpet_writel(tick, HPET_T0_CMP);
96 cfg = hpet_readl(HPET_CFG);
98 cfg |= HPET_CFG_LEGACY;
99 cfg |= HPET_CFG_ENABLE;
100 hpet_writel(cfg, HPET_CFG);
106 * Check whether HPET was found by ACPI boot parse. If yes setup HPET
107 * counter 0 for kernel base timer.
109 int __init hpet_enable(void)
112 unsigned long tick_fsec_low, tick_fsec_high; /* tick in femto sec */
113 unsigned long hpet_tick_rem;
115 if (boot_hpet_disable)
121 hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
123 * Read the period, compute tick and quotient.
125 id = hpet_readl(HPET_ID);
128 * We are checking for value '1' or more in number field if
129 * CONFIG_HPET_EMULATE_RTC is set because we will need an
130 * additional timer for RTC emulation.
131 * However, we can do with one timer otherwise using the
132 * the single HPET timer for system time.
134 #ifdef CONFIG_HPET_EMULATE_RTC
135 if (!(id & HPET_ID_NUMBER)) {
136 iounmap(hpet_virt_address);
137 hpet_virt_address = NULL;
143 hpet_period = hpet_readl(HPET_PERIOD);
144 if ((hpet_period < HPET_MIN_PERIOD) || (hpet_period > HPET_MAX_PERIOD)) {
145 iounmap(hpet_virt_address);
146 hpet_virt_address = NULL;
152 * First changing tick into fsec
153 * Then 64 bit div to find number of hpet clk per tick
155 ASM_MUL64_REG(tick_fsec_low, tick_fsec_high,
156 KERNEL_TICK_USEC, FSEC_TO_USEC);
157 ASM_DIV64_REG(hpet_tick, hpet_tick_rem,
158 hpet_period, tick_fsec_low, tick_fsec_high);
160 if (hpet_tick_rem > (hpet_period >> 1))
161 hpet_tick++; /* rounding the result */
163 hpet_use_timer = id & HPET_ID_LEGSUP;
165 if (hpet_timer_stop_set_go(hpet_tick)) {
166 iounmap(hpet_virt_address);
167 hpet_virt_address = NULL;
178 memset(&hd, 0, sizeof (hd));
180 ntimer = hpet_readl(HPET_ID);
181 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
185 * Register with driver.
186 * Timer0 and Timer1 is used by platform.
188 hd.hd_phys_address = hpet_address;
189 hd.hd_address = hpet_virt_address;
190 hd.hd_nirqs = ntimer;
191 hd.hd_flags = HPET_DATA_PLATFORM;
192 hpet_reserve_timer(&hd, 0);
193 #ifdef CONFIG_HPET_EMULATE_RTC
194 hpet_reserve_timer(&hd, 1);
196 hd.hd_irq[0] = HPET_LEGACY_8254;
197 hd.hd_irq[1] = HPET_LEGACY_RTC;
199 struct hpet __iomem *hpet;
200 struct hpet_timer __iomem *timer;
203 hpet = hpet_virt_address;
205 for (i = 2, timer = &hpet->hpet_timers[2]; i < ntimer;
207 hd.hd_irq[i] = (timer->hpet_config &
208 Tn_INT_ROUTE_CNF_MASK) >>
209 Tn_INT_ROUTE_CNF_SHIFT;
217 #ifdef CONFIG_X86_LOCAL_APIC
219 wait_timer_tick = wait_hpet_tick;
224 int hpet_reenable(void)
226 return hpet_timer_stop_set_go(hpet_tick);
229 int is_hpet_enabled(void)
234 int is_hpet_capable(void)
236 if (!boot_hpet_disable && hpet_address)
241 static int __init hpet_setup(char* str)
244 if (!strncmp("disable", str, 7))
245 boot_hpet_disable = 1;
250 __setup("hpet=", hpet_setup);
252 #ifdef CONFIG_HPET_EMULATE_RTC
253 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
254 * is enabled, we support RTC interrupt functionality in software.
255 * RTC has 3 kinds of interrupts:
256 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
258 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
259 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
260 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
261 * (1) and (2) above are implemented using polling at a frequency of
262 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
263 * overhead. (DEFAULT_RTC_INT_FREQ)
264 * For (3), we use interrupts at 64Hz or user specified periodic
265 * frequency, whichever is higher.
267 #include <linux/mc146818rtc.h>
268 #include <linux/rtc.h>
270 #define DEFAULT_RTC_INT_FREQ 64
271 #define RTC_NUM_INTS 1
273 static unsigned long UIE_on;
274 static unsigned long prev_update_sec;
276 static unsigned long AIE_on;
277 static struct rtc_time alarm_time;
279 static unsigned long PIE_on;
280 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
281 static unsigned long PIE_count;
283 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
284 static unsigned int hpet_t1_cmp; /* cached comparator register */
287 * Timer 1 for RTC, we do not use periodic interrupt feature,
288 * even if HPET supports periodic interrupts on Timer 1.
289 * The reason being, to set up a periodic interrupt in HPET, we need to
290 * stop the main counter. And if we do that everytime someone diables/enables
291 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
292 * So, for the time being, simulate the periodic interrupt in software.
294 * hpet_rtc_timer_init() is called for the first time and during subsequent
295 * interuppts reinit happens through hpet_rtc_timer_reinit().
297 int hpet_rtc_timer_init(void)
299 unsigned int cfg, cnt;
302 if (!is_hpet_enabled())
305 * Set the counter 1 and enable the interrupts.
307 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
308 hpet_rtc_int_freq = PIE_freq;
310 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
312 local_irq_save(flags);
314 cnt = hpet_readl(HPET_COUNTER);
315 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
316 hpet_writel(cnt, HPET_T1_CMP);
319 cfg = hpet_readl(HPET_T1_CFG);
320 cfg &= ~HPET_TN_PERIODIC;
321 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
322 hpet_writel(cfg, HPET_T1_CFG);
324 local_irq_restore(flags);
329 static void hpet_rtc_timer_reinit(void)
331 unsigned int cfg, cnt, ticks_per_int, lost_ints;
333 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
334 cfg = hpet_readl(HPET_T1_CFG);
335 cfg &= ~HPET_TN_ENABLE;
336 hpet_writel(cfg, HPET_T1_CFG);
340 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
341 hpet_rtc_int_freq = PIE_freq;
343 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
345 /* It is more accurate to use the comparator value than current count.*/
346 ticks_per_int = hpet_tick * HZ / hpet_rtc_int_freq;
347 hpet_t1_cmp += ticks_per_int;
348 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
351 * If the interrupt handler was delayed too long, the write above tries
352 * to schedule the next interrupt in the past and the hardware would
353 * not interrupt until the counter had wrapped around.
354 * So we have to check that the comparator wasn't set to a past time.
356 cnt = hpet_readl(HPET_COUNTER);
357 if (unlikely((int)(cnt - hpet_t1_cmp) > 0)) {
358 lost_ints = (cnt - hpet_t1_cmp) / ticks_per_int + 1;
359 /* Make sure that, even with the time needed to execute
360 * this code, the next scheduled interrupt has been moved
361 * back to the future: */
364 hpet_t1_cmp += lost_ints * ticks_per_int;
365 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
368 PIE_count += lost_ints;
370 printk(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n",
376 * The functions below are called from rtc driver.
377 * Return 0 if HPET is not being used.
378 * Otherwise do the necessary changes and return 1.
380 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
382 if (!is_hpet_enabled())
385 if (bit_mask & RTC_UIE)
387 if (bit_mask & RTC_PIE)
389 if (bit_mask & RTC_AIE)
395 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
397 int timer_init_reqd = 0;
399 if (!is_hpet_enabled())
402 if (!(PIE_on | AIE_on | UIE_on))
405 if (bit_mask & RTC_UIE) {
408 if (bit_mask & RTC_PIE) {
412 if (bit_mask & RTC_AIE) {
417 hpet_rtc_timer_init();
422 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
424 if (!is_hpet_enabled())
427 alarm_time.tm_hour = hrs;
428 alarm_time.tm_min = min;
429 alarm_time.tm_sec = sec;
434 int hpet_set_periodic_freq(unsigned long freq)
436 if (!is_hpet_enabled())
445 int hpet_rtc_dropped_irq(void)
447 if (!is_hpet_enabled())
453 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
455 struct rtc_time curr_time;
456 unsigned long rtc_int_flag = 0;
457 int call_rtc_interrupt = 0;
459 hpet_rtc_timer_reinit();
461 if (UIE_on | AIE_on) {
462 rtc_get_rtc_time(&curr_time);
465 if (curr_time.tm_sec != prev_update_sec) {
466 /* Set update int info, call real rtc int routine */
467 call_rtc_interrupt = 1;
468 rtc_int_flag = RTC_UF;
469 prev_update_sec = curr_time.tm_sec;
474 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
475 /* Set periodic int info, call real rtc int routine */
476 call_rtc_interrupt = 1;
477 rtc_int_flag |= RTC_PF;
482 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
483 (curr_time.tm_min == alarm_time.tm_min) &&
484 (curr_time.tm_hour == alarm_time.tm_hour)) {
485 /* Set alarm int info, call real rtc int routine */
486 call_rtc_interrupt = 1;
487 rtc_int_flag |= RTC_AF;
490 if (call_rtc_interrupt) {
491 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
492 rtc_interrupt(rtc_int_flag, dev_id);