2 * File: arch/blackfin/mach-bf533/boards/cm_bf533.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
7 * Description: Board description file
10 * Copyright 2004-2006 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 #include <linux/device.h>
31 #include <linux/platform_device.h>
32 #include <linux/mtd/mtd.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/flash.h>
36 #include <linux/usb/isp1362.h>
37 #include <linux/ata_platform.h>
38 #include <linux/irq.h>
40 #include <asm/bfin5xx_spi.h>
41 #include <asm/portmux.h>
45 * Name the Board for the /proc/cpuinfo
47 const char bfin_board_name[] = "Bluetechnix CM BF533";
49 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
50 /* all SPI peripherals info goes here */
51 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
52 static struct mtd_partition bfin_spi_flash_partitions[] = {
57 .mask_flags = MTD_CAP_ROM
63 .name = "file system",
69 static struct flash_platform_data bfin_spi_flash_data = {
71 .parts = bfin_spi_flash_partitions,
72 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
76 /* SPI flash chip (m25p64) */
77 static struct bfin5xx_spi_chip spi_flash_chip_info = {
78 .enable_dma = 0, /* use dma transfer with this chip*/
84 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
85 static struct bfin5xx_spi_chip spi_adc_chip_info = {
86 .enable_dma = 1, /* use dma transfer with this chip*/
91 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
92 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
98 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
99 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
105 static struct spi_board_info bfin_spi_board_info[] __initdata = {
106 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
108 /* the modalias must be the same as spi device driver name */
109 .modalias = "m25p80", /* Name of spi_driver for this device */
110 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
111 .bus_num = 0, /* Framework bus number */
112 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
113 .platform_data = &bfin_spi_flash_data,
114 .controller_data = &spi_flash_chip_info,
119 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
121 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
122 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
123 .bus_num = 0, /* Framework bus number */
124 .chip_select = 2, /* Framework chip select. */
125 .platform_data = NULL, /* No spi_driver specific config */
126 .controller_data = &spi_adc_chip_info,
130 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
132 .modalias = "ad1836-spi",
133 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
135 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
136 .controller_data = &ad1836_spi_chip_info,
140 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
142 .modalias = "spi_mmc_dummy",
143 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
146 .platform_data = NULL,
147 .controller_data = &spi_mmc_chip_info,
151 .modalias = "spi_mmc",
152 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
154 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
155 .platform_data = NULL,
156 .controller_data = &spi_mmc_chip_info,
163 static struct resource bfin_spi0_resource[] = {
165 .start = SPI0_REGBASE,
166 .end = SPI0_REGBASE + 0xFF,
167 .flags = IORESOURCE_MEM,
172 .flags = IORESOURCE_IRQ,
176 /* SPI controller data */
177 static struct bfin5xx_spi_master bfin_spi0_info = {
179 .enable_dma = 1, /* master has the ability to do dma transfer */
180 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
183 static struct platform_device bfin_spi0_device = {
185 .id = 0, /* Bus number */
186 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
187 .resource = bfin_spi0_resource,
189 .platform_data = &bfin_spi0_info, /* Passed to driver */
192 #endif /* spi master and devices */
194 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
195 static struct platform_device rtc_device = {
201 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
202 static struct resource smc91x_resources[] = {
205 .end = 0x20200300 + 16,
206 .flags = IORESOURCE_MEM,
210 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
213 static struct platform_device smc91x_device = {
216 .num_resources = ARRAY_SIZE(smc91x_resources),
217 .resource = smc91x_resources,
221 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
222 static struct resource bfin_uart_resources[] = {
226 .flags = IORESOURCE_MEM,
230 static struct platform_device bfin_uart_device = {
233 .num_resources = ARRAY_SIZE(bfin_uart_resources),
234 .resource = bfin_uart_resources,
238 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
239 static struct resource bfin_sir_resources[] = {
240 #ifdef CONFIG_BFIN_SIR0
244 .flags = IORESOURCE_MEM,
249 static struct platform_device bfin_sir_device = {
252 .num_resources = ARRAY_SIZE(bfin_sir_resources),
253 .resource = bfin_sir_resources,
257 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
258 static struct platform_device bfin_sport0_uart_device = {
259 .name = "bfin-sport-uart",
263 static struct platform_device bfin_sport1_uart_device = {
264 .name = "bfin-sport-uart",
269 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
270 static struct resource isp1362_hcd_resources[] = {
274 .flags = IORESOURCE_MEM,
278 .flags = IORESOURCE_MEM,
282 .flags = IORESOURCE_IRQ,
286 static struct isp1362_platform_data isp1362_priv = {
291 .int_edge_triggered = 0,
292 .remote_wakeup_connected = 0,
293 .no_power_switching = 1,
294 .power_switching_mode = 0,
297 static struct platform_device isp1362_hcd_device = {
298 .name = "isp1362-hcd",
301 .platform_data = &isp1362_priv,
303 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
304 .resource = isp1362_hcd_resources,
308 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
311 static struct pata_platform_info bfin_pata_platform_data = {
313 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
316 static struct resource bfin_pata_resources[] = {
320 .flags = IORESOURCE_MEM,
325 .flags = IORESOURCE_MEM,
330 .flags = IORESOURCE_IRQ,
334 static struct platform_device bfin_pata_device = {
335 .name = "pata_platform",
337 .num_resources = ARRAY_SIZE(bfin_pata_resources),
338 .resource = bfin_pata_resources,
340 .platform_data = &bfin_pata_platform_data,
345 static const unsigned int cclk_vlev_datasheet[] =
347 VRPAIR(VLEV_085, 250000000),
348 VRPAIR(VLEV_090, 376000000),
349 VRPAIR(VLEV_095, 426000000),
350 VRPAIR(VLEV_100, 426000000),
351 VRPAIR(VLEV_105, 476000000),
352 VRPAIR(VLEV_110, 476000000),
353 VRPAIR(VLEV_115, 476000000),
354 VRPAIR(VLEV_120, 600000000),
355 VRPAIR(VLEV_125, 600000000),
356 VRPAIR(VLEV_130, 600000000),
359 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
360 .tuple_tab = cclk_vlev_datasheet,
361 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
362 .vr_settling_time = 25 /* us */,
365 static struct platform_device bfin_dpmc = {
368 .platform_data = &bfin_dmpc_vreg_data,
372 static struct platform_device *cm_bf533_devices[] __initdata = {
376 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
380 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
384 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
385 &bfin_sport0_uart_device,
386 &bfin_sport1_uart_device,
389 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
393 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
397 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
401 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
405 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
410 static int __init cm_bf533_init(void)
412 printk(KERN_INFO "%s(): registering device resources\n", __func__);
413 platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
414 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
415 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
418 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
419 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
424 arch_initcall(cm_bf533_init);