2 * File: arch/blackfin/kernel/setup.c
10 * Copyright 2004-2006 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 #include <linux/delay.h>
31 #include <linux/console.h>
32 #include <linux/bootmem.h>
33 #include <linux/seq_file.h>
34 #include <linux/cpu.h>
35 #include <linux/module.h>
36 #include <linux/tty.h>
38 #include <linux/ext2_fs.h>
39 #include <linux/cramfs_fs.h>
40 #include <linux/romfs_fs.h>
42 #include <asm/cacheflush.h>
43 #include <asm/blackfin.h>
44 #include <asm/cplbinit.h>
46 unsigned long memory_start, memory_end, physical_mem_end;
47 unsigned long reserved_mem_dcache_on;
48 unsigned long reserved_mem_icache_on;
49 EXPORT_SYMBOL(memory_start);
50 EXPORT_SYMBOL(memory_end);
51 EXPORT_SYMBOL(physical_mem_end);
52 EXPORT_SYMBOL(_ramend);
54 #ifdef CONFIG_MTD_UCLINUX
55 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
57 EXPORT_SYMBOL(memory_mtd_end);
58 EXPORT_SYMBOL(memory_mtd_start);
59 EXPORT_SYMBOL(mtd_size);
62 char command_line[COMMAND_LINE_SIZE];
64 #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
65 static void generate_cpl_tables(void);
68 void __init bf53x_cache_init(void)
70 #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
71 generate_cpl_tables();
74 #ifdef CONFIG_BLKFIN_CACHE
76 printk(KERN_INFO "Instruction Cache Enabled\n");
79 #ifdef CONFIG_BLKFIN_DCACHE
81 printk(KERN_INFO "Data Cache Enabled"
82 # if defined CONFIG_BLKFIN_WB
84 # elif defined CONFIG_BLKFIN_WT
91 void bf53x_relocate_l1_mem(void)
93 unsigned long l1_code_length;
94 unsigned long l1_data_a_length;
95 unsigned long l1_data_b_length;
97 l1_code_length = _etext_l1 - _stext_l1;
98 if (l1_code_length > L1_CODE_LENGTH)
99 l1_code_length = L1_CODE_LENGTH;
100 /* cannot complain as printk is not available as yet.
101 * But we can continue booting and complain later!
104 /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
105 dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
107 l1_data_a_length = _ebss_l1 - _sdata_l1;
108 if (l1_data_a_length > L1_DATA_A_LENGTH)
109 l1_data_a_length = L1_DATA_A_LENGTH;
111 /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
112 dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
114 l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
115 if (l1_data_b_length > L1_DATA_B_LENGTH)
116 l1_data_b_length = L1_DATA_B_LENGTH;
118 /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
119 dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
120 l1_data_a_length, l1_data_b_length);
125 * Initial parsing of the command line. Currently, we support:
126 * - Controlling the linux memory size: mem=xxx[KMG]
127 * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
128 * $ -> reserved memory is dcacheable
129 * # -> reserved memory is icacheable
131 static __init void parse_cmdline_early(char *cmdline_p)
133 char c = ' ', *to = cmdline_p;
134 unsigned int memsize;
138 if (!memcmp(to, "mem=", 4)) {
140 memsize = memparse(to, &to);
144 } else if (!memcmp(to, "max_mem=", 8)) {
146 memsize = memparse(to, &to);
148 physical_mem_end = memsize;
152 reserved_mem_dcache_on =
156 reserved_mem_icache_on =
169 void __init setup_arch(char **cmdline_p)
172 unsigned long l1_length, sclk, cclk;
173 #ifdef CONFIG_MTD_UCLINUX
174 unsigned long mtd_phys = 0;
177 #ifdef CONFIG_DUMMY_CONSOLE
178 conswitchp = &dummy_con;
183 #if !defined(CONFIG_BFIN_KERNEL_CLOCK) && defined(ANOMALY_05000273)
185 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
188 #if defined(ANOMALY_05000266)
189 bfin_read_IMDMA_D0_IRQ_STATUS();
190 bfin_read_IMDMA_D1_IRQ_STATUS();
193 #ifdef DEBUG_SERIAL_EARLY_INIT
194 bfin_console_init(); /* early console registration */
195 /* this give a chance to get printk() working before crash. */
198 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
199 /* we need to initialize the Flashrom device here since we might
200 * do things with flash early on in the boot
205 #if defined(CONFIG_CMDLINE_BOOL)
206 memset(command_line, 0, sizeof(command_line));
207 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
208 command_line[sizeof(command_line) - 1] = 0;
211 /* Keep a copy of command line */
212 *cmdline_p = &command_line[0];
213 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
214 boot_command_line[COMMAND_LINE_SIZE - 1] = 0;
216 /* setup memory defaults from the user config */
217 physical_mem_end = 0;
218 _ramend = CONFIG_MEM_SIZE * 1024 * 1024;
220 parse_cmdline_early(&command_line[0]);
222 if (physical_mem_end == 0)
223 physical_mem_end = _ramend;
225 /* by now the stack is part of the init task */
226 memory_end = _ramend - DMA_UNCACHED_REGION;
228 _ramstart = (unsigned long)__bss_stop;
229 memory_start = PAGE_ALIGN(_ramstart);
231 #if defined(CONFIG_MTD_UCLINUX)
232 /* generic memory mapped MTD driver */
233 memory_mtd_end = memory_end;
235 mtd_phys = _ramstart;
236 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
238 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
239 if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
241 PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
244 # if defined(CONFIG_CRAMFS)
245 if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
246 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
249 # if defined(CONFIG_ROMFS_FS)
250 if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
251 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
253 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
254 # if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
255 /* Due to a Hardware Anomaly we need to limit the size of usable
256 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
257 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
259 # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
260 if (memory_end >= 56 * 1024 * 1024)
261 memory_end = 56 * 1024 * 1024;
263 if (memory_end >= 60 * 1024 * 1024)
264 memory_end = 60 * 1024 * 1024;
265 # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
266 # endif /* ANOMALY_05000263 */
267 # endif /* CONFIG_ROMFS_FS */
269 memory_end -= mtd_size;
273 panic("Don't boot kernel without rootfs attached.\n");
276 /* Relocate MTD image to the top of memory after the uncached memory area */
277 dma_memcpy((char *)memory_end, __bss_stop, mtd_size);
279 memory_mtd_start = memory_end;
280 _ebss = memory_mtd_start; /* define _ebss for compatible */
281 #endif /* CONFIG_MTD_UCLINUX */
283 #if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
284 /* Due to a Hardware Anomaly we need to limit the size of usable
285 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
286 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
288 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
289 if (memory_end >= 56 * 1024 * 1024)
290 memory_end = 56 * 1024 * 1024;
292 if (memory_end >= 60 * 1024 * 1024)
293 memory_end = 60 * 1024 * 1024;
294 #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
295 printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
296 #endif /* ANOMALY_05000263 */
298 #if !defined(CONFIG_MTD_UCLINUX)
299 memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
301 init_mm.start_code = (unsigned long)_stext;
302 init_mm.end_code = (unsigned long)_etext;
303 init_mm.end_data = (unsigned long)_edata;
304 init_mm.brk = (unsigned long)0;
308 printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n");
309 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
310 if (bfin_revid() != bfin_compiled_revid())
311 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
312 bfin_compiled_revid(), bfin_revid());
313 if (bfin_revid() < SUPPORTED_REVID)
314 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
316 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
318 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu Mhz System Clock\n",
319 cclk / 1000000, sclk / 1000000);
321 #if defined(ANOMALY_05000273)
322 if ((cclk >> 1) <= sclk)
323 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
326 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
327 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
329 printk(KERN_INFO "Memory map:\n"
330 KERN_INFO " text = 0x%p-0x%p\n"
331 KERN_INFO " init = 0x%p-0x%p\n"
332 KERN_INFO " data = 0x%p-0x%p\n"
333 KERN_INFO " stack = 0x%p-0x%p\n"
334 KERN_INFO " bss = 0x%p-0x%p\n"
335 KERN_INFO " available = 0x%p-0x%p\n"
336 #ifdef CONFIG_MTD_UCLINUX
337 KERN_INFO " rootfs = 0x%p-0x%p\n"
339 #if DMA_UNCACHED_REGION > 0
340 KERN_INFO " DMA Zone = 0x%p-0x%p\n"
343 __init_begin, __init_end,
345 (void*)&init_thread_union, (void*)((int)(&init_thread_union) + 0x2000),
346 __bss_start, __bss_stop,
347 (void*)_ramstart, (void*)memory_end
348 #ifdef CONFIG_MTD_UCLINUX
349 , (void*)memory_mtd_start, (void*)(memory_mtd_start + mtd_size)
351 #if DMA_UNCACHED_REGION > 0
352 , (void*)(_ramend - DMA_UNCACHED_REGION), (void*)(_ramend)
357 * give all the memory to the bootmap allocator, tell it to put the
358 * boot mem_map at the start of memory
360 bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT, /* map goes here */
361 PAGE_OFFSET >> PAGE_SHIFT,
362 memory_end >> PAGE_SHIFT);
364 * free the usable memory, we have to make sure we do not free
365 * the bootmem bitmap so we then reserve it after freeing it :-)
367 free_bootmem(memory_start, memory_end - memory_start);
369 reserve_bootmem(memory_start, bootmap_size);
371 * get kmalloc into gear
375 /* check the size of the l1 area */
376 l1_length = _etext_l1 - _stext_l1;
377 if (l1_length > L1_CODE_LENGTH)
378 panic("L1 memory overflow\n");
380 l1_length = _ebss_l1 - _sdata_l1;
381 if (l1_length > L1_DATA_A_LENGTH)
382 panic("L1 memory overflow\n");
386 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
387 # if defined(CONFIG_BFIN_SHARED_FLASH_ENET) && defined(CONFIG_BFIN533_STAMP)
388 /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
389 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | (1 << CONFIG_ENET_FLASH_PIN));
390 bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN);
393 # if defined (CONFIG_BFIN561_EZKIT)
394 bfin_write_FIO0_DIR(bfin_read_FIO0_DIR() | (1 << 12));
396 # endif /* defined (CONFIG_BFIN561_EZKIT) */
399 printk(KERN_INFO "Hardware Trace Enabled\n");
400 bfin_write_TBUFCTL(0x03);
403 #if defined(CONFIG_BF561)
404 static struct cpu cpu[2];
406 static struct cpu cpu[1];
408 static int __init topology_init(void)
410 #if defined (CONFIG_BF561)
411 register_cpu(&cpu[0], 0);
412 register_cpu(&cpu[1], 1);
415 return register_cpu(cpu, 0);
419 subsys_initcall(topology_init);
421 #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
422 u16 lock_kernel_check(u32 start, u32 end)
424 if ((start <= (u32) _stext && end >= (u32) _end)
425 || (start >= (u32) _stext && end <= (u32) _end))
430 static unsigned short __init
431 fill_cplbtab(struct cplb_tab *table,
432 unsigned long start, unsigned long end,
433 unsigned long block_size, unsigned long cplb_data)
437 switch (block_size) {
453 cplb_data = (cplb_data & ~(3 << 16)) | (i << 16);
455 while ((start < end) && (table->pos < table->size)) {
457 table->tab[table->pos++] = start;
459 if (lock_kernel_check(start, start + block_size) == IN_KERNEL)
460 table->tab[table->pos++] =
461 cplb_data | CPLB_LOCK | CPLB_DIRTY;
463 table->tab[table->pos++] = cplb_data;
470 static unsigned short __init
471 close_cplbtab(struct cplb_tab *table)
474 while (table->pos < table->size) {
476 table->tab[table->pos++] = 0;
477 table->tab[table->pos++] = 0; /* !CPLB_VALID */
482 static void __init generate_cpl_tables(void)
486 u32 a_start, a_end, as, ae, as_1m;
488 struct cplb_tab *t_i = NULL;
489 struct cplb_tab *t_d = NULL;
492 cplb.init_i.size = MAX_CPLBS;
493 cplb.init_d.size = MAX_CPLBS;
494 cplb.switch_i.size = MAX_SWITCH_I_CPLBS;
495 cplb.switch_d.size = MAX_SWITCH_D_CPLBS;
499 cplb.switch_i.pos = 0;
500 cplb.switch_d.pos = 0;
502 cplb.init_i.tab = icplb_table;
503 cplb.init_d.tab = dcplb_table;
504 cplb.switch_i.tab = ipdt_table;
505 cplb.switch_d.tab = dpdt_table;
507 cplb_data[SDRAM_KERN].end = memory_end;
509 #ifdef CONFIG_MTD_UCLINUX
510 cplb_data[SDRAM_RAM_MTD].start = memory_mtd_start;
511 cplb_data[SDRAM_RAM_MTD].end = memory_mtd_start + mtd_size;
512 cplb_data[SDRAM_RAM_MTD].valid = mtd_size > 0;
513 # if defined(CONFIG_ROMFS_FS)
514 cplb_data[SDRAM_RAM_MTD].attr |= I_CPLB;
517 * The ROMFS_FS size is often not multiple of 1MB.
518 * This can cause multiple CPLB sets covering the same memory area.
519 * This will then cause multiple CPLB hit exceptions.
520 * Workaround: We ensure a contiguous memory area by extending the kernel
521 * memory section over the mtd section.
522 * For ROMFS_FS memory must be covered with ICPLBs anyways.
523 * So there is no difference between kernel and mtd memory setup.
526 cplb_data[SDRAM_KERN].end = memory_mtd_start + mtd_size;;
527 cplb_data[SDRAM_RAM_MTD].valid = 0;
531 cplb_data[SDRAM_RAM_MTD].valid = 0;
534 cplb_data[SDRAM_DMAZ].start = _ramend - DMA_UNCACHED_REGION;
535 cplb_data[SDRAM_DMAZ].end = _ramend;
537 cplb_data[RES_MEM].start = _ramend;
538 cplb_data[RES_MEM].end = physical_mem_end;
540 if (reserved_mem_dcache_on)
541 cplb_data[RES_MEM].d_conf = SDRAM_DGENERIC;
543 cplb_data[RES_MEM].d_conf = SDRAM_DNON_CHBL;
545 if (reserved_mem_icache_on)
546 cplb_data[RES_MEM].i_conf = SDRAM_IGENERIC;
548 cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL;
550 for (i = ZERO_P; i <= L2_MEM; i++) {
552 if (cplb_data[i].valid) {
554 as_1m = cplb_data[i].start % SIZE_1M;
556 /* We need to make sure all sections are properly 1M aligned
557 * However between Kernel Memory and the Kernel mtd section, depending on the
558 * rootfs size, there can be overlapping memory areas.
561 if (as_1m && i!=L1I_MEM && i!=L1D_MEM) {
562 #ifdef CONFIG_MTD_UCLINUX
563 if (i == SDRAM_RAM_MTD) {
564 if ((cplb_data[SDRAM_KERN].end + 1) > cplb_data[SDRAM_RAM_MTD].start)
565 cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)) + SIZE_1M;
567 cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M));
570 printk(KERN_WARNING "Unaligned Start of %s at 0x%X\n",
571 cplb_data[i].name, cplb_data[i].start);
574 as = cplb_data[i].start % SIZE_4M;
575 ae = cplb_data[i].end % SIZE_4M;
578 a_start = cplb_data[i].start + (SIZE_4M - (as));
580 a_start = cplb_data[i].start;
582 a_end = cplb_data[i].end - ae;
584 for (j = INITIAL_T; j <= SWITCH_T; j++) {
588 if (cplb_data[i].attr & INITIAL_T) {
596 if (cplb_data[i].attr & SWITCH_T) {
597 t_i = &cplb.switch_i;
598 t_d = &cplb.switch_d;
609 if (cplb_data[i].attr & I_CPLB) {
611 if (cplb_data[i].psize) {
616 cplb_data[i].i_conf);
619 #if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
620 if (i == SDRAM_KERN) {
625 cplb_data[i].i_conf);
633 cplb_data[i].i_conf);
638 cplb_data[i].i_conf);
639 fill_cplbtab(t_i, a_end,
642 cplb_data[i].i_conf);
647 if (cplb_data[i].attr & D_CPLB) {
649 if (cplb_data[i].psize) {
654 cplb_data[i].d_conf);
660 cplb_data[i].d_conf);
661 fill_cplbtab(t_d, a_start,
663 cplb_data[i].d_conf);
664 fill_cplbtab(t_d, a_end,
667 cplb_data[i].d_conf);
680 close_cplbtab(&cplb.init_i);
681 close_cplbtab(&cplb.init_d);
683 cplb.init_i.tab[cplb.init_i.pos] = -1;
684 cplb.init_d.tab[cplb.init_d.pos] = -1;
685 cplb.switch_i.tab[cplb.switch_i.pos] = -1;
686 cplb.switch_d.tab[cplb.switch_d.pos] = -1;
692 static inline u_long get_vco(void)
697 msel = (bfin_read_PLL_CTL() >> 9) & 0x3F;
701 vco = CONFIG_CLKIN_HZ;
702 vco >>= (1 & bfin_read_PLL_CTL()); /* DF bit */
707 /*Get the Core clock*/
708 u_long get_cclk(void)
711 if (bfin_read_PLL_STAT() & 0x1)
712 return CONFIG_CLKIN_HZ;
714 ssel = bfin_read_PLL_DIV();
715 csel = ((ssel >> 4) & 0x03);
717 if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
718 return get_vco() / ssel;
719 return get_vco() >> csel;
722 EXPORT_SYMBOL(get_cclk);
724 /* Get the System clock */
725 u_long get_sclk(void)
729 if (bfin_read_PLL_STAT() & 0x1)
730 return CONFIG_CLKIN_HZ;
732 ssel = (bfin_read_PLL_DIV() & 0xf);
734 printk(KERN_WARNING "Invalid System Clock\n");
738 return get_vco() / ssel;
741 EXPORT_SYMBOL(get_sclk);
744 * Get CPU information for use by the procfs.
746 static int show_cpuinfo(struct seq_file *m, void *v)
748 char *cpu, *mmu, *fpu, *name;
751 u_long cclk = 0, sclk = 0;
752 u_int dcache_size = 0, dsup_banks = 0;
757 revid = bfin_revid();
758 name = bfin_board_name;
763 seq_printf(m, "CPU:\t\tADSP-%s Rev. 0.%d\n"
766 "Core Clock:\t%9lu Hz\n"
767 "System Clock:\t%9lu Hz\n"
768 "BogoMips:\t%lu.%02lu\n"
769 "Calibration:\t%lu loops\n",
770 cpu, revid, mmu, fpu,
773 (loops_per_jiffy * HZ) / 500000,
774 ((loops_per_jiffy * HZ) / 5000) % 100,
775 (loops_per_jiffy * HZ));
776 seq_printf(m, "Board Name:\t%s\n", name);
777 seq_printf(m, "Board Memory:\t%ld MB\n", physical_mem_end >> 20);
778 seq_printf(m, "Kernel Memory:\t%ld MB\n", (unsigned long)_ramend >> 20);
779 if (bfin_read_IMEM_CONTROL() & (ENICPLB | IMC))
780 seq_printf(m, "I-CACHE:\tON\n");
782 seq_printf(m, "I-CACHE:\tOFF\n");
783 if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
784 seq_printf(m, "D-CACHE:\tON"
785 #if defined CONFIG_BLKFIN_WB
787 #elif defined CONFIG_BLKFIN_WT
792 seq_printf(m, "D-CACHE:\tOFF\n");
795 switch(bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
797 seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
802 seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
807 seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
816 seq_printf(m, "I-CACHE Size:\t%dKB\n", BLKFIN_ICACHESIZE / 1024);
817 seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
818 seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
819 BLKFIN_ISUBBANKS, BLKFIN_IWAYS, BLKFIN_ILINES);
821 "D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
822 dsup_banks, BLKFIN_DSUBBANKS, BLKFIN_DWAYS,
824 #ifdef CONFIG_BLKFIN_CACHE_LOCK
825 switch (read_iloc()) {
827 seq_printf(m, "Way0 Locked-Down\n");
830 seq_printf(m, "Way1 Locked-Down\n");
833 seq_printf(m, "Way0,Way1 Locked-Down\n");
836 seq_printf(m, "Way2 Locked-Down\n");
839 seq_printf(m, "Way0,Way2 Locked-Down\n");
842 seq_printf(m, "Way1,Way2 Locked-Down\n");
845 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
848 seq_printf(m, "Way3 Locked-Down\n");
851 seq_printf(m, "Way0,Way3 Locked-Down\n");
854 seq_printf(m, "Way1,Way3 Locked-Down\n");
857 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
860 seq_printf(m, "Way3,Way2 Locked-Down\n");
863 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
866 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
869 seq_printf(m, "All Ways are locked\n");
872 seq_printf(m, "No Ways are locked\n");
878 static void *c_start(struct seq_file *m, loff_t *pos)
880 return *pos < NR_CPUS ? ((void *)0x12345678) : NULL;
883 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
886 return c_start(m, pos);
889 static void c_stop(struct seq_file *m, void *v)
893 struct seq_operations cpuinfo_op = {
897 .show = show_cpuinfo,
900 void cmdline_init(unsigned long r0)
903 strncpy(command_line, (char *)r0, COMMAND_LINE_SIZE);