2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Blackfin Kernel Configuration"
16 config RWSEM_GENERIC_SPINLOCK
20 config RWSEM_XCHGADD_ALGORITHM
36 config SEMAPHORE_SLEEPERS
40 config GENERIC_FIND_NEXT_BIT
44 config GENERIC_HWEIGHT
48 config GENERIC_HARDIRQS
52 config GENERIC_IRQ_PROBE
64 config FORCE_MAX_ZONEORDER
68 config GENERIC_CALIBRATE_DELAY
72 config IRQCHIP_DEMUX_GPIO
74 depends on (BF52x || BF53x || BF561 || BF54x)
78 source "kernel/Kconfig.preempt"
80 menu "Blackfin Processor Options"
82 comment "Processor and Board Settings"
91 BF522 Processor Support.
96 BF525 Processor Support.
101 BF527 Processor Support.
106 BF531 Processor Support.
111 BF532 Processor Support.
116 BF533 Processor Support.
121 BF534 Processor Support.
126 BF536 Processor Support.
131 BF537 Processor Support.
136 BF542 Processor Support.
141 BF544 Processor Support.
146 BF548 Processor Support.
151 BF549 Processor Support.
156 Not Supported Yet - Work in progress - BF561 Processor Support.
162 default BF_REV_0_1 if BF527
163 default BF_REV_0_2 if BF537
164 default BF_REV_0_3 if BF533
165 default BF_REV_0_0 if BF549
169 depends on (BF52x || BF54x)
173 depends on (BF52x || BF54x)
177 depends on (BF537 || BF536 || BF534)
181 depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
185 depends on (BF561 || BF533 || BF532 || BF531)
189 depends on (BF561 || BF533 || BF532 || BF531)
201 depends on (BF522 || BF525 || BF527)
206 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
211 depends on (BF542 || BF544 || BF548 || BF549)
214 config BFIN_DUAL_CORE
219 config BFIN_SINGLE_CORE
221 depends on !BFIN_DUAL_CORE
224 config MEM_GENERIC_BOARD
226 depends on GENERIC_BOARD
229 config MEM_MT48LC64M4A2FB_7E
231 depends on (BFIN533_STAMP)
234 config MEM_MT48LC16M16A2TG_75
236 depends on (BFIN533_EZKIT || BFIN561_EZKIT \
237 || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM \
241 config MEM_MT48LC32M8A2_75
243 depends on (BFIN537_STAMP || PNAV10)
246 config MEM_MT48LC8M32B2B5_7
248 depends on (BFIN561_BLUETECHNIX_CM)
251 config MEM_MT48LC32M16A2TG_75
253 depends on (BFIN527_EZKIT)
256 config BFIN_SHARED_FLASH_ENET
258 depends on (BFIN533_STAMP)
261 source "arch/blackfin/mach-bf527/Kconfig"
262 source "arch/blackfin/mach-bf533/Kconfig"
263 source "arch/blackfin/mach-bf561/Kconfig"
264 source "arch/blackfin/mach-bf537/Kconfig"
265 source "arch/blackfin/mach-bf548/Kconfig"
267 menu "Board customizations"
270 bool "Default bootloader kernel arguments"
273 string "Initial kernel command string"
274 depends on CMDLINE_BOOL
275 default "console=ttyBF0,57600"
277 If you don't have a boot loader capable of passing a command line string
278 to the kernel, you may specify one here. As a minimum, you should specify
279 the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
281 comment "Clock/PLL Setup"
284 int "Crystal Frequency in Hz"
285 default "11059200" if BFIN533_STAMP
286 default "27000000" if BFIN533_EZKIT
287 default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS)
288 default "30000000" if BFIN561_EZKIT
289 default "24576000" if PNAV10
291 The frequency of CLKIN crystal oscillator on the board in Hz.
293 config BFIN_KERNEL_CLOCK
294 bool "Re-program Clocks while Kernel boots?"
297 This option decides if kernel clocks are re-programed from the
298 bootloader settings. If the clocks are not set, the SDRAM settings
299 are also not changed, and the Bootloader does 100% of the hardware
304 depends on BFIN_KERNEL_CLOCK
309 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
312 If this is set the clock will be divided by 2, before it goes to the PLL.
316 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
318 default "22" if BFIN533_EZKIT
319 default "45" if BFIN533_STAMP
320 default "20" if (BFIN537_STAMP || BFIN527_EZKIT)
321 default "22" if BFIN533_BLUETECHNIX_CM
322 default "20" if BFIN537_BLUETECHNIX_CM
323 default "20" if BFIN561_BLUETECHNIX_CM
324 default "20" if BFIN561_EZKIT
325 default "16" if H8606_HVSISTEMAS
327 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
328 PLL Frequency = (Crystal Frequency) * (this setting)
331 prompt "Core Clock Divider"
332 depends on BFIN_KERNEL_CLOCK
335 This sets the frequency of the core. It can be 1, 2, 4 or 8
336 Core Frequency = (PLL frequency) / (this setting)
352 int "System Clock Divider"
353 depends on BFIN_KERNEL_CLOCK
355 default 5 if BFIN533_EZKIT
356 default 5 if BFIN533_STAMP
357 default 4 if (BFIN537_STAMP || BFIN527_EZKIT)
358 default 5 if BFIN533_BLUETECHNIX_CM
359 default 4 if BFIN537_BLUETECHNIX_CM
360 default 4 if BFIN561_BLUETECHNIX_CM
361 default 5 if BFIN561_EZKIT
362 default 3 if H8606_HVSISTEMAS
364 This sets the frequency of the system clock (including SDRAM or DDR).
365 This can be between 1 and 15
366 System Clock = (PLL frequency) / (this setting)
369 # Max & Min Speeds for various Chips
373 default 600000000 if BF522
374 default 600000000 if BF525
375 default 600000000 if BF527
376 default 400000000 if BF531
377 default 400000000 if BF532
378 default 750000000 if BF533
379 default 500000000 if BF534
380 default 400000000 if BF536
381 default 600000000 if BF537
382 default 533000000 if BF538
383 default 533000000 if BF539
384 default 600000000 if BF542
385 default 533000000 if BF544
386 default 533000000 if BF549
387 default 600000000 if BF561
401 comment "Kernel Timer/Scheduler"
403 source kernel/Kconfig.hz
405 comment "Memory Setup"
408 int "SDRAM Memory Size in MBytes"
409 default 32 if BFIN533_EZKIT
410 default 64 if BFIN527_EZKIT
411 default 64 if BFIN537_STAMP
412 default 64 if BFIN561_EZKIT
413 default 128 if BFIN533_STAMP
415 default 32 if H8606_HVSISTEMAS
418 int "SDRAM Memory Address Width"
419 default 9 if BFIN533_EZKIT
420 default 9 if BFIN561_EZKIT
421 default 9 if H8606_HVSISTEMAS
422 default 10 if BFIN527_EZKIT
423 default 10 if BFIN537_STAMP
424 default 11 if BFIN533_STAMP
427 config ENET_FLASH_PIN
428 int "PF port/pin used for flash and ethernet sharing"
429 depends on (BFIN533_STAMP)
432 PF port/pin used for flash and ethernet sharing to allow other PF
433 pins to be used on other platforms without having to touch common
435 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
438 hex "Kernel load address for booting"
440 range 0x1000 0x20000000
442 This option allows you to set the load address of the kernel.
443 This can be useful if you are on a board which has a small amount
444 of memory or you wish to reserve some memory at the beginning of
447 Note that you need to keep this value above 4k (0x1000) as this
448 memory region is used to capture NULL pointer references as well
449 as some core kernel functions.
451 comment "LED Status Indicators"
452 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
454 config BFIN_ALIVE_LED
455 bool "Enable Board Alive"
456 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
459 Blink the LEDs you select when the kernel is running. Helps detect
462 config BFIN_ALIVE_LED_NUM
464 depends on BFIN_ALIVE_LED
465 range 1 3 if BFIN533_STAMP
466 default "3" if BFIN533_STAMP
468 Select the LED (marked on the board) for you to blink.
471 bool "Enable System Load/Idle LED"
472 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
475 Blinks the LED you select when to determine kernel load.
477 config BFIN_IDLE_LED_NUM
479 depends on BFIN_IDLE_LED
480 range 1 3 if BFIN533_STAMP
481 default "2" if BFIN533_STAMP
483 Select the LED (marked on the board) for you to blink.
486 prompt "Blackfin Exception Scratch Register"
487 default BFIN_SCRATCH_REG_RETN
489 Select the resource to reserve for the Exception handler:
490 - RETN: Non-Maskable Interrupt (NMI)
491 - RETE: Exception Return (JTAG/ICE)
492 - CYCLES: Performance counter
494 If you are unsure, please select "RETN".
496 config BFIN_SCRATCH_REG_RETN
499 Use the RETN register in the Blackfin exception handler
500 as a stack scratch register. This means you cannot
501 safely use NMI on the Blackfin while running Linux, but
502 you can debug the system with a JTAG ICE and use the
503 CYCLES performance registers.
505 If you are unsure, please select "RETN".
507 config BFIN_SCRATCH_REG_RETE
510 Use the RETE register in the Blackfin exception handler
511 as a stack scratch register. This means you cannot
512 safely use a JTAG ICE while debugging a Blackfin board,
513 but you can safely use the CYCLES performance registers
516 If you are unsure, please select "RETN".
518 config BFIN_SCRATCH_REG_CYCLES
521 Use the CYCLES register in the Blackfin exception handler
522 as a stack scratch register. This means you cannot
523 safely use the CYCLES performance registers on a Blackfin
524 board at anytime, but you can debug the system with a JTAG
527 If you are unsure, please select "RETN".
532 # Sorry - but you need to put the hex address here -
536 config BFIN_ALIVE_LED_PORT
538 default 0xFFC00700 if (BFIN533_STAMP)
540 # Peripheral Flag Direction Register
541 config BFIN_ALIVE_LED_DPORT
543 default 0xFFC00730 if (BFIN533_STAMP)
545 config BFIN_ALIVE_LED_PIN
547 default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
548 default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
549 default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
551 config BFIN_IDLE_LED_PORT
553 default 0xFFC00700 if (BFIN533_STAMP)
555 # Peripheral Flag Direction Register
556 config BFIN_IDLE_LED_DPORT
558 default 0xFFC00730 if (BFIN533_STAMP)
560 config BFIN_IDLE_LED_PIN
562 default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
563 default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
564 default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
569 menu "Blackfin Kernel Optimizations"
571 comment "Memory Optimizations"
574 bool "Locate interrupt entry code in L1 Memory"
577 If enabled, interrupt entry code (STORE/RESTORE CONTEXT) is linked
578 into L1 instruction memory. (less latency)
580 config EXCPT_IRQ_SYSC_L1
581 bool "Locate entire ASM lowlevel exception / interrupt - Syscall and CPLB handler code in L1 Memory"
584 If enabled, the entire ASM lowlevel exception and interrupt entry code
585 (STORE/RESTORE CONTEXT) is linked into L1 instruction memory.
589 bool "Locate frequently called do_irq dispatcher function in L1 Memory"
592 If enabled, the frequently called do_irq dispatcher function is linked
593 into L1 instruction memory. (less latency)
595 config CORE_TIMER_IRQ_L1
596 bool "Locate frequently called timer_interrupt() function in L1 Memory"
599 If enabled, the frequently called timer_interrupt() function is linked
600 into L1 instruction memory. (less latency)
603 bool "Locate frequently idle function in L1 Memory"
606 If enabled, the frequently called idle function is linked
607 into L1 instruction memory. (less latency)
610 bool "Locate kernel schedule function in L1 Memory"
613 If enabled, the frequently called kernel schedule is linked
614 into L1 instruction memory. (less latency)
616 config ARITHMETIC_OPS_L1
617 bool "Locate kernel owned arithmetic functions in L1 Memory"
620 If enabled, arithmetic functions are linked
621 into L1 instruction memory. (less latency)
624 bool "Locate access_ok function in L1 Memory"
627 If enabled, the access_ok function is linked
628 into L1 instruction memory. (less latency)
631 bool "Locate memset function in L1 Memory"
634 If enabled, the memset function is linked
635 into L1 instruction memory. (less latency)
638 bool "Locate memcpy function in L1 Memory"
641 If enabled, the memcpy function is linked
642 into L1 instruction memory. (less latency)
644 config SYS_BFIN_SPINLOCK_L1
645 bool "Locate sys_bfin_spinlock function in L1 Memory"
648 If enabled, sys_bfin_spinlock function is linked
649 into L1 instruction memory. (less latency)
651 config IP_CHECKSUM_L1
652 bool "Locate IP Checksum function in L1 Memory"
655 If enabled, the IP Checksum function is linked
656 into L1 instruction memory. (less latency)
658 config CACHELINE_ALIGNED_L1
659 bool "Locate cacheline_aligned data to L1 Data Memory"
664 If enabled, cacheline_anligned data is linked
665 into L1 data memory. (less latency)
667 config SYSCALL_TAB_L1
668 bool "Locate Syscall Table L1 Data Memory"
672 If enabled, the Syscall LUT is linked
673 into L1 data memory. (less latency)
675 config CPLB_SWITCH_TAB_L1
676 bool "Locate CPLB Switch Tables L1 Data Memory"
680 If enabled, the CPLB Switch Tables are linked
681 into L1 data memory. (less latency)
687 prompt "Kernel executes from"
689 Choose the memory type that the kernel will be running in.
694 The kernel will be resident in RAM when running.
699 The kernel will be resident in FLASH/ROM when running.
706 bool "Allow allocating large blocks (> 1MB) of memory"
708 Allow the slab memory allocator to keep chains for very large
709 memory sizes - upto 32MB. You may need this if your system has
710 a lot of RAM, and you need to able to allocate very large
711 contiguous chunks. If unsure, say N.
714 tristate "Enable Blackfin General Purpose Timers API"
717 Enable support for the General Purpose Timers API. If you
720 To compile this driver as a module, choose M here: the module
721 will be called gptimers.ko.
724 bool "Enable DMA Support"
725 depends on (BF52x || BF53x || BF561 || BF54x)
728 DMA driver for BF5xx.
731 prompt "Uncached SDRAM region"
732 default DMA_UNCACHED_1M
733 depends on BFIN_DMA_5XX
734 config DMA_UNCACHED_2M
735 bool "Enable 2M DMA region"
736 config DMA_UNCACHED_1M
737 bool "Enable 1M DMA region"
738 config DMA_UNCACHED_NONE
739 bool "Disable DMA region"
743 comment "Cache Support"
748 config BFIN_DCACHE_BANKA
749 bool "Enable only 16k BankA DCACHE - BankB is SRAM"
750 depends on BFIN_DCACHE && !BF531
752 config BFIN_ICACHE_LOCK
753 bool "Enable Instruction Cache Locking"
757 depends on BFIN_DCACHE
763 Cached data will be written back to SDRAM only when needed.
764 This can give a nice increase in performance, but beware of
765 broken drivers that do not properly invalidate/flush their
768 Write Through Policy:
769 Cached data will always be written back to SDRAM when the
770 cache is updated. This is a completely safe setting, but
771 performance is worse than Write Back.
773 If you are unsure of the options and you want to be safe,
774 then go with Write Through.
780 Cached data will be written back to SDRAM only when needed.
781 This can give a nice increase in performance, but beware of
782 broken drivers that do not properly invalidate/flush their
785 Write Through Policy:
786 Cached data will always be written back to SDRAM when the
787 cache is updated. This is a completely safe setting, but
788 performance is worse than Write Back.
790 If you are unsure of the options and you want to be safe,
791 then go with Write Through.
796 int "Set the max L1 SRAM pieces"
799 Set the max memory pieces for the L1 SRAM allocation algorithm.
800 Min value is 16. Max value is 1024.
802 comment "Asynchonous Memory Configuration"
804 menu "EBIU_AMGCTL Global Control"
810 bool "DMA has priority over core for ext. accesses"
816 bool "Bank 0 16 bit packing enable"
821 bool "Bank 1 16 bit packing enable"
826 bool "Bank 2 16 bit packing enable"
831 bool "Bank 3 16 bit packing enable"
835 prompt"Enable Asynchonous Memory Banks"
839 bool "Disable All Banks"
845 bool "Enable Bank 0 & 1"
847 config C_AMBEN_B0_B1_B2
848 bool "Enable Bank 0 & 1 & 2"
851 bool "Enable All Banks"
855 menu "EBIU_AMBCTL Control"
875 #############################################################################
876 menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
883 source "drivers/pci/Kconfig"
886 bool "Support for hot-pluggable device"
888 Say Y here if you want to plug devices into your computer while
889 the system is running, and be able to use them quickly. In many
890 cases, the devices can likewise be unplugged at any time too.
892 One well known example of this is PCMCIA- or PC-cards, credit-card
893 size devices such as network cards, modems or hard drives which are
894 plugged into slots found on all modern laptop computers. Another
895 example, used on modern desktops as well as laptops, is USB.
897 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
898 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
899 Then your kernel will automatically call out to a user mode "policy
900 agent" (/sbin/hotplug) to load modules and set up software needed
901 to use devices as you hotplug them.
903 source "drivers/pcmcia/Kconfig"
905 source "drivers/pci/hotplug/Kconfig"
909 menu "Executable file formats"
911 source "fs/Kconfig.binfmt"
915 menu "Power management options"
916 source "kernel/power/Kconfig"
919 prompt "Select PM Wakeup Event Source"
920 default PM_WAKEUP_GPIO_BY_SIC_IWR
923 If you have a GPIO already configured as input with the corresponding PORTx_MASK
924 bit set - "Specify Wakeup Event by SIC_IWR value"
926 config PM_WAKEUP_GPIO_BY_SIC_IWR
927 bool "Specify Wakeup Event by SIC_IWR value"
928 config PM_WAKEUP_BY_GPIO
929 bool "Cause Wakeup Event by GPIO"
930 config PM_WAKEUP_GPIO_API
931 bool "Configure Wakeup Event by PM GPIO API"
935 config PM_WAKEUP_SIC_IWR
936 hex "Wakeup Events (SIC_IWR)"
937 depends on PM_WAKEUP_GPIO_BY_SIC_IWR
938 default 0x80000000 if (BF537 || BF536 || BF534)
939 default 0x100000 if (BF533 || BF532 || BF531)
941 config PM_WAKEUP_GPIO_NUMBER
942 int "Wakeup GPIO number"
944 depends on PM_WAKEUP_BY_GPIO
945 default 2 if BFIN537_STAMP
948 prompt "GPIO Polarity"
949 depends on PM_WAKEUP_BY_GPIO
950 default PM_WAKEUP_GPIO_POLAR_H
951 config PM_WAKEUP_GPIO_POLAR_H
953 config PM_WAKEUP_GPIO_POLAR_L
955 config PM_WAKEUP_GPIO_POLAR_EDGE_F
957 config PM_WAKEUP_GPIO_POLAR_EDGE_R
959 config PM_WAKEUP_GPIO_POLAR_EDGE_B
965 if (BF537 || BF533 || BF54x)
967 menu "CPU Frequency scaling"
969 source "drivers/cpufreq/Kconfig"
975 If you want to enable this option, you should select the
976 DPMC driver from Character Devices.
983 source "drivers/Kconfig"
987 source "kernel/Kconfig.instrumentation"
989 menu "Kernel hacking"
991 source "lib/Kconfig.debug"
994 bool "Hardware error interrupt debugging"
995 depends on DEBUG_KERNEL
997 When enabled, the hardware error interrupt is never disabled, and
998 will happen immediately when an error condition occurs. This comes
999 at a slight cost in code size, but is necessary if you are getting
1000 hardware error interrupts and need to know where they are coming
1003 config DEBUG_ICACHE_CHECK
1004 bool "Check Instruction cache coherency"
1005 depends on DEBUG_KERNEL
1006 depends on DEBUG_HWERR
1008 Say Y here if you are getting weird unexplained errors. This will
1009 ensure that icache is what SDRAM says it should be by doing a
1010 byte wise comparison between SDRAM and instruction cache. This
1011 also relocates the irq_panic() function to L1 memory, (which is
1014 config DEBUG_HUNT_FOR_ZERO
1015 bool "Catch NULL pointer reads/writes"
1018 Say Y here to catch reads/writes to anywhere in the memory range
1019 from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
1020 catching common programming errors such as NULL pointer dereferences.
1022 Misbehaving applications will be killed (generate a SEGV) while the
1023 kernel will trigger a panic.
1025 Enabling this option will take up an extra entry in CPLB table.
1026 Otherwise, there is no extra overhead.
1028 config DEBUG_BFIN_HWTRACE_ON
1029 bool "Turn on Blackfin's Hardware Trace"
1032 All Blackfins include a Trace Unit which stores a history of the last
1033 16 changes in program flow taken by the program sequencer. The history
1034 allows the user to recreate the program sequencer’s recent path. This
1035 can be handy when an application dies - we print out the execution
1036 path of how it got to the offending instruction.
1038 By turning this off, you may save a tiny amount of power.
1041 prompt "Omit loop Tracing"
1042 default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1043 depends on DEBUG_BFIN_HWTRACE_ON
1045 The trace buffer can be configured to omit recording of changes in
1046 program flow that match either the last entry or one of the last
1047 two entries. Omitting one of these entries from the record prevents
1048 the trace buffer from overflowing because of any sort of loop (for, do
1049 while, etc) in the program.
1051 Because zero-overhead Hardware loops are not recorded in the trace buffer,
1052 this feature can be used to prevent trace overflow from loops that
1053 are nested four deep.
1055 config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1056 bool "Trace all Loops"
1058 The trace buffer records all changes of flow
1060 config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1061 bool "Compress single-level loops"
1063 The trace buffer does not record single loops - helpful if trace
1064 is spinning on a while or do loop.
1066 config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1067 bool "Compress two-level loops"
1069 The trace buffer does not record loops two levels deep. Helpful if
1070 the trace is spinning in a nested loop
1074 config DEBUG_BFIN_HWTRACE_COMPRESSION
1076 depends on DEBUG_BFIN_HWTRACE_ON
1077 default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1078 default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1079 default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1082 config DEBUG_BFIN_HWTRACE_EXPAND
1083 bool "Expand Trace Buffer greater than 16 entries"
1084 depends on DEBUG_BFIN_HWTRACE_ON
1087 By selecting this option, every time the 16 hardware entries in
1088 the Blackfin's HW Trace buffer are full, the kernel will move them
1089 into a software buffer, for dumping when there is an issue. This
1090 has a great impact on performance, (an interrupt every 16 change of
1091 flows) and should normally be turned off, except in those nasty
1094 config DEBUG_BFIN_HWTRACE_EXPAND_LEN
1095 int "Size of Trace buffer (in power of 2k)"
1097 depends on DEBUG_BFIN_HWTRACE_EXPAND
1100 This sets the size of the software buffer that the trace information
1102 0 for (2^0) 1k, or 256 entries,
1103 1 for (2^1) 2k, or 512 entries,
1104 2 for (2^2) 4k, or 1024 entries,
1105 3 for (2^3) 8k, or 2048 entries,
1106 4 for (2^4) 16k, or 4096 entries
1108 config DEBUG_BFIN_NO_KERN_HWTRACE
1109 bool "Trace user apps (turn off hwtrace in kernel)"
1110 depends on DEBUG_BFIN_HWTRACE_ON
1113 Some pieces of the kernel contain a lot of flow changes which can
1114 quickly fill up the hardware trace buffer. When debugging crashes,
1115 the hardware trace may indicate that the problem lies in kernel
1116 space when in reality an application is buggy.
1118 Say Y here to disable hardware tracing in some known "jumpy" pieces
1119 of code so that the trace buffer will extend further back.
1125 This option enables special console drivers which allow the kernel
1126 to print messages very early in the bootup process.
1128 This is useful for kernel debugging when your machine crashes very
1129 early before the console code is initialized. After enabling this
1130 feature, you must add "earlyprintk=serial,uart0,57600" to the
1131 command line (bootargs). It is safe to say Y here in all cases, as
1132 all of this lives in the init section and is thrown away after the
1133 kernel boots completely.
1135 config DUAL_CORE_TEST_MODULE
1136 tristate "Dual Core Test Module"
1140 Say Y here to build-in dual core test module for dual core test.
1143 bool "Display the CPLB information"
1145 Display the CPLB information.
1148 bool "Check the user pointer address"
1151 Usually the pointer transfer from user space is checked to see if its
1152 address is in the kernel space.
1154 Say N here to disable that check to improve the performance.
1158 source "security/Kconfig"
1160 source "crypto/Kconfig"
1162 source "lib/Kconfig"