2 * linux/arch/arm/vfp/vfpmodule.c
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/types.h>
13 #include <linux/kernel.h>
14 #include <linux/signal.h>
15 #include <linux/sched.h>
16 #include <linux/init.h>
18 #include <asm/thread_notify.h>
25 * Our undef handlers (in entry.S)
27 void vfp_testing_entry(void);
28 void vfp_support_entry(void);
30 void (*vfp_vector)(void) = vfp_testing_entry;
31 union vfp_state *last_VFP_context;
35 * Used in startup: set to non-zero if VFP checks fail
36 * After startup, holds VFP architecture
38 unsigned int VFP_arch;
40 static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
42 struct thread_info *thread = v;
45 if (likely(cmd == THREAD_NOTIFY_SWITCH)) {
47 * Always disable VFP so we can lazily save/restore the
50 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE);
54 vfp = &thread->vfpstate;
55 if (cmd == THREAD_NOTIFY_FLUSH) {
57 * Per-thread VFP initialisation.
59 memset(vfp, 0, sizeof(union vfp_state));
61 vfp->hard.fpexc = FPEXC_ENABLE;
62 vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
65 * Disable VFP to ensure we initialise it first.
67 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE);
70 /* flush and release case: Per-thread VFP cleanup. */
71 if (last_VFP_context == vfp)
72 last_VFP_context = NULL;
77 static struct notifier_block vfp_notifier_block = {
78 .notifier_call = vfp_notifier,
82 * Raise a SIGFPE for the current process.
83 * sicode describes the signal being raised.
85 void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
89 memset(&info, 0, sizeof(info));
91 info.si_signo = SIGFPE;
92 info.si_code = sicode;
93 info.si_addr = (void __user *)(instruction_pointer(regs) - 4);
96 * This is the same as NWFPE, because it's not clear what
99 current->thread.error_code = 0;
100 current->thread.trap_no = 6;
102 send_sig_info(SIGFPE, &info, current);
105 static void vfp_panic(char *reason)
109 printk(KERN_ERR "VFP: Error: %s\n", reason);
110 printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
111 fmrx(FPEXC), fmrx(FPSCR), fmrx(FPINST));
112 for (i = 0; i < 32; i += 2)
113 printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
114 i, vfp_get_float(i), i+1, vfp_get_float(i+1));
118 * Process bitmask of exception conditions.
120 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)
124 pr_debug("VFP: raising exceptions %08x\n", exceptions);
126 if (exceptions == VFP_EXCEPTION_ERROR) {
127 vfp_panic("unhandled bounce");
128 vfp_raise_sigfpe(0, regs);
133 * If any of the status flags are set, update the FPSCR.
134 * Comparison instructions always return at least one of
137 if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
138 fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
144 #define RAISE(stat,en,sig) \
145 if (exceptions & stat && fpscr & en) \
149 * These are arranged in priority order, least to highest.
151 RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES);
152 RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND);
153 RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
154 RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
157 vfp_raise_sigfpe(si_code, regs);
161 * Emulate a VFP instruction.
163 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
165 u32 exceptions = VFP_EXCEPTION_ERROR;
167 pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr);
169 if (INST_CPRTDO(inst)) {
170 if (!INST_CPRT(inst)) {
174 if (vfp_single(inst)) {
175 exceptions = vfp_single_cpdo(inst, fpscr);
177 exceptions = vfp_double_cpdo(inst, fpscr);
181 * A CPRT instruction can not appear in FPINST2, nor
182 * can it cause an exception. Therefore, we do not
183 * have to emulate it.
188 * A CPDT instruction can not appear in FPINST2, nor can
189 * it cause an exception. Therefore, we do not have to
193 return exceptions & ~VFP_NAN_FLAG;
197 * Package up a bounce condition.
199 void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
201 u32 fpscr, orig_fpscr, exceptions, inst;
203 pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
206 * Enable access to the VFP so we can handle the bounce.
208 fmxr(FPEXC, fpexc & ~(FPEXC_EXCEPTION|FPEXC_INV|FPEXC_UFC|FPEXC_IOC));
210 orig_fpscr = fpscr = fmrx(FPSCR);
213 * If we are running with inexact exceptions enabled, we need to
214 * emulate the trigger instruction. Note that as we're emulating
215 * the trigger instruction, we need to increment PC.
217 if (fpscr & FPSCR_IXE) {
225 * Modify fpscr to indicate the number of iterations remaining
227 if (fpexc & FPEXC_EXCEPTION) {
230 len = fpexc + (1 << FPEXC_LENGTH_BIT);
232 fpscr &= ~FPSCR_LENGTH_MASK;
233 fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT);
237 * Handle the first FP instruction. We used to take note of the
238 * FPEXC bounce reason, but this appears to be unreliable.
239 * Emulate the bounced instruction instead.
242 exceptions = vfp_emulate_instruction(inst, fpscr, regs);
244 vfp_raise_exceptions(exceptions, inst, orig_fpscr, regs);
247 * If there isn't a second FP instruction, exit now.
249 if (!(fpexc & FPEXC_FPV2))
253 * The barrier() here prevents fpinst2 being read
254 * before the condition above.
257 trigger = fmrx(FPINST2);
258 orig_fpscr = fpscr = fmrx(FPSCR);
261 exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
263 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
267 * VFP support code initialisation.
269 static int __init vfp_init(void)
274 * First check that there is a VFP that we can use.
275 * The handler is already setup to just log calls, so
276 * we just need to read the VFPSID register.
278 vfpsid = fmrx(FPSID);
280 printk(KERN_INFO "VFP support v0.3: ");
282 printk("not present\n");
283 } else if (vfpsid & FPSID_NODOUBLE) {
284 printk("no double precision support\n");
286 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */
287 printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
288 (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
289 (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT,
290 (vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT,
291 (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
292 (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
293 vfp_vector = vfp_support_entry;
295 thread_register_notifier(&vfp_notifier_block);
300 late_initcall(vfp_init);