2 * linux/arch/arm/plat-omap/mux.c
4 * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
6 * Copyright (C) 2003 Nokia Corporation
8 * Written by Tony Lindgren <tony.lindgren@nokia.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/config.h>
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <asm/system.h>
30 #include <linux/spinlock.h>
33 #include <asm/arch/mux.h>
35 #ifdef CONFIG_OMAP_MUX
38 * Sets the Omap MUX and PULL_DWN registers based on the table
41 omap_cfg_reg(const reg_cfg_t reg_cfg)
43 static DEFINE_SPINLOCK(mux_spin_lock);
47 unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
48 pull_orig = 0, pull = 0;
49 unsigned int mask, warn = 0;
51 if (reg_cfg > ARRAY_SIZE(reg_cfg_table)) {
52 printk(KERN_ERR "MUX: reg_cfg %d\n", reg_cfg);
56 cfg = ®_cfg_table[reg_cfg];
59 * We do a pretty long section here with lock on, but pin muxing
60 * should only happen on driver init for each driver, so it's not time
63 spin_lock_irqsave(&mux_spin_lock, flags);
65 /* Check the mux register in question */
69 reg_orig = omap_readl(cfg->mux_reg);
71 /* The mux registers always seem to be 3 bits long */
72 mask = (0x7 << cfg->mask_offset);
73 tmp1 = reg_orig & mask;
74 reg = reg_orig & ~mask;
76 tmp2 = (cfg->mask << cfg->mask_offset);
82 omap_writel(reg, cfg->mux_reg);
85 /* Check for pull up or pull down selection on 1610 */
86 if (!cpu_is_omap1510()) {
87 if (cfg->pu_pd_reg && cfg->pull_val) {
88 pu_pd_orig = omap_readl(cfg->pu_pd_reg);
89 mask = 1 << cfg->pull_bit;
92 if (!(pu_pd_orig & mask))
95 pu_pd = pu_pd_orig | mask;
97 if (pu_pd_orig & mask)
100 pu_pd = pu_pd_orig & ~mask;
102 omap_writel(pu_pd, cfg->pu_pd_reg);
106 /* Check for an associated pull down register */
108 pull_orig = omap_readl(cfg->pull_reg);
109 mask = 1 << cfg->pull_bit;
112 if (pull_orig & mask)
114 /* Low bit = pull enabled */
115 pull = pull_orig & ~mask;
117 if (!(pull_orig & mask))
119 /* High bit = pull disabled */
120 pull = pull_orig | mask;
123 omap_writel(pull, cfg->pull_reg);
127 #ifdef CONFIG_OMAP_MUX_WARNINGS
128 printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
132 #ifdef CONFIG_OMAP_MUX_DEBUG
133 if (cfg->debug || warn) {
134 printk("MUX: Setting register %s\n", cfg->name);
135 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
136 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
138 if (!cpu_is_omap1510()) {
139 if (cfg->pu_pd_reg && cfg->pull_val) {
140 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
141 cfg->pu_pd_name, cfg->pu_pd_reg,
147 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
148 cfg->pull_name, cfg->pull_reg, pull_orig, pull);
152 spin_unlock_irqrestore(&mux_spin_lock, flags);
154 #ifdef CONFIG_OMAP_MUX_ERRORS
155 return warn ? -ETXTBSY : 0;
161 EXPORT_SYMBOL(omap_cfg_reg);
163 #endif /* CONFIG_OMAP_MUX */