1 /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * Machine support for Thorcom VR1000 board. Designed for Thorcom by
7 * Simtec Electronics, http://www.simtec.co.uk/
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/interrupt.h>
18 #include <linux/list.h>
19 #include <linux/timer.h>
20 #include <linux/init.h>
21 #include <linux/dm9000.h>
23 #include <linux/serial.h>
24 #include <linux/tty.h>
25 #include <linux/serial_8250.h>
26 #include <linux/serial_reg.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/irq.h>
32 #include <asm/arch/bast-map.h>
33 #include <asm/arch/vr1000-map.h>
34 #include <asm/arch/vr1000-irq.h>
35 #include <asm/arch/vr1000-cpld.h>
37 #include <asm/hardware.h>
40 #include <asm/mach-types.h>
42 #include <asm/plat-s3c/regs-serial.h>
43 #include <asm/arch/regs-gpio.h>
44 #include <asm/arch/leds-gpio.h>
46 #include <asm/plat-s3c24xx/clock.h>
47 #include <asm/plat-s3c24xx/devs.h>
48 #include <asm/plat-s3c24xx/cpu.h>
49 #include "usb-simtec.h"
51 /* macros for virtual address mods for the io space entries */
52 #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
53 #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
54 #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
55 #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
57 /* macros to modify the physical addresses for io space */
59 #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
60 #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
61 #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
62 #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
64 static struct map_desc vr1000_iodesc[] __initdata = {
67 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
68 .pfn = PA_CS2(BAST_PA_ISAIO),
72 .virtual = (u32)S3C24XX_VA_ISA_WORD,
73 .pfn = PA_CS3(BAST_PA_ISAIO),
78 /* CPLD control registers, and external interrupt controls */
80 .virtual = (u32)VR1000_VA_CTRL1,
81 .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
85 .virtual = (u32)VR1000_VA_CTRL2,
86 .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
90 .virtual = (u32)VR1000_VA_CTRL3,
91 .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
95 .virtual = (u32)VR1000_VA_CTRL4,
96 .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
102 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
103 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
104 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
106 /* uart clock source(s) */
108 static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
123 static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
130 .clocks = vr1000_serial_clocks,
131 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
139 .clocks = vr1000_serial_clocks,
140 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
142 /* port 2 is not actually used */
149 .clocks = vr1000_serial_clocks,
150 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
155 /* definitions for the vr1000 extra 16550 serial ports */
157 #define VR1000_BAUDBASE (3692307)
159 #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
161 static struct plat_serial8250_port serial_platform_data[] = {
163 .mapbase = VR1000_SERIAL_MAPBASE(0),
164 .irq = IRQ_VR1000_SERIAL + 0,
165 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
168 .uartclk = VR1000_BAUDBASE,
171 .mapbase = VR1000_SERIAL_MAPBASE(1),
172 .irq = IRQ_VR1000_SERIAL + 1,
173 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
176 .uartclk = VR1000_BAUDBASE,
179 .mapbase = VR1000_SERIAL_MAPBASE(2),
180 .irq = IRQ_VR1000_SERIAL + 2,
181 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
184 .uartclk = VR1000_BAUDBASE,
187 .mapbase = VR1000_SERIAL_MAPBASE(3),
188 .irq = IRQ_VR1000_SERIAL + 3,
189 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
192 .uartclk = VR1000_BAUDBASE,
197 static struct platform_device serial_device = {
198 .name = "serial8250",
199 .id = PLAT8250_DEV_PLATFORM,
201 .platform_data = serial_platform_data,
207 static struct resource vr1000_nor_resource[] = {
209 .start = S3C2410_CS1 + 0x4000000,
210 .end = S3C2410_CS1 + 0x4000000 + SZ_16M - 1,
211 .flags = IORESOURCE_MEM,
215 static struct platform_device vr1000_nor = {
218 .num_resources = ARRAY_SIZE(vr1000_nor_resource),
219 .resource = vr1000_nor_resource,
222 /* DM9000 ethernet devices */
224 static struct resource vr1000_dm9k0_resource[] = {
226 .start = S3C2410_CS5 + VR1000_PA_DM9000,
227 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
228 .flags = IORESOURCE_MEM
231 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
232 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
233 .flags = IORESOURCE_MEM
236 .start = IRQ_VR1000_DM9000A,
237 .end = IRQ_VR1000_DM9000A,
238 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
243 static struct resource vr1000_dm9k1_resource[] = {
245 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
246 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
247 .flags = IORESOURCE_MEM
250 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
251 .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
252 .flags = IORESOURCE_MEM
255 .start = IRQ_VR1000_DM9000N,
256 .end = IRQ_VR1000_DM9000N,
257 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
261 /* for the moment we limit ourselves to 16bit IO until some
262 * better IO routines can be written and tested
265 static struct dm9000_plat_data vr1000_dm9k_platdata = {
266 .flags = DM9000_PLATF_16BITONLY,
269 static struct platform_device vr1000_dm9k0 = {
272 .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
273 .resource = vr1000_dm9k0_resource,
275 .platform_data = &vr1000_dm9k_platdata,
279 static struct platform_device vr1000_dm9k1 = {
282 .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
283 .resource = vr1000_dm9k1_resource,
285 .platform_data = &vr1000_dm9k_platdata,
291 static struct s3c24xx_led_platdata vr1000_led1_pdata = {
293 .gpio = S3C2410_GPB0,
297 static struct s3c24xx_led_platdata vr1000_led2_pdata = {
299 .gpio = S3C2410_GPB1,
303 static struct s3c24xx_led_platdata vr1000_led3_pdata = {
305 .gpio = S3C2410_GPB2,
309 static struct platform_device vr1000_led1 = {
310 .name = "s3c24xx_led",
313 .platform_data = &vr1000_led1_pdata,
317 static struct platform_device vr1000_led2 = {
318 .name = "s3c24xx_led",
321 .platform_data = &vr1000_led2_pdata,
325 static struct platform_device vr1000_led3 = {
326 .name = "s3c24xx_led",
329 .platform_data = &vr1000_led3_pdata,
333 /* devices for this board */
335 static struct platform_device *vr1000_devices[] __initdata = {
350 static struct clk *vr1000_clocks[] = {
358 static void vr1000_power_off(void)
360 s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP);
361 s3c2410_gpio_setpin(S3C2410_GPB9, 1);
364 static void __init vr1000_map_io(void)
366 /* initialise clock sources */
368 s3c24xx_dclk0.parent = &clk_upll;
369 s3c24xx_dclk0.rate = 12*1000*1000;
371 s3c24xx_dclk1.parent = NULL;
372 s3c24xx_dclk1.rate = 3692307;
374 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
375 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
377 s3c24xx_uclk.parent = &s3c24xx_clkout1;
379 s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
381 pm_power_off = vr1000_power_off;
383 s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
384 s3c24xx_init_clocks(0);
385 s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
388 static void __init vr1000_init(void)
390 platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
393 MACHINE_START(VR1000, "Thorcom-VR1000")
394 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
395 .phys_io = S3C2410_PA_UART,
396 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
397 .boot_params = S3C2410_SDRAM_PA + 0x100,
398 .map_io = vr1000_map_io,
399 .init_machine = vr1000_init,
400 .init_irq = s3c24xx_init_irq,
401 .timer = &s3c24xx_timer,