1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
3 * Copyright (C) 2006 by OpenMoko, Inc.
4 * Author: Harald Welte <laforge@openmoko.org>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/interrupt.h>
27 #include <linux/list.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/sysdev.h>
31 #include <linux/platform_device.h>
32 #include <linux/serial_core.h>
33 #include <linux/spi/spi.h>
34 #include <linux/spi/spi_bitbang.h>
36 #include <linux/mtd/mtd.h>
37 #include <linux/mtd/nand.h>
38 #include <linux/mtd/nand_ecc.h>
39 #include <linux/mtd/partitions.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/map.h>
43 #include <asm/mach/irq.h>
45 #include <asm/hardware.h>
48 #include <asm/mach-types.h>
50 #include <asm/arch/regs-gpio.h>
51 #include <asm/arch/leds-gpio.h>
52 #include <asm/plat-s3c/regs-serial.h>
53 #include <asm/arch/fb.h>
54 #include <asm/plat-s3c/nand.h>
55 #include <asm/plat-s3c24xx/udc.h>
56 #include <asm/arch/spi.h>
57 #include <asm/arch/spi-gpio.h>
59 #include <asm/plat-s3c24xx/common-smdk.h>
60 #include <asm/plat-s3c24xx/devs.h>
61 #include <asm/plat-s3c24xx/cpu.h>
62 #include <asm/plat-s3c24xx/pm.h>
64 static struct map_desc qt2410_iodesc[] __initdata = {
65 { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
68 #define UCON S3C2410_UCON_DEFAULT
69 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
70 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
72 static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
98 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
100 /* Configuration for 640x480 SHARP LQ080V3DG01 */
101 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
102 S3C2410_LCDCON1_TFT |
103 S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
105 .lcdcon2 = S3C2410_LCDCON2_VBPD(18) | /* 19 */
106 S3C2410_LCDCON2_LINEVAL(479) |
107 S3C2410_LCDCON2_VFPD(10) | /* 11 */
108 S3C2410_LCDCON2_VSPW(14), /* 15 */
110 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
111 S3C2410_LCDCON4_HSPW(95), /* 96 */
113 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
114 S3C2410_LCDCON5_INVVLINE |
115 S3C2410_LCDCON5_INVVFRAME |
116 S3C2410_LCDCON5_PWREN |
117 S3C2410_LCDCON5_HWSWP,
119 .type = S3C2410_LCDCON1_TFT,
130 /* Configuration for 480x640 toppoly TD028TTEC1 */
131 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
132 S3C2410_LCDCON1_TFT |
133 S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
135 .lcdcon2 = S3C2410_LCDCON2_VBPD(1) | /* 2 */
136 S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
137 S3C2410_LCDCON2_VFPD(3) | /* 4 */
138 S3C2410_LCDCON2_VSPW(1), /* 2 */
140 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
141 S3C2410_LCDCON4_HSPW(7), /* 8 */
143 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
144 S3C2410_LCDCON5_INVVLINE |
145 S3C2410_LCDCON5_INVVFRAME |
146 S3C2410_LCDCON5_PWREN |
147 S3C2410_LCDCON5_HWSWP,
149 .type = S3C2410_LCDCON1_TFT,
159 /* Config for 240x320 LCD */
160 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
161 S3C2410_LCDCON1_TFT |
162 S3C2410_LCDCON1_CLKVAL(0x04),
164 .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |
165 S3C2410_LCDCON2_LINEVAL(319) |
166 S3C2410_LCDCON2_VFPD(6) |
167 S3C2410_LCDCON2_VSPW(3),
169 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
170 S3C2410_LCDCON4_HSPW(3),
172 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
173 S3C2410_LCDCON5_INVVLINE |
174 S3C2410_LCDCON5_INVVFRAME |
175 S3C2410_LCDCON5_PWREN |
176 S3C2410_LCDCON5_HWSWP,
178 .type = S3C2410_LCDCON1_TFT,
190 static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
191 .displays = qt2410_lcd_cfg,
192 .num_displays = ARRAY_SIZE(qt2410_lcd_cfg),
193 .default_display = 0,
195 .lpcsel = ((0xCE6) & ~7) | 1<<4,
200 static struct resource qt2410_cs89x0_resources[] = {
203 .end = 0x19000000 + 16,
204 .flags = IORESOURCE_MEM,
209 .flags = IORESOURCE_IRQ,
213 static struct platform_device qt2410_cs89x0 = {
214 .name = "cirrus-cs89x0",
215 .num_resources = ARRAY_SIZE(qt2410_cs89x0_resources),
216 .resource = qt2410_cs89x0_resources,
221 static struct s3c24xx_led_platdata qt2410_pdata_led = {
222 .gpio = S3C2410_GPB0,
223 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
225 .def_trigger = "timer",
228 static struct platform_device qt2410_led = {
229 .name = "s3c24xx_led",
232 .platform_data = &qt2410_pdata_led,
238 static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
241 case BITBANG_CS_ACTIVE:
242 s3c2410_gpio_setpin(S3C2410_GPB5, 0);
244 case BITBANG_CS_INACTIVE:
245 s3c2410_gpio_setpin(S3C2410_GPB5, 1);
250 static struct s3c2410_spigpio_info spi_gpio_cfg = {
251 .pin_clk = S3C2410_GPG7,
252 .pin_mosi = S3C2410_GPG6,
253 .pin_miso = S3C2410_GPG5,
254 .chip_select = &spi_gpio_cs,
258 static struct platform_device qt2410_spi = {
259 .name = "s3c24xx-spi-gpio",
262 .platform_data = &spi_gpio_cfg,
268 static struct platform_device *qt2410_devices[] __initdata = {
275 &s3c_device_usbgadget,
281 static struct mtd_partition qt2410_nand_part[] = {
288 .name = "U-Boot environment",
309 static struct s3c2410_nand_set qt2410_nand_sets[] = {
313 .nr_partitions = ARRAY_SIZE(qt2410_nand_part),
314 .partitions = qt2410_nand_part,
318 /* choose a set of timings which should suit most 512Mbit
322 static struct s3c2410_platform_nand qt2410_nand_info = {
326 .nr_sets = ARRAY_SIZE(qt2410_nand_sets),
327 .sets = qt2410_nand_sets,
332 static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
335 static char tft_type = 's';
337 static int __init qt2410_tft_setup(char *str)
343 __setup("tft=", qt2410_tft_setup);
345 static void __init qt2410_map_io(void)
347 s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
348 s3c24xx_init_clocks(12*1000*1000);
349 s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
352 static void __init qt2410_machine_init(void)
354 s3c_device_nand.dev.platform_data = &qt2410_nand_info;
357 case 'p': /* production */
358 qt2410_fb_info.default_display = 1;
361 qt2410_fb_info.default_display = 0;
363 case 's': /* small */
365 qt2410_fb_info.default_display = 2;
368 s3c24xx_fb_set_platdata(&qt2410_fb_info);
370 s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPIO_OUTPUT);
371 s3c2410_gpio_setpin(S3C2410_GPB0, 1);
373 s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
375 s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT);
377 platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
381 MACHINE_START(QT2410, "QT2410")
382 .phys_io = S3C2410_PA_UART,
383 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
384 .boot_params = S3C2410_SDRAM_PA + 0x100,
385 .map_io = qt2410_map_io,
386 .init_irq = s3c24xx_init_irq,
387 .init_machine = qt2410_machine_init,
388 .timer = &s3c24xx_timer,