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s3c2410fb: remove lcdcon3 register from s3c2410fb_display
[linux-2.6] / arch / arm / mach-s3c2410 / mach-qt2410.c
1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
2  *
3  * Copyright (C) 2006 by OpenMoko, Inc.
4  * Author: Harald Welte <laforge@openmoko.org>
5  * All rights reserved.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  *
22  */
23
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/interrupt.h>
27 #include <linux/list.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/sysdev.h>
31 #include <linux/platform_device.h>
32 #include <linux/serial_core.h>
33 #include <linux/spi/spi.h>
34 #include <linux/spi/spi_bitbang.h>
35
36 #include <linux/mtd/mtd.h>
37 #include <linux/mtd/nand.h>
38 #include <linux/mtd/nand_ecc.h>
39 #include <linux/mtd/partitions.h>
40
41 #include <asm/mach/arch.h>
42 #include <asm/mach/map.h>
43 #include <asm/mach/irq.h>
44
45 #include <asm/hardware.h>
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/mach-types.h>
49
50 #include <asm/arch/regs-gpio.h>
51 #include <asm/arch/leds-gpio.h>
52 #include <asm/plat-s3c/regs-serial.h>
53 #include <asm/arch/fb.h>
54 #include <asm/plat-s3c/nand.h>
55 #include <asm/plat-s3c24xx/udc.h>
56 #include <asm/arch/spi.h>
57 #include <asm/arch/spi-gpio.h>
58
59 #include <asm/plat-s3c24xx/common-smdk.h>
60 #include <asm/plat-s3c24xx/devs.h>
61 #include <asm/plat-s3c24xx/cpu.h>
62 #include <asm/plat-s3c24xx/pm.h>
63
64 static struct map_desc qt2410_iodesc[] __initdata = {
65         { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
66 };
67
68 #define UCON S3C2410_UCON_DEFAULT
69 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
70 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
71
72 static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
73         [0] = {
74                 .hwport      = 0,
75                 .flags       = 0,
76                 .ucon        = UCON,
77                 .ulcon       = ULCON,
78                 .ufcon       = UFCON,
79         },
80         [1] = {
81                 .hwport      = 1,
82                 .flags       = 0,
83                 .ucon        = UCON,
84                 .ulcon       = ULCON,
85                 .ufcon       = UFCON,
86         },
87         [2] = {
88                 .hwport      = 2,
89                 .flags       = 0,
90                 .ucon        = UCON,
91                 .ulcon       = ULCON,
92                 .ufcon       = UFCON,
93         }
94 };
95
96 /* LCD driver info */
97
98 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
99         {
100                 /* Configuration for 640x480 SHARP LQ080V3DG01 */
101                 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
102                            S3C2410_LCDCON1_TFT |
103                            S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
104
105                 .lcdcon2 = S3C2410_LCDCON2_VBPD(18) |   /* 19 */
106                            S3C2410_LCDCON2_LINEVAL(479) |
107                            S3C2410_LCDCON2_VFPD(10) |   /* 11 */
108                            S3C2410_LCDCON2_VSPW(14),    /* 15 */
109
110                 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
111                            S3C2410_LCDCON4_HSPW(95),    /* 96 */
112
113                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
114                            S3C2410_LCDCON5_INVVLINE |
115                            S3C2410_LCDCON5_INVVFRAME |
116                            S3C2410_LCDCON5_PWREN |
117                            S3C2410_LCDCON5_HWSWP,
118
119                 .type           = S3C2410_LCDCON1_TFT,
120                 .width          = 640,
121                 .height         = 480,
122
123                 .xres           = 640,
124                 .yres           = 480,
125                 .bpp            = 16,
126                 .left_margin    = 44,
127                 .right_margin   = 116,
128         },
129         {
130                 /* Configuration for 480x640 toppoly TD028TTEC1 */
131                 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
132                            S3C2410_LCDCON1_TFT |
133                            S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
134
135                 .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |    /* 2 */
136                            S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
137                            S3C2410_LCDCON2_VFPD(3) |    /* 4 */
138                            S3C2410_LCDCON2_VSPW(1),     /* 2 */
139
140                 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
141                            S3C2410_LCDCON4_HSPW(7),     /* 8 */
142
143                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
144                            S3C2410_LCDCON5_INVVLINE |
145                            S3C2410_LCDCON5_INVVFRAME |
146                            S3C2410_LCDCON5_PWREN |
147                            S3C2410_LCDCON5_HWSWP,
148
149                 .type           = S3C2410_LCDCON1_TFT,
150                 .width          = 480,
151                 .height         = 640,
152                 .xres           = 480,
153                 .yres           = 640,
154                 .bpp            = 16,
155                 .left_margin    = 8,
156                 .right_margin   = 24,
157         },
158         {
159                 /* Config for 240x320 LCD */
160                 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
161                            S3C2410_LCDCON1_TFT |
162                            S3C2410_LCDCON1_CLKVAL(0x04),
163
164                 .lcdcon2 = S3C2410_LCDCON2_VBPD(1) |
165                            S3C2410_LCDCON2_LINEVAL(319) |
166                            S3C2410_LCDCON2_VFPD(6) |
167                            S3C2410_LCDCON2_VSPW(3),
168
169                 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
170                            S3C2410_LCDCON4_HSPW(3),
171
172                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
173                            S3C2410_LCDCON5_INVVLINE |
174                            S3C2410_LCDCON5_INVVFRAME |
175                            S3C2410_LCDCON5_PWREN |
176                            S3C2410_LCDCON5_HWSWP,
177
178                 .type           = S3C2410_LCDCON1_TFT,
179                 .width          = 240,
180                 .height         = 320,
181                 .xres           = 240,
182                 .yres           = 320,
183                 .bpp            = 16,
184                 .left_margin    = 13,
185                 .right_margin   = 8,
186         },
187 };
188
189
190 static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
191         .displays       = qt2410_lcd_cfg,
192         .num_displays   = ARRAY_SIZE(qt2410_lcd_cfg),
193         .default_display = 0,
194
195         .lpcsel         = ((0xCE6) & ~7) | 1<<4,
196 };
197
198 /* CS8900 */
199
200 static struct resource qt2410_cs89x0_resources[] = {
201         [0] = {
202                 .start  = 0x19000000,
203                 .end    = 0x19000000 + 16,
204                 .flags  = IORESOURCE_MEM,
205         },
206         [1] = {
207                 .start  = IRQ_EINT9,
208                 .end    = IRQ_EINT9,
209                 .flags  = IORESOURCE_IRQ,
210         },
211 };
212
213 static struct platform_device qt2410_cs89x0 = {
214         .name           = "cirrus-cs89x0",
215         .num_resources  = ARRAY_SIZE(qt2410_cs89x0_resources),
216         .resource       = qt2410_cs89x0_resources,
217 };
218
219 /* LED */
220
221 static struct s3c24xx_led_platdata qt2410_pdata_led = {
222         .gpio           = S3C2410_GPB0,
223         .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
224         .name           = "led",
225         .def_trigger    = "timer",
226 };
227
228 static struct platform_device qt2410_led = {
229         .name           = "s3c24xx_led",
230         .id             = 0,
231         .dev            = {
232                 .platform_data = &qt2410_pdata_led,
233         },
234 };
235
236 /* SPI */
237
238 static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
239 {
240         switch (cs) {
241         case BITBANG_CS_ACTIVE:
242                 s3c2410_gpio_setpin(S3C2410_GPB5, 0);
243                 break;
244         case BITBANG_CS_INACTIVE:
245                 s3c2410_gpio_setpin(S3C2410_GPB5, 1);
246                 break;
247         }
248 }
249
250 static struct s3c2410_spigpio_info spi_gpio_cfg = {
251         .pin_clk        = S3C2410_GPG7,
252         .pin_mosi       = S3C2410_GPG6,
253         .pin_miso       = S3C2410_GPG5,
254         .chip_select    = &spi_gpio_cs,
255 };
256
257
258 static struct platform_device qt2410_spi = {
259         .name             = "s3c24xx-spi-gpio",
260         .id               = 1,
261         .dev = {
262                 .platform_data = &spi_gpio_cfg,
263         },
264 };
265
266 /* Board devices */
267
268 static struct platform_device *qt2410_devices[] __initdata = {
269         &s3c_device_usb,
270         &s3c_device_lcd,
271         &s3c_device_wdt,
272         &s3c_device_i2c,
273         &s3c_device_iis,
274         &s3c_device_sdi,
275         &s3c_device_usbgadget,
276         &qt2410_spi,
277         &qt2410_cs89x0,
278         &qt2410_led,
279 };
280
281 static struct mtd_partition qt2410_nand_part[] = {
282         [0] = {
283                 .name   = "U-Boot",
284                 .size   = 0x30000,
285                 .offset = 0,
286         },
287         [1] = {
288                 .name   = "U-Boot environment",
289                 .offset = 0x30000,
290                 .size   = 0x4000,
291         },
292         [2] = {
293                 .name   = "kernel",
294                 .offset = 0x34000,
295                 .size   = SZ_2M,
296         },
297         [3] = {
298                 .name   = "initrd",
299                 .offset = 0x234000,
300                 .size   = SZ_4M,
301         },
302         [4] = {
303                 .name   = "jffs2",
304                 .offset = 0x634000,
305                 .size   = 0x39cc000,
306         },
307 };
308
309 static struct s3c2410_nand_set qt2410_nand_sets[] = {
310         [0] = {
311                 .name           = "NAND",
312                 .nr_chips       = 1,
313                 .nr_partitions  = ARRAY_SIZE(qt2410_nand_part),
314                 .partitions     = qt2410_nand_part,
315         },
316 };
317
318 /* choose a set of timings which should suit most 512Mbit
319  * chips and beyond.
320  */
321
322 static struct s3c2410_platform_nand qt2410_nand_info = {
323         .tacls          = 20,
324         .twrph0         = 60,
325         .twrph1         = 20,
326         .nr_sets        = ARRAY_SIZE(qt2410_nand_sets),
327         .sets           = qt2410_nand_sets,
328 };
329
330 /* UDC */
331
332 static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
333 };
334
335 static char tft_type = 's';
336
337 static int __init qt2410_tft_setup(char *str)
338 {
339         tft_type = str[0];
340         return 1;
341 }
342
343 __setup("tft=", qt2410_tft_setup);
344
345 static void __init qt2410_map_io(void)
346 {
347         s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
348         s3c24xx_init_clocks(12*1000*1000);
349         s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
350 }
351
352 static void __init qt2410_machine_init(void)
353 {
354         s3c_device_nand.dev.platform_data = &qt2410_nand_info;
355
356         switch (tft_type) {
357         case 'p': /* production */
358                 qt2410_fb_info.default_display = 1;
359                 break;
360         case 'b': /* big */
361                 qt2410_fb_info.default_display = 0;
362                 break;
363         case 's': /* small */
364         default:
365                 qt2410_fb_info.default_display = 2;
366                 break;
367         }
368         s3c24xx_fb_set_platdata(&qt2410_fb_info);
369
370         s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPIO_OUTPUT);
371         s3c2410_gpio_setpin(S3C2410_GPB0, 1);
372
373         s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
374
375         s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT);
376
377         platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
378         s3c2410_pm_init();
379 }
380
381 MACHINE_START(QT2410, "QT2410")
382         .phys_io        = S3C2410_PA_UART,
383         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
384         .boot_params    = S3C2410_SDRAM_PA + 0x100,
385         .map_io         = qt2410_map_io,
386         .init_irq       = s3c24xx_init_irq,
387         .init_machine   = qt2410_machine_init,
388         .timer          = &s3c24xx_timer,
389 MACHINE_END
390
391