1 /* linux/arch/arm/mach-s3c2410/devs.c
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * Base S3C2410 platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 * 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
14 * 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
15 * 29-Aug-2004 BJD Added timers 0 through 3
16 * 29-Aug-2004 BJD Changed index of devices we only have one of to -1
17 * 21-Aug-2004 BJD Added IRQ_TICK to RTC resources
18 * 18-Aug-2004 BJD Created initial version
21 #include <linux/kernel.h>
22 #include <linux/types.h>
23 #include <linux/interrupt.h>
24 #include <linux/list.h>
25 #include <linux/timer.h>
26 #include <linux/init.h>
27 #include <linux/device.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/irq.h>
33 #include <asm/hardware.h>
37 #include <asm/arch/regs-serial.h>
41 /* Serial port registrations */
43 struct platform_device *s3c24xx_uart_devs[3];
45 /* USB Host Controller */
47 static struct resource s3c_usb_resource[] = {
49 .start = S3C2410_PA_USBHOST,
50 .end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST,
51 .flags = IORESOURCE_MEM,
56 .flags = IORESOURCE_IRQ,
60 static u64 s3c_device_usb_dmamask = 0xffffffffUL;
62 struct platform_device s3c_device_usb = {
63 .name = "s3c2410-ohci",
65 .num_resources = ARRAY_SIZE(s3c_usb_resource),
66 .resource = s3c_usb_resource,
68 .dma_mask = &s3c_device_usb_dmamask,
69 .coherent_dma_mask = 0xffffffffUL
73 EXPORT_SYMBOL(s3c_device_usb);
77 static struct resource s3c_lcd_resource[] = {
79 .start = S3C2410_PA_LCD,
80 .end = S3C2410_PA_LCD + S3C24XX_SZ_LCD,
81 .flags = IORESOURCE_MEM,
86 .flags = IORESOURCE_IRQ,
91 static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
93 struct platform_device s3c_device_lcd = {
94 .name = "s3c2410-lcd",
96 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
97 .resource = s3c_lcd_resource,
99 .dma_mask = &s3c_device_lcd_dmamask,
100 .coherent_dma_mask = 0xffffffffUL
104 EXPORT_SYMBOL(s3c_device_lcd);
106 /* NAND Controller */
108 static struct resource s3c_nand_resource[] = {
110 .start = S3C2410_PA_NAND,
111 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND,
112 .flags = IORESOURCE_MEM,
116 struct platform_device s3c_device_nand = {
117 .name = "s3c2410-nand",
119 .num_resources = ARRAY_SIZE(s3c_nand_resource),
120 .resource = s3c_nand_resource,
123 EXPORT_SYMBOL(s3c_device_nand);
125 /* USB Device (Gadget)*/
127 static struct resource s3c_usbgadget_resource[] = {
129 .start = S3C2410_PA_USBDEV,
130 .end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV,
131 .flags = IORESOURCE_MEM,
136 .flags = IORESOURCE_IRQ,
141 struct platform_device s3c_device_usbgadget = {
142 .name = "s3c2410-usbgadget",
144 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
145 .resource = s3c_usbgadget_resource,
148 EXPORT_SYMBOL(s3c_device_usbgadget);
152 static struct resource s3c_wdt_resource[] = {
154 .start = S3C2410_PA_WATCHDOG,
155 .end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG,
156 .flags = IORESOURCE_MEM,
161 .flags = IORESOURCE_IRQ,
166 struct platform_device s3c_device_wdt = {
167 .name = "s3c2410-wdt",
169 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
170 .resource = s3c_wdt_resource,
173 EXPORT_SYMBOL(s3c_device_wdt);
177 static struct resource s3c_i2c_resource[] = {
179 .start = S3C2410_PA_IIC,
180 .end = S3C2410_PA_IIC + S3C24XX_SZ_IIC,
181 .flags = IORESOURCE_MEM,
186 .flags = IORESOURCE_IRQ,
191 struct platform_device s3c_device_i2c = {
192 .name = "s3c2410-i2c",
194 .num_resources = ARRAY_SIZE(s3c_i2c_resource),
195 .resource = s3c_i2c_resource,
198 EXPORT_SYMBOL(s3c_device_i2c);
202 static struct resource s3c_iis_resource[] = {
204 .start = S3C2410_PA_IIS,
205 .end = S3C2410_PA_IIS + S3C24XX_SZ_IIS,
206 .flags = IORESOURCE_MEM,
210 static u64 s3c_device_iis_dmamask = 0xffffffffUL;
212 struct platform_device s3c_device_iis = {
213 .name = "s3c2410-iis",
215 .num_resources = ARRAY_SIZE(s3c_iis_resource),
216 .resource = s3c_iis_resource,
218 .dma_mask = &s3c_device_iis_dmamask,
219 .coherent_dma_mask = 0xffffffffUL
223 EXPORT_SYMBOL(s3c_device_iis);
227 static struct resource s3c_rtc_resource[] = {
229 .start = S3C2410_PA_RTC,
230 .end = S3C2410_PA_RTC + 0xff,
231 .flags = IORESOURCE_MEM,
236 .flags = IORESOURCE_IRQ,
241 .flags = IORESOURCE_IRQ
245 struct platform_device s3c_device_rtc = {
246 .name = "s3c2410-rtc",
248 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
249 .resource = s3c_rtc_resource,
252 EXPORT_SYMBOL(s3c_device_rtc);
256 static struct resource s3c_adc_resource[] = {
258 .start = S3C2410_PA_ADC,
259 .end = S3C2410_PA_ADC + S3C24XX_SZ_ADC,
260 .flags = IORESOURCE_MEM,
265 .flags = IORESOURCE_IRQ,
270 struct platform_device s3c_device_adc = {
271 .name = "s3c2410-adc",
273 .num_resources = ARRAY_SIZE(s3c_adc_resource),
274 .resource = s3c_adc_resource,
279 static struct resource s3c_sdi_resource[] = {
281 .start = S3C2410_PA_SDI,
282 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI,
283 .flags = IORESOURCE_MEM,
288 .flags = IORESOURCE_IRQ,
293 struct platform_device s3c_device_sdi = {
294 .name = "s3c2410-sdi",
296 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
297 .resource = s3c_sdi_resource,
300 EXPORT_SYMBOL(s3c_device_sdi);
304 static struct resource s3c_spi0_resource[] = {
306 .start = S3C2410_PA_SPI,
307 .end = S3C2410_PA_SPI + 0x1f,
308 .flags = IORESOURCE_MEM,
313 .flags = IORESOURCE_IRQ,
318 struct platform_device s3c_device_spi0 = {
319 .name = "s3c2410-spi",
321 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
322 .resource = s3c_spi0_resource,
325 EXPORT_SYMBOL(s3c_device_spi0);
329 static struct resource s3c_spi1_resource[] = {
331 .start = S3C2410_PA_SPI + 0x20,
332 .end = S3C2410_PA_SPI + 0x20 + 0x1f,
333 .flags = IORESOURCE_MEM,
338 .flags = IORESOURCE_IRQ,
343 struct platform_device s3c_device_spi1 = {
344 .name = "s3c2410-spi",
346 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
347 .resource = s3c_spi1_resource,
350 EXPORT_SYMBOL(s3c_device_spi1);
352 /* pwm timer blocks */
354 static struct resource s3c_timer0_resource[] = {
356 .start = S3C2410_PA_TIMER + 0x0C,
357 .end = S3C2410_PA_TIMER + 0x0C + 0xB,
358 .flags = IORESOURCE_MEM,
363 .flags = IORESOURCE_IRQ,
368 struct platform_device s3c_device_timer0 = {
369 .name = "s3c2410-timer",
371 .num_resources = ARRAY_SIZE(s3c_timer0_resource),
372 .resource = s3c_timer0_resource,
375 EXPORT_SYMBOL(s3c_device_timer0);
379 static struct resource s3c_timer1_resource[] = {
381 .start = S3C2410_PA_TIMER + 0x18,
382 .end = S3C2410_PA_TIMER + 0x23,
383 .flags = IORESOURCE_MEM,
388 .flags = IORESOURCE_IRQ,
393 struct platform_device s3c_device_timer1 = {
394 .name = "s3c2410-timer",
396 .num_resources = ARRAY_SIZE(s3c_timer1_resource),
397 .resource = s3c_timer1_resource,
400 EXPORT_SYMBOL(s3c_device_timer1);
404 static struct resource s3c_timer2_resource[] = {
406 .start = S3C2410_PA_TIMER + 0x24,
407 .end = S3C2410_PA_TIMER + 0x2F,
408 .flags = IORESOURCE_MEM,
413 .flags = IORESOURCE_IRQ,
418 struct platform_device s3c_device_timer2 = {
419 .name = "s3c2410-timer",
421 .num_resources = ARRAY_SIZE(s3c_timer2_resource),
422 .resource = s3c_timer2_resource,
425 EXPORT_SYMBOL(s3c_device_timer2);
429 static struct resource s3c_timer3_resource[] = {
431 .start = S3C2410_PA_TIMER + 0x30,
432 .end = S3C2410_PA_TIMER + 0x3B,
433 .flags = IORESOURCE_MEM,
438 .flags = IORESOURCE_IRQ,
443 struct platform_device s3c_device_timer3 = {
444 .name = "s3c2410-timer",
446 .num_resources = ARRAY_SIZE(s3c_timer3_resource),
447 .resource = s3c_timer3_resource,
450 EXPORT_SYMBOL(s3c_device_timer3);
452 #ifdef CONFIG_CPU_S3C2440
454 /* Camif Controller */
456 static struct resource s3c_camif_resource[] = {
458 .start = S3C2440_PA_CAMIF,
459 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF,
460 .flags = IORESOURCE_MEM,
465 .flags = IORESOURCE_IRQ,
470 static u64 s3c_device_camif_dmamask = 0xffffffffUL;
472 struct platform_device s3c_device_camif = {
473 .name = "s3c2440-camif",
475 .num_resources = ARRAY_SIZE(s3c_camif_resource),
476 .resource = s3c_camif_resource,
478 .dma_mask = &s3c_device_camif_dmamask,
479 .coherent_dma_mask = 0xffffffffUL
483 EXPORT_SYMBOL(s3c_device_camif);
485 #endif // CONFIG_CPU_S32440