2 * linux/arch/arm/mach-realview/platsmp.c
4 * Copyright (C) 2002 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/delay.h>
14 #include <linux/device.h>
15 #include <linux/smp.h>
17 #include <asm/cacheflush.h>
18 #include <asm/hardware.h>
20 #include <asm/mach-types.h>
22 #include <asm/arch/board-eb.h>
23 #include <asm/arch/scu.h>
25 extern void realview_secondary_startup(void);
28 * control for which core is the next to come out of the secondary
31 volatile int __cpuinitdata pen_release = -1;
33 static unsigned int __init get_core_count(void)
36 void __iomem *scu_base = 0;
38 if (machine_is_realview_eb() && core_tile_eb11mp())
39 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
42 ncores = __raw_readl(scu_base + SCU_CONFIG);
43 ncores = (ncores & 0x03) + 1;
53 static void scu_enable(void)
56 void __iomem *scu_base;
58 if (machine_is_realview_eb() && core_tile_eb11mp())
59 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
63 scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
65 __raw_writel(scu_ctrl, scu_base + SCU_CTRL);
68 static DEFINE_SPINLOCK(boot_lock);
70 void __cpuinit platform_secondary_init(unsigned int cpu)
73 * the primary core may have used a "cross call" soft interrupt
74 * to get this processor out of WFI in the BootMonitor - make
75 * sure that we are no longer being sent this soft interrupt
77 smp_cross_call_done(cpumask_of_cpu(cpu));
80 * if any interrupts are already enabled for the primary
81 * core (e.g. timer irq), then they will not have been enabled
84 gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
87 * let the primary processor know we're out of the
88 * pen, then head off into the C entry point
94 * Synchronise with the boot thread.
96 spin_lock(&boot_lock);
97 spin_unlock(&boot_lock);
100 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
102 unsigned long timeout;
105 * set synchronisation state between this boot processor
106 * and the secondary one
108 spin_lock(&boot_lock);
111 * The secondary processor is waiting to be released from
112 * the holding pen - release it, then wait for it to flag
113 * that it has been released by resetting pen_release.
115 * Note that "pen_release" is the hardware CPU ID, whereas
116 * "cpu" is Linux's internal ID.
124 * This is a later addition to the booting protocol: the
125 * bootMonitor now puts secondary cores into WFI, so
126 * poke_milo() no longer gets the cores moving; we need
127 * to send a soft interrupt to wake the secondary core.
128 * Use smp_cross_call() for this, since there's little
129 * point duplicating the code here
131 smp_cross_call(cpumask_of_cpu(cpu));
133 timeout = jiffies + (1 * HZ);
134 while (time_before(jiffies, timeout)) {
136 if (pen_release == -1)
143 * now the secondary core is starting up let it run its
144 * calibrations, then wait for it to finish
146 spin_unlock(&boot_lock);
148 return pen_release != -1 ? -ENOSYS : 0;
151 static void __init poke_milo(void)
153 extern void secondary_startup(void);
155 /* nobody is to be released from the pen yet */
159 * write the address of secondary startup into the system-wide
160 * flags register, then clear the bottom two bits, which is what
161 * BootMonitor is waiting for
164 #define REALVIEW_SYS_FLAGSS_OFFSET 0x30
165 __raw_writel(virt_to_phys(realview_secondary_startup),
166 __io_address(REALVIEW_SYS_BASE) +
167 REALVIEW_SYS_FLAGSS_OFFSET);
168 #define REALVIEW_SYS_FLAGSC_OFFSET 0x34
170 __io_address(REALVIEW_SYS_BASE) +
171 REALVIEW_SYS_FLAGSC_OFFSET);
178 * Initialise the CPU possible map early - this describes the CPUs
179 * which may be present or become present in the system.
181 void __init smp_init_cpus(void)
183 unsigned int i, ncores = get_core_count();
185 for (i = 0; i < ncores; i++)
186 cpu_set(i, cpu_possible_map);
189 void __init smp_prepare_cpus(unsigned int max_cpus)
191 unsigned int ncores = get_core_count();
192 unsigned int cpu = smp_processor_id();
198 "Realview: strange CM count of 0? Default to 1\n");
203 if (ncores > NR_CPUS) {
205 "Realview: no. of cores (%d) greater than configured "
206 "maximum of %d - clipping\n",
211 smp_store_cpu_info(cpu);
214 * are we trying to boot more cores than exist?
216 if (max_cpus > ncores)
219 #ifdef CONFIG_LOCAL_TIMERS
221 * Enable the local timer for primary CPU. If the device is
222 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
223 * realview_timer_init
225 if (machine_is_realview_eb() && core_tile_eb11mp())
226 local_timer_setup(cpu);
230 * Initialise the present map, which describes the set of CPUs
231 * actually populated at the present time.
233 for (i = 0; i < max_cpus; i++)
234 cpu_set(i, cpu_present_map);
237 * Initialise the SCU if there are more than one CPU and let
238 * them know where to start. Note that, on modern versions of
239 * MILO, the "poke" doesn't actually do anything until each
240 * individual core is sent a soft interrupt to get it out of