2 * linux/arch/arm/mach-realview/core.h
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #ifndef __ASM_ARCH_REALVIEW_H
23 #define __ASM_ARCH_REALVIEW_H
25 #include <asm/hardware/amba.h>
29 #define __io_address(n) __io(IO_ADDRESS(n))
31 extern struct sys_timer realview_timer;
33 #define AMBA_DEVICE(name,busid,base,plat) \
34 static struct amba_device name##_device = { \
36 .coherent_dma_mask = ~0, \
38 .platform_data = plat, \
41 .start = REALVIEW_##base##_BASE, \
42 .end = (REALVIEW_##base##_BASE) + SZ_4K - 1,\
43 .flags = IORESOURCE_MEM, \
47 /* .dma = base##_DMA,*/ \
51 * These devices are connected via the core APB bridge
53 #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ }
54 #define GPIO2_DMA { 0, 0 }
55 #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ }
56 #define GPIO3_DMA { 0, 0 }
58 #define AACI_IRQ { IRQ_AACI, NO_IRQ }
59 #define AACI_DMA { 0x80, 0x81 }
60 #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_MMCI0B }
61 #define MMCI0_DMA { 0x84, 0 }
62 #define KMI0_IRQ { IRQ_KMI0, NO_IRQ }
63 #define KMI0_DMA { 0, 0 }
64 #define KMI1_IRQ { IRQ_KMI1, NO_IRQ }
65 #define KMI1_DMA { 0, 0 }
68 * These devices are connected directly to the multi-layer AHB switch
70 #define SMC_IRQ { NO_IRQ, NO_IRQ }
71 #define SMC_DMA { 0, 0 }
72 #define MPMC_IRQ { NO_IRQ, NO_IRQ }
73 #define MPMC_DMA { 0, 0 }
74 #define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ }
75 #define CLCD_DMA { 0, 0 }
76 #define DMAC_IRQ { IRQ_DMAINT, NO_IRQ }
77 #define DMAC_DMA { 0, 0 }
80 * These devices are connected via the core APB bridge
82 #define SCTL_IRQ { NO_IRQ, NO_IRQ }
83 #define SCTL_DMA { 0, 0 }
84 #define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ }
85 #define WATCHDOG_DMA { 0, 0 }
86 #define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ }
87 #define GPIO0_DMA { 0, 0 }
88 #define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ }
89 #define GPIO1_DMA { 0, 0 }
90 #define RTC_IRQ { IRQ_RTCINT, NO_IRQ }
91 #define RTC_DMA { 0, 0 }
94 * These devices are connected via the DMA APB bridge
96 #define SCI_IRQ { IRQ_SCIINT, NO_IRQ }
97 #define SCI_DMA { 7, 6 }
98 #define UART0_IRQ { IRQ_UARTINT0, NO_IRQ }
99 #define UART0_DMA { 15, 14 }
100 #define UART1_IRQ { IRQ_UARTINT1, NO_IRQ }
101 #define UART1_DMA { 13, 12 }
102 #define UART2_IRQ { IRQ_UARTINT2, NO_IRQ }
103 #define UART2_DMA { 11, 10 }
104 #define UART3_IRQ { IRQ_UART3, NO_IRQ }
105 #define UART3_DMA { 0x86, 0x87 }
106 #define SSP_IRQ { IRQ_SSPINT, NO_IRQ }
107 #define SSP_DMA { 9, 8 }
110 extern struct platform_device realview_flash_device;
111 extern struct platform_device realview_smc91x_device;
112 extern struct mmc_platform_data realview_mmc0_plat_data;
113 extern struct mmc_platform_data realview_mmc1_plat_data;
114 extern struct clk realview_clcd_clk;
115 extern struct clcd_board clcd_plat_data;
117 extern void realview_leds_event(led_event_t ledevt);