2 * linux/arch/arm/mach-pxa/lpd270.c
4 * Support for the LogicPD PXA270 Card Engine.
5 * Derived from the mainstone code, which carries these notices:
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
27 #include <asm/types.h>
28 #include <asm/setup.h>
29 #include <asm/memory.h>
30 #include <asm/mach-types.h>
31 #include <asm/hardware.h>
33 #include <asm/sizes.h>
35 #include <asm/mach/arch.h>
36 #include <asm/mach/map.h>
37 #include <asm/mach/irq.h>
38 #include <asm/mach/flash.h>
40 #include <asm/arch/pxa-regs.h>
41 #include <asm/arch/lpd270.h>
42 #include <asm/arch/audio.h>
43 #include <asm/arch/pxafb.h>
44 #include <asm/arch/mmc.h>
45 #include <asm/arch/irda.h>
46 #include <asm/arch/ohci.h>
51 static unsigned int lpd270_irq_enabled;
53 static void lpd270_mask_irq(unsigned int irq)
55 int lpd270_irq = irq - LPD270_IRQ(0);
57 __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
59 lpd270_irq_enabled &= ~(1 << lpd270_irq);
60 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
63 static void lpd270_unmask_irq(unsigned int irq)
65 int lpd270_irq = irq - LPD270_IRQ(0);
67 lpd270_irq_enabled |= 1 << lpd270_irq;
68 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
71 static struct irqchip lpd270_irq_chip = {
72 .ack = lpd270_mask_irq,
73 .mask = lpd270_mask_irq,
74 .unmask = lpd270_unmask_irq,
77 static void lpd270_irq_handler(unsigned int irq, struct irqdesc *desc,
80 unsigned long pending;
82 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
84 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
85 if (likely(pending)) {
86 irq = LPD270_IRQ(0) + __ffs(pending);
87 desc = irq_desc + irq;
88 desc_handle_irq(irq, desc, regs);
90 pending = __raw_readw(LPD270_INT_STATUS) &
96 static void __init lpd270_init_irq(void)
102 __raw_writew(0, LPD270_INT_MASK);
103 __raw_writew(0, LPD270_INT_STATUS);
105 /* setup extra LogicPD PXA270 irqs */
106 for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
107 set_irq_chip(irq, &lpd270_irq_chip);
108 set_irq_handler(irq, do_level_IRQ);
109 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
111 set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
112 set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
117 static int lpd270_irq_resume(struct sys_device *dev)
119 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
123 static struct sysdev_class lpd270_irq_sysclass = {
124 set_kset_name("cpld_irq"),
125 .resume = lpd270_irq_resume,
128 static struct sys_device lpd270_irq_device = {
129 .cls = &lpd270_irq_sysclass,
132 static int __init lpd270_irq_device_init(void)
134 int ret = sysdev_class_register(&lpd270_irq_sysclass);
136 ret = sysdev_register(&lpd270_irq_device);
140 device_initcall(lpd270_irq_device_init);
144 static struct resource smc91x_resources[] = {
146 .start = LPD270_ETH_PHYS,
147 .end = (LPD270_ETH_PHYS + 0xfffff),
148 .flags = IORESOURCE_MEM,
151 .start = LPD270_ETHERNET_IRQ,
152 .end = LPD270_ETHERNET_IRQ,
153 .flags = IORESOURCE_IRQ,
157 static struct platform_device smc91x_device = {
160 .num_resources = ARRAY_SIZE(smc91x_resources),
161 .resource = smc91x_resources,
164 static struct platform_device lpd270_audio_device = {
165 .name = "pxa2xx-ac97",
169 static struct resource lpd270_flash_resources[] = {
171 .start = PXA_CS0_PHYS,
172 .end = PXA_CS0_PHYS + SZ_64M - 1,
173 .flags = IORESOURCE_MEM,
176 .start = PXA_CS1_PHYS,
177 .end = PXA_CS1_PHYS + SZ_64M - 1,
178 .flags = IORESOURCE_MEM,
182 static struct mtd_partition lpd270_flash0_partitions[] = {
184 .name = "Bootloader",
187 .mask_flags = MTD_WRITEABLE /* force read-only */
191 .offset = 0x00040000,
193 .name = "Filesystem",
194 .size = MTDPART_SIZ_FULL,
199 static struct flash_platform_data lpd270_flash_data[2] = {
201 .name = "processor-flash",
202 .map_name = "cfi_probe",
203 .parts = lpd270_flash0_partitions,
204 .nr_parts = ARRAY_SIZE(lpd270_flash0_partitions),
206 .name = "mainboard-flash",
207 .map_name = "cfi_probe",
213 static struct platform_device lpd270_flash_device[2] = {
215 .name = "pxa2xx-flash",
218 .platform_data = &lpd270_flash_data[0],
220 .resource = &lpd270_flash_resources[0],
223 .name = "pxa2xx-flash",
226 .platform_data = &lpd270_flash_data[1],
228 .resource = &lpd270_flash_resources[1],
233 static void lpd270_backlight_power(int on)
236 pxa_gpio_mode(GPIO16_PWM0_MD);
237 pxa_set_cken(CKEN0_PWM0, 1);
245 pxa_set_cken(CKEN0_PWM0, 0);
249 /* 5.7" TFT QVGA (LoLo display number 1) */
250 static struct pxafb_mach_info sharp_lq057q3dc02 __initdata = {
257 .right_margin = 0x0a,
259 .upper_margin = 0x08,
260 .lower_margin = 0x14,
261 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
264 .pxafb_backlight_power = lpd270_backlight_power,
267 /* 12.1" TFT SVGA (LoLo display number 2) */
268 static struct pxafb_mach_info sharp_lq121s1dg31 __initdata = {
275 .right_margin = 0x05,
277 .upper_margin = 0x14,
278 .lower_margin = 0x0a,
279 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
282 .pxafb_backlight_power = lpd270_backlight_power,
285 /* 3.6" TFT QVGA (LoLo display number 3) */
286 static struct pxafb_mach_info sharp_lq036q1da01 __initdata = {
293 .right_margin = 0x0a,
295 .upper_margin = 0x03,
296 .lower_margin = 0x03,
297 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
300 .pxafb_backlight_power = lpd270_backlight_power,
303 /* 6.4" TFT VGA (LoLo display number 5) */
304 static struct pxafb_mach_info sharp_lq64d343 __initdata = {
311 .right_margin = 0x19,
313 .upper_margin = 0x22,
314 .lower_margin = 0x00,
315 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
318 .pxafb_backlight_power = lpd270_backlight_power,
321 /* 10.4" TFT VGA (LoLo display number 7) */
322 static struct pxafb_mach_info sharp_lq10d368 __initdata = {
329 .right_margin = 0x19,
331 .upper_margin = 0x22,
332 .lower_margin = 0x00,
333 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
336 .pxafb_backlight_power = lpd270_backlight_power,
339 /* 3.5" TFT QVGA (LoLo display number 8) */
340 static struct pxafb_mach_info sharp_lq035q7db02_20 __initdata = {
347 .right_margin = 0x0a,
349 .upper_margin = 0x05,
350 .lower_margin = 0x14,
351 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
354 .pxafb_backlight_power = lpd270_backlight_power,
357 static struct pxafb_mach_info *lpd270_lcd_to_use;
359 static int __init lpd270_set_lcd(char *str)
361 if (!strnicmp(str, "lq057q3dc02", 11)) {
362 lpd270_lcd_to_use = &sharp_lq057q3dc02;
363 } else if (!strnicmp(str, "lq121s1dg31", 11)) {
364 lpd270_lcd_to_use = &sharp_lq121s1dg31;
365 } else if (!strnicmp(str, "lq036q1da01", 11)) {
366 lpd270_lcd_to_use = &sharp_lq036q1da01;
367 } else if (!strnicmp(str, "lq64d343", 8)) {
368 lpd270_lcd_to_use = &sharp_lq64d343;
369 } else if (!strnicmp(str, "lq10d368", 8)) {
370 lpd270_lcd_to_use = &sharp_lq10d368;
371 } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
372 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
374 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
380 __setup("lcd=", lpd270_set_lcd);
382 static struct platform_device *platform_devices[] __initdata = {
384 &lpd270_audio_device,
385 &lpd270_flash_device[0],
386 &lpd270_flash_device[1],
389 static int lpd270_ohci_init(struct device *dev)
391 /* setup Port1 GPIO pin. */
392 pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
393 pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
395 /* Set the Power Control Polarity Low and Power Sense
396 Polarity Low to active low. */
397 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
398 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
403 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
404 .port_mode = PMM_PERPORT_MODE,
405 .init = lpd270_ohci_init,
408 static void __init lpd270_init(void)
410 lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
411 lpd270_flash_data[1].width = 4;
414 * System bus arbiter setting:
416 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
418 ARB_CNTRL = ARB_CORE_PARK | 0x234;
421 * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45.
423 pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
425 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
427 if (lpd270_lcd_to_use != NULL)
428 set_pxa_fb_info(lpd270_lcd_to_use);
430 pxa_set_ohci_info(&lpd270_ohci_platform_data);
434 static struct map_desc lpd270_io_desc[] __initdata = {
436 .virtual = LPD270_CPLD_VIRT,
437 .pfn = __phys_to_pfn(LPD270_CPLD_PHYS),
438 .length = LPD270_CPLD_SIZE,
443 static void __init lpd270_map_io(void)
446 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
448 /* initialize sleep mode regs (wake-up sources, etc) */
457 /* for use I SRAM as framebuffer. */
462 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
463 /* Maintainer: Peter Barada */
464 .phys_io = 0x40000000,
465 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
466 .boot_params = 0xa0000100,
467 .map_io = lpd270_map_io,
468 .init_irq = lpd270_init_irq,
470 .init_machine = lpd270_init,