2 * arch/arm/mach-orion5x/common.c
4 * Core functions for Marvell Orion 5x SoCs
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/serial_8250.h>
17 #include <linux/mbus.h>
18 #include <linux/mv643xx_eth.h>
19 #include <linux/mv643xx_i2c.h>
20 #include <linux/ata_platform.h>
22 #include <asm/setup.h>
23 #include <asm/timex.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/time.h>
27 #include <asm/arch/hardware.h>
28 #include <asm/arch/orion5x.h>
29 #include <asm/plat-orion/ehci-orion.h>
30 #include <asm/plat-orion/orion_nand.h>
31 #include <asm/plat-orion/time.h>
34 /*****************************************************************************
36 ****************************************************************************/
37 static struct map_desc orion5x_io_desc[] __initdata = {
39 .virtual = ORION5X_REGS_VIRT_BASE,
40 .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
41 .length = ORION5X_REGS_SIZE,
45 .virtual = ORION5X_PCIE_IO_VIRT_BASE,
46 .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
47 .length = ORION5X_PCIE_IO_SIZE,
51 .virtual = ORION5X_PCI_IO_VIRT_BASE,
52 .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
53 .length = ORION5X_PCI_IO_SIZE,
57 .virtual = ORION5X_PCIE_WA_VIRT_BASE,
58 .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
59 .length = ORION5X_PCIE_WA_SIZE,
64 void __init orion5x_map_io(void)
66 iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
69 /*****************************************************************************
71 ****************************************************************************/
73 static struct resource orion5x_uart_resources[] = {
75 .start = UART0_PHYS_BASE,
76 .end = UART0_PHYS_BASE + 0xff,
77 .flags = IORESOURCE_MEM,
80 .start = IRQ_ORION5X_UART0,
81 .end = IRQ_ORION5X_UART0,
82 .flags = IORESOURCE_IRQ,
85 .start = UART1_PHYS_BASE,
86 .end = UART1_PHYS_BASE + 0xff,
87 .flags = IORESOURCE_MEM,
90 .start = IRQ_ORION5X_UART1,
91 .end = IRQ_ORION5X_UART1,
92 .flags = IORESOURCE_IRQ,
96 static struct plat_serial8250_port orion5x_uart_data[] = {
98 .mapbase = UART0_PHYS_BASE,
99 .membase = (char *)UART0_VIRT_BASE,
100 .irq = IRQ_ORION5X_UART0,
101 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
104 .uartclk = ORION5X_TCLK,
107 .mapbase = UART1_PHYS_BASE,
108 .membase = (char *)UART1_VIRT_BASE,
109 .irq = IRQ_ORION5X_UART1,
110 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
113 .uartclk = ORION5X_TCLK,
118 static struct platform_device orion5x_uart = {
119 .name = "serial8250",
120 .id = PLAT8250_DEV_PLATFORM,
122 .platform_data = orion5x_uart_data,
124 .resource = orion5x_uart_resources,
125 .num_resources = ARRAY_SIZE(orion5x_uart_resources),
128 /*******************************************************************************
129 * USB Controller - 2 interfaces
130 ******************************************************************************/
132 static struct resource orion5x_ehci0_resources[] = {
134 .start = ORION5X_USB0_PHYS_BASE,
135 .end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
136 .flags = IORESOURCE_MEM,
139 .start = IRQ_ORION5X_USB0_CTRL,
140 .end = IRQ_ORION5X_USB0_CTRL,
141 .flags = IORESOURCE_IRQ,
145 static struct resource orion5x_ehci1_resources[] = {
147 .start = ORION5X_USB1_PHYS_BASE,
148 .end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
149 .flags = IORESOURCE_MEM,
152 .start = IRQ_ORION5X_USB1_CTRL,
153 .end = IRQ_ORION5X_USB1_CTRL,
154 .flags = IORESOURCE_IRQ,
158 static struct orion_ehci_data orion5x_ehci_data = {
159 .dram = &orion5x_mbus_dram_info,
162 static u64 ehci_dmamask = 0xffffffffUL;
164 static struct platform_device orion5x_ehci0 = {
165 .name = "orion-ehci",
168 .dma_mask = &ehci_dmamask,
169 .coherent_dma_mask = 0xffffffff,
170 .platform_data = &orion5x_ehci_data,
172 .resource = orion5x_ehci0_resources,
173 .num_resources = ARRAY_SIZE(orion5x_ehci0_resources),
176 static struct platform_device orion5x_ehci1 = {
177 .name = "orion-ehci",
180 .dma_mask = &ehci_dmamask,
181 .coherent_dma_mask = 0xffffffff,
182 .platform_data = &orion5x_ehci_data,
184 .resource = orion5x_ehci1_resources,
185 .num_resources = ARRAY_SIZE(orion5x_ehci1_resources),
188 /*****************************************************************************
189 * Gigabit Ethernet port
190 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
191 ****************************************************************************/
193 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
194 .dram = &orion5x_mbus_dram_info,
197 static struct resource orion5x_eth_shared_resources[] = {
199 .start = ORION5X_ETH_PHYS_BASE + 0x2000,
200 .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
201 .flags = IORESOURCE_MEM,
205 static struct platform_device orion5x_eth_shared = {
206 .name = MV643XX_ETH_SHARED_NAME,
209 .platform_data = &orion5x_eth_shared_data,
212 .resource = orion5x_eth_shared_resources,
215 static struct resource orion5x_eth_resources[] = {
218 .start = IRQ_ORION5X_ETH_SUM,
219 .end = IRQ_ORION5X_ETH_SUM,
220 .flags = IORESOURCE_IRQ,
224 static struct platform_device orion5x_eth = {
225 .name = MV643XX_ETH_NAME,
228 .resource = orion5x_eth_resources,
231 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
233 eth_data->shared = &orion5x_eth_shared;
234 orion5x_eth.dev.platform_data = eth_data;
236 platform_device_register(&orion5x_eth_shared);
237 platform_device_register(&orion5x_eth);
240 /*****************************************************************************
242 * (The Orion and Discovery (MV643xx) families share the same I2C controller)
243 ****************************************************************************/
245 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
246 .freq_m = 8, /* assumes 166 MHz TCLK */
248 .timeout = 1000, /* Default timeout of 1 second */
251 static struct resource orion5x_i2c_resources[] = {
254 .start = I2C_PHYS_BASE,
255 .end = I2C_PHYS_BASE + 0x20 -1,
256 .flags = IORESOURCE_MEM,
260 .start = IRQ_ORION5X_I2C,
261 .end = IRQ_ORION5X_I2C,
262 .flags = IORESOURCE_IRQ,
266 static struct platform_device orion5x_i2c = {
267 .name = MV64XXX_I2C_CTLR_NAME,
269 .num_resources = ARRAY_SIZE(orion5x_i2c_resources),
270 .resource = orion5x_i2c_resources,
272 .platform_data = &orion5x_i2c_pdata,
276 /*****************************************************************************
278 ****************************************************************************/
279 static struct resource orion5x_sata_resources[] = {
282 .start = ORION5X_SATA_PHYS_BASE,
283 .end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
284 .flags = IORESOURCE_MEM,
288 .start = IRQ_ORION5X_SATA,
289 .end = IRQ_ORION5X_SATA,
290 .flags = IORESOURCE_IRQ,
294 static struct platform_device orion5x_sata = {
298 .coherent_dma_mask = 0xffffffff,
300 .num_resources = ARRAY_SIZE(orion5x_sata_resources),
301 .resource = orion5x_sata_resources,
304 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
306 sata_data->dram = &orion5x_mbus_dram_info;
307 orion5x_sata.dev.platform_data = sata_data;
308 platform_device_register(&orion5x_sata);
311 /*****************************************************************************
313 ****************************************************************************/
315 static void orion5x_timer_init(void)
317 orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK);
320 struct sys_timer orion5x_timer = {
321 .init = orion5x_timer_init,
324 /*****************************************************************************
326 ****************************************************************************/
329 * Identify device ID and rev from PCIe configuration header space '0'.
331 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
333 orion5x_pcie_id(dev, rev);
335 if (*dev == MV88F5281_DEV_ID) {
336 if (*rev == MV88F5281_REV_D2) {
337 *dev_name = "MV88F5281-D2";
338 } else if (*rev == MV88F5281_REV_D1) {
339 *dev_name = "MV88F5281-D1";
341 *dev_name = "MV88F5281-Rev-Unsupported";
343 } else if (*dev == MV88F5182_DEV_ID) {
344 if (*rev == MV88F5182_REV_A2) {
345 *dev_name = "MV88F5182-A2";
347 *dev_name = "MV88F5182-Rev-Unsupported";
349 } else if (*dev == MV88F5181_DEV_ID) {
350 if (*rev == MV88F5181_REV_B1) {
351 *dev_name = "MV88F5181-Rev-B1";
353 *dev_name = "MV88F5181-Rev-Unsupported";
356 *dev_name = "Device-Unknown";
360 void __init orion5x_init(void)
365 orion5x_id(&dev, &rev, &dev_name);
366 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK);
369 * Setup Orion address map
371 orion5x_setup_cpu_mbus_bridge();
376 platform_device_register(&orion5x_uart);
377 platform_device_register(&orion5x_ehci0);
378 if (dev == MV88F5182_DEV_ID)
379 platform_device_register(&orion5x_ehci1);
380 platform_device_register(&orion5x_i2c);
384 * Many orion-based systems have buggy bootloader implementations.
385 * This is a common fixup for bogus memory tags.
387 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
388 char **from, struct meminfo *meminfo)
390 for (; t->hdr.size; t = tag_next(t))
391 if (t->hdr.tag == ATAG_MEM &&
392 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
393 t->u.mem.start & ~PAGE_MASK)) {
395 "Clearing invalid memory bank %dKB@0x%08x\n",
396 t->u.mem.size / 1024, t->u.mem.start);