2 * arch/arm/mach-at91rm9200/at91rm9200.c
4 * Copyright (C) 2005 SAN People
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/module.h>
15 #include <asm/mach/arch.h>
16 #include <asm/mach/map.h>
17 #include <asm/arch/at91rm9200.h>
18 #include <asm/arch/at91_pmc.h>
19 #include <asm/arch/at91_st.h>
24 static struct map_desc at91rm9200_io_desc[] __initdata = {
26 .virtual = AT91_VA_BASE_SYS,
27 .pfn = __phys_to_pfn(AT91_BASE_SYS),
31 .virtual = AT91_VA_BASE_SPI,
32 .pfn = __phys_to_pfn(AT91RM9200_BASE_SPI),
36 .virtual = AT91_VA_BASE_EMAC,
37 .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
41 .virtual = AT91_VA_BASE_TWI,
42 .pfn = __phys_to_pfn(AT91RM9200_BASE_TWI),
46 .virtual = AT91_VA_BASE_MCI,
47 .pfn = __phys_to_pfn(AT91RM9200_BASE_MCI),
51 .virtual = AT91_VA_BASE_UDP,
52 .pfn = __phys_to_pfn(AT91RM9200_BASE_UDP),
56 .virtual = AT91_SRAM_VIRT_BASE,
57 .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE),
58 .length = AT91RM9200_SRAM_SIZE,
63 /* --------------------------------------------------------------------
65 * -------------------------------------------------------------------- */
68 * The peripheral clocks.
70 static struct clk udc_clk = {
72 .pmc_mask = 1 << AT91RM9200_ID_UDP,
73 .type = CLK_TYPE_PERIPHERAL,
75 static struct clk ohci_clk = {
77 .pmc_mask = 1 << AT91RM9200_ID_UHP,
78 .type = CLK_TYPE_PERIPHERAL,
80 static struct clk ether_clk = {
82 .pmc_mask = 1 << AT91RM9200_ID_EMAC,
83 .type = CLK_TYPE_PERIPHERAL,
85 static struct clk mmc_clk = {
87 .pmc_mask = 1 << AT91RM9200_ID_MCI,
88 .type = CLK_TYPE_PERIPHERAL,
90 static struct clk twi_clk = {
92 .pmc_mask = 1 << AT91RM9200_ID_TWI,
93 .type = CLK_TYPE_PERIPHERAL,
95 static struct clk usart0_clk = {
97 .pmc_mask = 1 << AT91RM9200_ID_US0,
98 .type = CLK_TYPE_PERIPHERAL,
100 static struct clk usart1_clk = {
101 .name = "usart1_clk",
102 .pmc_mask = 1 << AT91RM9200_ID_US1,
103 .type = CLK_TYPE_PERIPHERAL,
105 static struct clk usart2_clk = {
106 .name = "usart2_clk",
107 .pmc_mask = 1 << AT91RM9200_ID_US2,
108 .type = CLK_TYPE_PERIPHERAL,
110 static struct clk usart3_clk = {
111 .name = "usart3_clk",
112 .pmc_mask = 1 << AT91RM9200_ID_US3,
113 .type = CLK_TYPE_PERIPHERAL,
115 static struct clk spi_clk = {
117 .pmc_mask = 1 << AT91RM9200_ID_SPI,
118 .type = CLK_TYPE_PERIPHERAL,
120 static struct clk pioA_clk = {
122 .pmc_mask = 1 << AT91RM9200_ID_PIOA,
123 .type = CLK_TYPE_PERIPHERAL,
125 static struct clk pioB_clk = {
127 .pmc_mask = 1 << AT91RM9200_ID_PIOB,
128 .type = CLK_TYPE_PERIPHERAL,
130 static struct clk pioC_clk = {
132 .pmc_mask = 1 << AT91RM9200_ID_PIOC,
133 .type = CLK_TYPE_PERIPHERAL,
135 static struct clk pioD_clk = {
137 .pmc_mask = 1 << AT91RM9200_ID_PIOD,
138 .type = CLK_TYPE_PERIPHERAL,
141 static struct clk *periph_clocks[] __initdata = {
162 * The four programmable clocks.
163 * You must configure pin multiplexing to bring these signals out.
165 static struct clk pck0 = {
167 .pmc_mask = AT91_PMC_PCK0,
168 .type = CLK_TYPE_PROGRAMMABLE,
171 static struct clk pck1 = {
173 .pmc_mask = AT91_PMC_PCK1,
174 .type = CLK_TYPE_PROGRAMMABLE,
177 static struct clk pck2 = {
179 .pmc_mask = AT91_PMC_PCK2,
180 .type = CLK_TYPE_PROGRAMMABLE,
183 static struct clk pck3 = {
185 .pmc_mask = AT91_PMC_PCK3,
186 .type = CLK_TYPE_PROGRAMMABLE,
190 static void __init at91rm9200_register_clocks(void)
194 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
195 clk_register(periph_clocks[i]);
203 /* --------------------------------------------------------------------
205 * -------------------------------------------------------------------- */
207 static struct at91_gpio_bank at91rm9200_gpio[] = {
209 .id = AT91RM9200_ID_PIOA,
213 .id = AT91RM9200_ID_PIOB,
217 .id = AT91RM9200_ID_PIOC,
221 .id = AT91RM9200_ID_PIOD,
227 static void at91rm9200_reset(void)
230 * Perform a hardware reset with the use of the Watchdog timer.
232 at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
233 at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
237 /* --------------------------------------------------------------------
238 * AT91RM9200 processor initialization
239 * -------------------------------------------------------------------- */
240 void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
242 /* Map peripherals */
243 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
245 at91_arch_reset = at91rm9200_reset;
246 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
247 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
248 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
249 | (1 << AT91RM9200_ID_IRQ6);
251 /* Init clock subsystem */
252 at91_clock_init(main_clock);
254 /* Register the processor-specific clocks */
255 at91rm9200_register_clocks();
257 /* Initialize GPIO subsystem */
258 at91_gpio_init(at91rm9200_gpio, banks);
262 /* --------------------------------------------------------------------
263 * Interrupt initialization
264 * -------------------------------------------------------------------- */
267 * The default interrupt priority levels (0 = lowest, 7 = highest).
269 static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
270 7, /* Advanced Interrupt Controller (FIQ) */
271 7, /* System Peripherals */
272 0, /* Parallel IO Controller A */
273 0, /* Parallel IO Controller B */
274 0, /* Parallel IO Controller C */
275 0, /* Parallel IO Controller D */
280 0, /* Multimedia Card Interface */
281 4, /* USB Device Port */
282 0, /* Two-Wire Interface */
283 6, /* Serial Peripheral Interface */
284 5, /* Serial Synchronous Controller 0 */
285 5, /* Serial Synchronous Controller 1 */
286 5, /* Serial Synchronous Controller 2 */
287 0, /* Timer Counter 0 */
288 0, /* Timer Counter 1 */
289 0, /* Timer Counter 2 */
290 0, /* Timer Counter 3 */
291 0, /* Timer Counter 4 */
292 0, /* Timer Counter 5 */
293 3, /* USB Host port */
294 3, /* Ethernet MAC */
295 0, /* Advanced Interrupt Controller (IRQ0) */
296 0, /* Advanced Interrupt Controller (IRQ1) */
297 0, /* Advanced Interrupt Controller (IRQ2) */
298 0, /* Advanced Interrupt Controller (IRQ3) */
299 0, /* Advanced Interrupt Controller (IRQ4) */
300 0, /* Advanced Interrupt Controller (IRQ5) */
301 0 /* Advanced Interrupt Controller (IRQ6) */
304 void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
307 priority = at91rm9200_default_irq_priority;
309 /* Initialize the AIC interrupt controller */
310 at91_aic_init(priority);
312 /* Enable GPIO interrupts */
313 at91_gpio_irq_setup();