err.no Git - linux-2.6/blob - arch/arm/mach-at91/at91cap9_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91cap9_devices.c
   3  *
   4  *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
   5  *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
   6  *  Copyright (C) 2007 Atmel Corporation.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  */
  14 #include <asm/mach/arch.h>
  15 #include <asm/mach/map.h>
  16
  17 #include <linux/dma-mapping.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/i2c-gpio.h>
  20
  21 #include <video/atmel_lcdc.h>
  22
  23 #include <asm/arch/board.h>
  24 #include <asm/arch/gpio.h>
  25 #include <asm/arch/at91cap9.h>
  26 #include <asm/arch/at91cap9_matrix.h>
  27 #include <asm/arch/at91sam9_smc.h>
  28
  29 #include "generic.h"
  30
  31
  32 /* --------------------------------------------------------------------
  33  *  USB Host
  34  * -------------------------------------------------------------------- */
  35
  36 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  37 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  38 static struct at91_usbh_data usbh_data;
  39
  40 static struct resource usbh_resources[] = {
  41         [0] = {
  42                 .start  = AT91CAP9_UHP_BASE,
  43                 .end    = AT91CAP9_UHP_BASE + SZ_1M - 1,
  44                 .flags  = IORESOURCE_MEM,
  45         },
  46         [1] = {
  47                 .start  = AT91CAP9_ID_UHP,
  48                 .end    = AT91CAP9_ID_UHP,
  49                 .flags  = IORESOURCE_IRQ,
  50         },
  51 };
  52
  53 static struct platform_device at91_usbh_device = {
  54         .name           = "at91_ohci",
  55         .id             = -1,
  56         .dev            = {
  57                                 .dma_mask               = &ohci_dmamask,
  58                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  59                                 .platform_data          = &usbh_data,
  60         },
  61         .resource       = usbh_resources,
  62         .num_resources  = ARRAY_SIZE(usbh_resources),
  63 };
  64
  65 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  66 {
  67         int i;
  68
  69         if (!data)
  70                 return;
  71
  72         /* Enable VBus control for UHP ports */
  73         for (i = 0; i < data->ports; i++) {
  74                 if (data->vbus_pin[i])
  75                         at91_set_gpio_output(data->vbus_pin[i], 0);
  76         }
  77
  78         usbh_data = *data;
  79         platform_device_register(&at91_usbh_device);
  80 }
  81 #else
  82 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  83 #endif
  84
  85
  86 /* --------------------------------------------------------------------
  87  *  Ethernet
  88  * -------------------------------------------------------------------- */
  89
  90 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
  91 static u64 eth_dmamask = DMA_BIT_MASK(32);
  92 static struct at91_eth_data eth_data;
  93
  94 static struct resource eth_resources[] = {
  95         [0] = {
  96                 .start  = AT91CAP9_BASE_EMAC,
  97                 .end    = AT91CAP9_BASE_EMAC + SZ_16K - 1,
  98                 .flags  = IORESOURCE_MEM,
  99         },
 100         [1] = {
 101                 .start  = AT91CAP9_ID_EMAC,
 102                 .end    = AT91CAP9_ID_EMAC,
 103                 .flags  = IORESOURCE_IRQ,
 104         },
 105 };
 106
 107 static struct platform_device at91cap9_eth_device = {
 108         .name           = "macb",
 109         .id             = -1,
 110         .dev            = {
 111                                 .dma_mask               = &eth_dmamask,
 112                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 113                                 .platform_data          = &eth_data,
 114         },
 115         .resource       = eth_resources,
 116         .num_resources  = ARRAY_SIZE(eth_resources),
 117 };
 118
 119 void __init at91_add_device_eth(struct at91_eth_data *data)
 120 {
 121         if (!data)
 122                 return;
 123
 124         if (data->phy_irq_pin) {
 125                 at91_set_gpio_input(data->phy_irq_pin, 0);
 126                 at91_set_deglitch(data->phy_irq_pin, 1);
 127         }
 128
 129         /* Pins used for MII and RMII */
 130         at91_set_A_periph(AT91_PIN_PB21, 0);    /* ETXCK_EREFCK */
 131         at91_set_A_periph(AT91_PIN_PB22, 0);    /* ERXDV */
 132         at91_set_A_periph(AT91_PIN_PB25, 0);    /* ERX0 */
 133         at91_set_A_periph(AT91_PIN_PB26, 0);    /* ERX1 */
 134         at91_set_A_periph(AT91_PIN_PB27, 0);    /* ERXER */
 135         at91_set_A_periph(AT91_PIN_PB28, 0);    /* ETXEN */
 136         at91_set_A_periph(AT91_PIN_PB23, 0);    /* ETX0 */
 137         at91_set_A_periph(AT91_PIN_PB24, 0);    /* ETX1 */
 138         at91_set_A_periph(AT91_PIN_PB30, 0);    /* EMDIO */
 139         at91_set_A_periph(AT91_PIN_PB29, 0);    /* EMDC */
 140
 141         if (!data->is_rmii) {
 142                 at91_set_B_periph(AT91_PIN_PC25, 0);    /* ECRS */
 143                 at91_set_B_periph(AT91_PIN_PC26, 0);    /* ECOL */
 144                 at91_set_B_periph(AT91_PIN_PC22, 0);    /* ERX2 */
 145                 at91_set_B_periph(AT91_PIN_PC23, 0);    /* ERX3 */
 146                 at91_set_B_periph(AT91_PIN_PC27, 0);    /* ERXCK */
 147                 at91_set_B_periph(AT91_PIN_PC20, 0);    /* ETX2 */
 148                 at91_set_B_periph(AT91_PIN_PC21, 0);    /* ETX3 */
 149                 at91_set_B_periph(AT91_PIN_PC24, 0);    /* ETXER */
 150         }
 151
 152         eth_data = *data;
 153         platform_device_register(&at91cap9_eth_device);
 154 }
 155 #else
 156 void __init at91_add_device_eth(struct at91_eth_data *data) {}
 157 #endif
 158
 159
 160 /* --------------------------------------------------------------------
 161  *  MMC / SD
 162  * -------------------------------------------------------------------- */
 163
 164 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 165 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 166 static struct at91_mmc_data mmc0_data, mmc1_data;
 167
 168 static struct resource mmc0_resources[] = {
 169         [0] = {
 170                 .start  = AT91CAP9_BASE_MCI0,
 171                 .end    = AT91CAP9_BASE_MCI0 + SZ_16K - 1,
 172                 .flags  = IORESOURCE_MEM,
 173         },
 174         [1] = {
 175                 .start  = AT91CAP9_ID_MCI0,
 176                 .end    = AT91CAP9_ID_MCI0,
 177                 .flags  = IORESOURCE_IRQ,
 178         },
 179 };
 180
 181 static struct platform_device at91cap9_mmc0_device = {
 182         .name           = "at91_mci",
 183         .id             = 0,
 184         .dev            = {
 185                                 .dma_mask               = &mmc_dmamask,
 186                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 187                                 .platform_data          = &mmc0_data,
 188         },
 189         .resource       = mmc0_resources,
 190         .num_resources  = ARRAY_SIZE(mmc0_resources),
 191 };
 192
 193 static struct resource mmc1_resources[] = {
 194         [0] = {
 195                 .start  = AT91CAP9_BASE_MCI1,
 196                 .end    = AT91CAP9_BASE_MCI1 + SZ_16K - 1,
 197                 .flags  = IORESOURCE_MEM,
 198         },
 199         [1] = {
 200                 .start  = AT91CAP9_ID_MCI1,
 201                 .end    = AT91CAP9_ID_MCI1,
 202                 .flags  = IORESOURCE_IRQ,
 203         },
 204 };
 205
 206 static struct platform_device at91cap9_mmc1_device = {
 207         .name           = "at91_mci",
 208         .id             = 1,
 209         .dev            = {
 210                                 .dma_mask               = &mmc_dmamask,
 211                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 212                                 .platform_data          = &mmc1_data,
 213         },
 214         .resource       = mmc1_resources,
 215         .num_resources  = ARRAY_SIZE(mmc1_resources),
 216 };
 217
 218 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 219 {
 220         if (!data)
 221                 return;
 222
 223         /* input/irq */
 224         if (data->det_pin) {
 225                 at91_set_gpio_input(data->det_pin, 1);
 226                 at91_set_deglitch(data->det_pin, 1);
 227         }
 228         if (data->wp_pin)
 229                 at91_set_gpio_input(data->wp_pin, 1);
 230         if (data->vcc_pin)
 231                 at91_set_gpio_output(data->vcc_pin, 0);
 232
 233         if (mmc_id == 0) {              /* MCI0 */
 234                 /* CLK */
 235                 at91_set_A_periph(AT91_PIN_PA2, 0);
 236
 237                 /* CMD */
 238                 at91_set_A_periph(AT91_PIN_PA1, 1);
 239
 240                 /* DAT0, maybe DAT1..DAT3 */
 241                 at91_set_A_periph(AT91_PIN_PA0, 1);
 242                 if (data->wire4) {
 243                         at91_set_A_periph(AT91_PIN_PA3, 1);
 244                         at91_set_A_periph(AT91_PIN_PA4, 1);
 245                         at91_set_A_periph(AT91_PIN_PA5, 1);
 246                 }
 247
 248                 mmc0_data = *data;
 249                 at91_clock_associate("mci0_clk", &at91cap9_mmc1_device.dev, "mci_clk");
 250                 platform_device_register(&at91cap9_mmc0_device);
 251         } else {                        /* MCI1 */
 252                 /* CLK */
 253                 at91_set_A_periph(AT91_PIN_PA16, 0);
 254
 255                 /* CMD */
 256                 at91_set_A_periph(AT91_PIN_PA17, 1);
 257
 258                 /* DAT0, maybe DAT1..DAT3 */
 259                 at91_set_A_periph(AT91_PIN_PA18, 1);
 260                 if (data->wire4) {
 261                         at91_set_A_periph(AT91_PIN_PA19, 1);
 262                         at91_set_A_periph(AT91_PIN_PA20, 1);
 263                         at91_set_A_periph(AT91_PIN_PA21, 1);
 264                 }
 265
 266                 mmc1_data = *data;
 267                 at91_clock_associate("mci1_clk", &at91cap9_mmc1_device.dev, "mci_clk");
 268                 platform_device_register(&at91cap9_mmc1_device);
 269         }
 270 }
 271 #else
 272 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 273 #endif
 274
 275
 276 /* --------------------------------------------------------------------
 277  *  NAND / SmartMedia
 278  * -------------------------------------------------------------------- */
 279
 280 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
 281 static struct at91_nand_data nand_data;
 282
 283 #define NAND_BASE       AT91_CHIPSELECT_3
 284
 285 static struct resource nand_resources[] = {
 286         [0] = {
 287                 .start  = NAND_BASE,
 288                 .end    = NAND_BASE + SZ_256M - 1,
 289                 .flags  = IORESOURCE_MEM,
 290         },
 291         [1] = {
 292                 .start  = AT91_BASE_SYS + AT91_ECC,
 293                 .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
 294                 .flags  = IORESOURCE_MEM,
 295         }
 296 };
 297
 298 static struct platform_device at91cap9_nand_device = {
 299         .name           = "at91_nand",
 300         .id             = -1,
 301         .dev            = {
 302                                 .platform_data  = &nand_data,
 303         },
 304         .resource       = nand_resources,
 305         .num_resources  = ARRAY_SIZE(nand_resources),
 306 };
 307
 308 void __init at91_add_device_nand(struct at91_nand_data *data)
 309 {
 310         unsigned long csa, mode;
 311
 312         if (!data)
 313                 return;
 314
 315         csa = at91_sys_read(AT91_MATRIX_EBICSA);
 316         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
 317
 318         /* set the bus interface characteristics */
 319         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1)
 320                         | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1));
 321
 322         at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6)
 323                         | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6));
 324
 325         at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8));
 326
 327         if (data->bus_width_16)
 328                 mode = AT91_SMC_DBW_16;
 329         else
 330                 mode = AT91_SMC_DBW_8;
 331         at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
 332
 333         /* enable pin */
 334         if (data->enable_pin)
 335                 at91_set_gpio_output(data->enable_pin, 1);
 336
 337         /* ready/busy pin */
 338         if (data->rdy_pin)
 339                 at91_set_gpio_input(data->rdy_pin, 1);
 340
 341         /* card detect pin */
 342         if (data->det_pin)
 343                 at91_set_gpio_input(data->det_pin, 1);
 344
 345         nand_data = *data;
 346         platform_device_register(&at91cap9_nand_device);
 347 }
 348 #else
 349 void __init at91_add_device_nand(struct at91_nand_data *data) {}
 350 #endif
 351
 352
 353 /* --------------------------------------------------------------------
 354  *  TWI (i2c)
 355  * -------------------------------------------------------------------- */
 356
 357 /*
 358  * Prefer the GPIO code since the TWI controller isn't robust
 359  * (gets overruns and underruns under load) and can only issue
 360  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 361  */
 362 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 363
 364 static struct i2c_gpio_platform_data pdata = {
 365         .sda_pin                = AT91_PIN_PB4,
 366         .sda_is_open_drain      = 1,
 367         .scl_pin                = AT91_PIN_PB5,
 368         .scl_is_open_drain      = 1,
 369         .udelay                 = 2,            /* ~100 kHz */
 370 };
 371
 372 static struct platform_device at91cap9_twi_device = {
 373         .name                   = "i2c-gpio",
 374         .id                     = -1,
 375         .dev.platform_data      = &pdata,
 376 };
 377
 378 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 379 {
 380         at91_set_GPIO_periph(AT91_PIN_PB4, 1);          /* TWD (SDA) */
 381         at91_set_multi_drive(AT91_PIN_PB4, 1);
 382
 383         at91_set_GPIO_periph(AT91_PIN_PB5, 1);          /* TWCK (SCL) */
 384         at91_set_multi_drive(AT91_PIN_PB5, 1);
 385
 386         i2c_register_board_info(0, devices, nr_devices);
 387         platform_device_register(&at91cap9_twi_device);
 388 }
 389
 390 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 391
 392 static struct resource twi_resources[] = {
 393         [0] = {
 394                 .start  = AT91CAP9_BASE_TWI,
 395                 .end    = AT91CAP9_BASE_TWI + SZ_16K - 1,
 396                 .flags  = IORESOURCE_MEM,
 397         },
 398         [1] = {
 399                 .start  = AT91CAP9_ID_TWI,
 400                 .end    = AT91CAP9_ID_TWI,
 401                 .flags  = IORESOURCE_IRQ,
 402         },
 403 };
 404
 405 static struct platform_device at91cap9_twi_device = {
 406         .name           = "at91_i2c",
 407         .id             = -1,
 408         .resource       = twi_resources,
 409         .num_resources  = ARRAY_SIZE(twi_resources),
 410 };
 411
 412 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 413 {
 414         /* pins used for TWI interface */
 415         at91_set_B_periph(AT91_PIN_PB4, 0);             /* TWD */
 416         at91_set_multi_drive(AT91_PIN_PB4, 1);
 417
 418         at91_set_B_periph(AT91_PIN_PB5, 0);             /* TWCK */
 419         at91_set_multi_drive(AT91_PIN_PB5, 1);
 420
 421         i2c_register_board_info(0, devices, nr_devices);
 422         platform_device_register(&at91cap9_twi_device);
 423 }
 424 #else
 425 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 426 #endif
 427
 428 /* --------------------------------------------------------------------
 429  *  SPI
 430  * -------------------------------------------------------------------- */
 431
 432 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 433 static u64 spi_dmamask = DMA_BIT_MASK(32);
 434
 435 static struct resource spi0_resources[] = {
 436         [0] = {
 437                 .start  = AT91CAP9_BASE_SPI0,
 438                 .end    = AT91CAP9_BASE_SPI0 + SZ_16K - 1,
 439                 .flags  = IORESOURCE_MEM,
 440         },
 441         [1] = {
 442                 .start  = AT91CAP9_ID_SPI0,
 443                 .end    = AT91CAP9_ID_SPI0,
 444                 .flags  = IORESOURCE_IRQ,
 445         },
 446 };
 447
 448 static struct platform_device at91cap9_spi0_device = {
 449         .name           = "atmel_spi",
 450         .id             = 0,
 451         .dev            = {
 452                                 .dma_mask               = &spi_dmamask,
 453                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 454         },
 455         .resource       = spi0_resources,
 456         .num_resources  = ARRAY_SIZE(spi0_resources),
 457 };
 458
 459 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 };
 460
 461 static struct resource spi1_resources[] = {
 462         [0] = {
 463                 .start  = AT91CAP9_BASE_SPI1,
 464                 .end    = AT91CAP9_BASE_SPI1 + SZ_16K - 1,
 465                 .flags  = IORESOURCE_MEM,
 466         },
 467         [1] = {
 468                 .start  = AT91CAP9_ID_SPI1,
 469                 .end    = AT91CAP9_ID_SPI1,
 470                 .flags  = IORESOURCE_IRQ,
 471         },
 472 };
 473
 474 static struct platform_device at91cap9_spi1_device = {
 475         .name           = "atmel_spi",
 476         .id             = 1,
 477         .dev            = {
 478                                 .dma_mask               = &spi_dmamask,
 479                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 480         },
 481         .resource       = spi1_resources,
 482         .num_resources  = ARRAY_SIZE(spi1_resources),
 483 };
 484
 485 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
 486
 487 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 488 {
 489         int i;
 490         unsigned long cs_pin;
 491         short enable_spi0 = 0;
 492         short enable_spi1 = 0;
 493
 494         /* Choose SPI chip-selects */
 495         for (i = 0; i < nr_devices; i++) {
 496                 if (devices[i].controller_data)
 497                         cs_pin = (unsigned long) devices[i].controller_data;
 498                 else if (devices[i].bus_num == 0)
 499                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 500                 else
 501                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 502
 503                 if (devices[i].bus_num == 0)
 504                         enable_spi0 = 1;
 505                 else
 506                         enable_spi1 = 1;
 507
 508                 /* enable chip-select pin */
 509                 at91_set_gpio_output(cs_pin, 1);
 510
 511                 /* pass chip-select pin to driver */
 512                 devices[i].controller_data = (void *) cs_pin;
 513         }
 514
 515         spi_register_board_info(devices, nr_devices);
 516
 517         /* Configure SPI bus(es) */
 518         if (enable_spi0) {
 519                 at91_set_B_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 520                 at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 521                 at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 522
 523                 at91_clock_associate("spi0_clk", &at91cap9_spi0_device.dev, "spi_clk");
 524                 platform_device_register(&at91cap9_spi0_device);
 525         }
 526         if (enable_spi1) {
 527                 at91_set_A_periph(AT91_PIN_PB12, 0);    /* SPI1_MISO */
 528                 at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
 529                 at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
 530
 531                 at91_clock_associate("spi1_clk", &at91cap9_spi1_device.dev, "spi_clk");
 532                 platform_device_register(&at91cap9_spi1_device);
 533         }
 534 }
 535 #else
 536 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 537 #endif
 538
 539
 540 /* --------------------------------------------------------------------
 541  *  Timer/Counter block
 542  * -------------------------------------------------------------------- */
 543
 544 #ifdef CONFIG_ATMEL_TCLIB
 545
 546 static struct resource tcb_resources[] = {
 547         [0] = {
 548                 .start  = AT91CAP9_BASE_TCB0,
 549                 .end    = AT91CAP9_BASE_TCB0 + SZ_16K - 1,
 550                 .flags  = IORESOURCE_MEM,
 551         },
 552         [1] = {
 553                 .start  = AT91CAP9_ID_TCB,
 554                 .end    = AT91CAP9_ID_TCB,
 555                 .flags  = IORESOURCE_IRQ,
 556         },
 557 };
 558
 559 static struct platform_device at91cap9_tcb_device = {
 560         .name           = "atmel_tcb",
 561         .id             = 0,
 562         .resource       = tcb_resources,
 563         .num_resources  = ARRAY_SIZE(tcb_resources),
 564 };
 565
 566 static void __init at91_add_device_tc(void)
 567 {
 568         /* this chip has one clock and irq for all three TC channels */
 569         at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk");
 570         platform_device_register(&at91cap9_tcb_device);
 571 }
 572 #else
 573 static void __init at91_add_device_tc(void) { }
 574 #endif
 575
 576
 577 /* --------------------------------------------------------------------
 578  *  RTT
 579  * -------------------------------------------------------------------- */
 580
 581 static struct resource rtt_resources[] = {
 582         {
 583                 .start  = AT91_BASE_SYS + AT91_RTT,
 584                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
 585                 .flags  = IORESOURCE_MEM,
 586         }
 587 };
 588
 589 static struct platform_device at91cap9_rtt_device = {
 590         .name           = "at91_rtt",
 591         .id             = 0,
 592         .resource       = rtt_resources,
 593         .num_resources  = ARRAY_SIZE(rtt_resources),
 594 };
 595
 596 static void __init at91_add_device_rtt(void)
 597 {
 598         platform_device_register(&at91cap9_rtt_device);
 599 }
 600
 601
 602 /* --------------------------------------------------------------------
 603  *  Watchdog
 604  * -------------------------------------------------------------------- */
 605
 606 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
 607 static struct platform_device at91cap9_wdt_device = {
 608         .name           = "at91_wdt",
 609         .id             = -1,
 610         .num_resources  = 0,
 611 };
 612
 613 static void __init at91_add_device_watchdog(void)
 614 {
 615         platform_device_register(&at91cap9_wdt_device);
 616 }
 617 #else
 618 static void __init at91_add_device_watchdog(void) {}
 619 #endif
 620
 621
 622 /* --------------------------------------------------------------------
 623  *  AC97
 624  * -------------------------------------------------------------------- */
 625
 626 #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
 627 static u64 ac97_dmamask = DMA_BIT_MASK(32);
 628 static struct atmel_ac97_data ac97_data;
 629
 630 static struct resource ac97_resources[] = {
 631         [0] = {
 632                 .start  = AT91CAP9_BASE_AC97C,
 633                 .end    = AT91CAP9_BASE_AC97C + SZ_16K - 1,
 634                 .flags  = IORESOURCE_MEM,
 635         },
 636         [1] = {
 637                 .start  = AT91CAP9_ID_AC97C,
 638                 .end    = AT91CAP9_ID_AC97C,
 639                 .flags  = IORESOURCE_IRQ,
 640         },
 641 };
 642
 643 static struct platform_device at91cap9_ac97_device = {
 644         .name           = "ac97c",
 645         .id             = 1,
 646         .dev            = {
 647                                 .dma_mask               = &ac97_dmamask,
 648                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 649                                 .platform_data          = &ac97_data,
 650         },
 651         .resource       = ac97_resources,
 652         .num_resources  = ARRAY_SIZE(ac97_resources),
 653 };
 654
 655 void __init at91_add_device_ac97(struct atmel_ac97_data *data)
 656 {
 657         if (!data)
 658                 return;
 659
 660         at91_set_A_periph(AT91_PIN_PA6, 0);     /* AC97FS */
 661         at91_set_A_periph(AT91_PIN_PA7, 0);     /* AC97CK */
 662         at91_set_A_periph(AT91_PIN_PA8, 0);     /* AC97TX */
 663         at91_set_A_periph(AT91_PIN_PA9, 0);     /* AC97RX */
 664
 665         /* reset */
 666         if (data->reset_pin)
 667                 at91_set_gpio_output(data->reset_pin, 0);
 668
 669         ac97_data = *data;
 670         platform_device_register(&at91cap9_ac97_device);
 671 }
 672 #else
 673 void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
 674 #endif
 675
 676
 677 /* --------------------------------------------------------------------
 678  *  LCD Controller
 679  * -------------------------------------------------------------------- */
 680
 681 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 682 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 683 static struct atmel_lcdfb_info lcdc_data;
 684
 685 static struct resource lcdc_resources[] = {
 686         [0] = {
 687                 .start  = AT91CAP9_LCDC_BASE,
 688                 .end    = AT91CAP9_LCDC_BASE + SZ_4K - 1,
 689                 .flags  = IORESOURCE_MEM,
 690         },
 691         [1] = {
 692                 .start  = AT91CAP9_ID_LCDC,
 693                 .end    = AT91CAP9_ID_LCDC,
 694                 .flags  = IORESOURCE_IRQ,
 695         },
 696 };
 697
 698 static struct platform_device at91_lcdc_device = {
 699         .name           = "atmel_lcdfb",
 700         .id             = 0,
 701         .dev            = {
 702                                 .dma_mask               = &lcdc_dmamask,
 703                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 704                                 .platform_data          = &lcdc_data,
 705         },
 706         .resource       = lcdc_resources,
 707         .num_resources  = ARRAY_SIZE(lcdc_resources),
 708 };
 709
 710 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 711 {
 712         if (!data)
 713                 return;
 714
 715         at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
 716         at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
 717         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
 718         at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
 719         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
 720         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
 721         at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
 722         at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
 723         at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
 724         at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
 725         at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
 726         at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 727         at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 728         at91_set_A_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
 729         at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 730         at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 731         at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
 732         at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
 733         at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
 734         at91_set_A_periph(AT91_PIN_PC25, 0);    /* LCDD21 */
 735         at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
 736         at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
 737
 738         lcdc_data = *data;
 739         platform_device_register(&at91_lcdc_device);
 740 }
 741 #else
 742 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 743 #endif
 744
 745
 746 /* --------------------------------------------------------------------
 747  *  SSC -- Synchronous Serial Controller
 748  * -------------------------------------------------------------------- */
 749
 750 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 751 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 752
 753 static struct resource ssc0_resources[] = {
 754         [0] = {
 755                 .start  = AT91CAP9_BASE_SSC0,
 756                 .end    = AT91CAP9_BASE_SSC0 + SZ_16K - 1,
 757                 .flags  = IORESOURCE_MEM,
 758         },
 759         [1] = {
 760                 .start  = AT91CAP9_ID_SSC0,
 761                 .end    = AT91CAP9_ID_SSC0,
 762                 .flags  = IORESOURCE_IRQ,
 763         },
 764 };
 765
 766 static struct platform_device at91cap9_ssc0_device = {
 767         .name   = "ssc",
 768         .id     = 0,
 769         .dev    = {
 770                 .dma_mask               = &ssc0_dmamask,
 771                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 772         },
 773         .resource       = ssc0_resources,
 774         .num_resources  = ARRAY_SIZE(ssc0_resources),
 775 };
 776
 777 static inline void configure_ssc0_pins(unsigned pins)
 778 {
 779         if (pins & ATMEL_SSC_TF)
 780                 at91_set_A_periph(AT91_PIN_PB0, 1);
 781         if (pins & ATMEL_SSC_TK)
 782                 at91_set_A_periph(AT91_PIN_PB1, 1);
 783         if (pins & ATMEL_SSC_TD)
 784                 at91_set_A_periph(AT91_PIN_PB2, 1);
 785         if (pins & ATMEL_SSC_RD)
 786                 at91_set_A_periph(AT91_PIN_PB3, 1);
 787         if (pins & ATMEL_SSC_RK)
 788                 at91_set_A_periph(AT91_PIN_PB4, 1);
 789         if (pins & ATMEL_SSC_RF)
 790                 at91_set_A_periph(AT91_PIN_PB5, 1);
 791 }
 792
 793 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 794
 795 static struct resource ssc1_resources[] = {
 796         [0] = {
 797                 .start  = AT91CAP9_BASE_SSC1,
 798                 .end    = AT91CAP9_BASE_SSC1 + SZ_16K - 1,
 799                 .flags  = IORESOURCE_MEM,
 800         },
 801         [1] = {
 802                 .start  = AT91CAP9_ID_SSC1,
 803                 .end    = AT91CAP9_ID_SSC1,
 804                 .flags  = IORESOURCE_IRQ,
 805         },
 806 };
 807
 808 static struct platform_device at91cap9_ssc1_device = {
 809         .name   = "ssc",
 810         .id     = 1,
 811         .dev    = {
 812                 .dma_mask               = &ssc1_dmamask,
 813                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 814         },
 815         .resource       = ssc1_resources,
 816         .num_resources  = ARRAY_SIZE(ssc1_resources),
 817 };
 818
 819 static inline void configure_ssc1_pins(unsigned pins)
 820 {
 821         if (pins & ATMEL_SSC_TF)
 822                 at91_set_A_periph(AT91_PIN_PB6, 1);
 823         if (pins & ATMEL_SSC_TK)
 824                 at91_set_A_periph(AT91_PIN_PB7, 1);
 825         if (pins & ATMEL_SSC_TD)
 826                 at91_set_A_periph(AT91_PIN_PB8, 1);
 827         if (pins & ATMEL_SSC_RD)
 828                 at91_set_A_periph(AT91_PIN_PB9, 1);
 829         if (pins & ATMEL_SSC_RK)
 830                 at91_set_A_periph(AT91_PIN_PB10, 1);
 831         if (pins & ATMEL_SSC_RF)
 832                 at91_set_A_periph(AT91_PIN_PB11, 1);
 833 }
 834
 835 /*
 836  * SSC controllers are accessed through library code, instead of any
 837  * kind of all-singing/all-dancing driver.  For example one could be
 838  * used by a particular I2S audio codec's driver, while another one
 839  * on the same system might be used by a custom data capture driver.
 840  */
 841 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 842 {
 843         struct platform_device *pdev;
 844
 845         /*
 846          * NOTE: caller is responsible for passing information matching
 847          * "pins" to whatever will be using each particular controller.
 848          */
 849         switch (id) {
 850         case AT91CAP9_ID_SSC0:
 851                 pdev = &at91cap9_ssc0_device;
 852                 configure_ssc0_pins(pins);
 853                 at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
 854                 break;
 855         case AT91CAP9_ID_SSC1:
 856                 pdev = &at91cap9_ssc1_device;
 857                 configure_ssc1_pins(pins);
 858                 at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
 859                 break;
 860         default:
 861                 return;
 862         }
 863
 864         platform_device_register(pdev);
 865 }
 866
 867 #else
 868 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 869 #endif
 870
 871
 872 /* --------------------------------------------------------------------
 873  *  UART
 874  * -------------------------------------------------------------------- */
 875
 876 #if defined(CONFIG_SERIAL_ATMEL)
 877 static struct resource dbgu_resources[] = {
 878         [0] = {
 879                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
 880                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
 881                 .flags  = IORESOURCE_MEM,
 882         },
 883         [1] = {
 884                 .start  = AT91_ID_SYS,
 885                 .end    = AT91_ID_SYS,
 886                 .flags  = IORESOURCE_IRQ,
 887         },
 888 };
 889
 890 static struct atmel_uart_data dbgu_data = {
 891         .use_dma_tx     = 0,
 892         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 893         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 894 };
 895
 896 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 897
 898 static struct platform_device at91cap9_dbgu_device = {
 899         .name           = "atmel_usart",
 900         .id             = 0,
 901         .dev            = {
 902                                 .dma_mask               = &dbgu_dmamask,
 903                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 904                                 .platform_data          = &dbgu_data,
 905         },
 906         .resource       = dbgu_resources,
 907         .num_resources  = ARRAY_SIZE(dbgu_resources),
 908 };
 909
 910 static inline void configure_dbgu_pins(void)
 911 {
 912         at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
 913         at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
 914 }
 915
 916 static struct resource uart0_resources[] = {
 917         [0] = {
 918                 .start  = AT91CAP9_BASE_US0,
 919                 .end    = AT91CAP9_BASE_US0 + SZ_16K - 1,
 920                 .flags  = IORESOURCE_MEM,
 921         },
 922         [1] = {
 923                 .start  = AT91CAP9_ID_US0,
 924                 .end    = AT91CAP9_ID_US0,
 925                 .flags  = IORESOURCE_IRQ,
 926         },
 927 };
 928
 929 static struct atmel_uart_data uart0_data = {
 930         .use_dma_tx     = 1,
 931         .use_dma_rx     = 1,
 932 };
 933
 934 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 935
 936 static struct platform_device at91cap9_uart0_device = {
 937         .name           = "atmel_usart",
 938         .id             = 1,
 939         .dev            = {
 940                                 .dma_mask               = &uart0_dmamask,
 941                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 942                                 .platform_data          = &uart0_data,
 943         },
 944         .resource       = uart0_resources,
 945         .num_resources  = ARRAY_SIZE(uart0_resources),
 946 };
 947
 948 static inline void configure_usart0_pins(unsigned pins)
 949 {
 950         at91_set_A_periph(AT91_PIN_PA22, 1);            /* TXD0 */
 951         at91_set_A_periph(AT91_PIN_PA23, 0);            /* RXD0 */
 952
 953         if (pins & ATMEL_UART_RTS)
 954                 at91_set_A_periph(AT91_PIN_PA24, 0);    /* RTS0 */
 955         if (pins & ATMEL_UART_CTS)
 956                 at91_set_A_periph(AT91_PIN_PA25, 0);    /* CTS0 */
 957 }
 958
 959 static struct resource uart1_resources[] = {
 960         [0] = {
 961                 .start  = AT91CAP9_BASE_US1,
 962                 .end    = AT91CAP9_BASE_US1 + SZ_16K - 1,
 963                 .flags  = IORESOURCE_MEM,
 964         },
 965         [1] = {
 966                 .start  = AT91CAP9_ID_US1,
 967                 .end    = AT91CAP9_ID_US1,
 968                 .flags  = IORESOURCE_IRQ,
 969         },
 970 };
 971
 972 static struct atmel_uart_data uart1_data = {
 973         .use_dma_tx     = 1,
 974         .use_dma_rx     = 1,
 975 };
 976
 977 static u64 uart1_dmamask = DMA_BIT_MASK(32);
 978
 979 static struct platform_device at91cap9_uart1_device = {
 980         .name           = "atmel_usart",
 981         .id             = 2,
 982         .dev            = {
 983                                 .dma_mask               = &uart1_dmamask,
 984                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 985                                 .platform_data          = &uart1_data,
 986         },
 987         .resource       = uart1_resources,
 988         .num_resources  = ARRAY_SIZE(uart1_resources),
 989 };
 990
 991 static inline void configure_usart1_pins(unsigned pins)
 992 {
 993         at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
 994         at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
 995
 996         if (pins & ATMEL_UART_RTS)
 997                 at91_set_B_periph(AT91_PIN_PD7, 0);     /* RTS1 */
 998         if (pins & ATMEL_UART_CTS)
 999                 at91_set_B_periph(AT91_PIN_PD8, 0);     /* CTS1 */
1000 }
1001
1002 static struct resource uart2_resources[] = {
1003         [0] = {
1004                 .start  = AT91CAP9_BASE_US2,
1005                 .end    = AT91CAP9_BASE_US2 + SZ_16K - 1,
1006                 .flags  = IORESOURCE_MEM,
1007         },
1008         [1] = {
1009                 .start  = AT91CAP9_ID_US2,
1010                 .end    = AT91CAP9_ID_US2,
1011                 .flags  = IORESOURCE_IRQ,
1012         },
1013 };
1014
1015 static struct atmel_uart_data uart2_data = {
1016         .use_dma_tx     = 1,
1017         .use_dma_rx     = 1,
1018 };
1019
1020 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1021
1022 static struct platform_device at91cap9_uart2_device = {
1023         .name           = "atmel_usart",
1024         .id             = 3,
1025         .dev            = {
1026                                 .dma_mask               = &uart2_dmamask,
1027                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1028                                 .platform_data          = &uart2_data,
1029         },
1030         .resource       = uart2_resources,
1031         .num_resources  = ARRAY_SIZE(uart2_resources),
1032 };
1033
1034 static inline void configure_usart2_pins(unsigned pins)
1035 {
1036         at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
1037         at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
1038
1039         if (pins & ATMEL_UART_RTS)
1040                 at91_set_B_periph(AT91_PIN_PD5, 0);     /* RTS2 */
1041         if (pins & ATMEL_UART_CTS)
1042                 at91_set_B_periph(AT91_PIN_PD6, 0);     /* CTS2 */
1043 }
1044
1045 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1046 struct platform_device *atmel_default_console_device;   /* the serial console device */
1047
1048 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1049 {
1050         struct platform_device *pdev;
1051
1052         switch (id) {
1053                 case 0:         /* DBGU */
1054                         pdev = &at91cap9_dbgu_device;
1055                         configure_dbgu_pins();
1056                         at91_clock_associate("mck", &pdev->dev, "usart");
1057                         break;
1058                 case AT91CAP9_ID_US0:
1059                         pdev = &at91cap9_uart0_device;
1060                         configure_usart0_pins(pins);
1061                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1062                         break;
1063                 case AT91CAP9_ID_US1:
1064                         pdev = &at91cap9_uart1_device;
1065                         configure_usart1_pins(pins);
1066                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1067                         break;
1068                 case AT91CAP9_ID_US2:
1069                         pdev = &at91cap9_uart2_device;
1070                         configure_usart2_pins(pins);
1071                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1072                         break;
1073                 default:
1074                         return;
1075         }
1076         pdev->id = portnr;              /* update to mapped ID */
1077
1078         if (portnr < ATMEL_MAX_UART)
1079                 at91_uarts[portnr] = pdev;
1080 }
1081
1082 void __init at91_set_serial_console(unsigned portnr)
1083 {
1084         if (portnr < ATMEL_MAX_UART)
1085                 atmel_default_console_device = at91_uarts[portnr];
1086 }
1087
1088 void __init at91_add_device_serial(void)
1089 {
1090         int i;
1091
1092         for (i = 0; i < ATMEL_MAX_UART; i++) {
1093                 if (at91_uarts[i])
1094                         platform_device_register(at91_uarts[i]);
1095         }
1096
1097         if (!atmel_default_console_device)
1098                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1099 }
1100 #else
1101 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1102 void __init at91_set_serial_console(unsigned portnr) {}
1103 void __init at91_add_device_serial(void) {}
1104 #endif
1105
1106
1107 /* -------------------------------------------------------------------- */
1108 /*
1109  * These devices are always present and don't need any board-specific
1110  * setup.
1111  */
1112 static int __init at91_add_standard_devices(void)
1113 {
1114         at91_add_device_rtt();
1115         at91_add_device_watchdog();
1116         at91_add_device_tc();
1117         return 0;
1118 }
1119
1120 arch_initcall(at91_add_standard_devices);