2 * linux/arch/arm/kernel/dma-isa.c
4 * Copyright (C) 1999-2000 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 * Taken from various sources, including:
12 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
13 * Written by Hennus Bergman, 1992.
14 * High DMA channel support & info by Hannu Savolainen and John Boyd,
16 * arch/arm/kernel/dma-ebsa285.c
17 * Copyright (C) 1998 Phil Blundell
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/pci.h>
26 #include <asm/mach/dma.h>
28 #define ISA_DMA_MODE_READ 0x44
29 #define ISA_DMA_MODE_WRITE 0x48
30 #define ISA_DMA_MODE_CASCADE 0xc0
31 #define ISA_DMA_AUTOINIT 0x10
33 #define ISA_DMA_MASK 0
34 #define ISA_DMA_MODE 1
35 #define ISA_DMA_CLRFF 2
36 #define ISA_DMA_PGHI 3
37 #define ISA_DMA_PGLO 4
38 #define ISA_DMA_ADDR 5
39 #define ISA_DMA_COUNT 6
41 static unsigned int isa_dma_port[8][7] = {
42 /* MASK MODE CLRFF PAGE_HI PAGE_LO ADDR COUNT */
43 { 0x0a, 0x0b, 0x0c, 0x487, 0x087, 0x00, 0x01 },
44 { 0x0a, 0x0b, 0x0c, 0x483, 0x083, 0x02, 0x03 },
45 { 0x0a, 0x0b, 0x0c, 0x481, 0x081, 0x04, 0x05 },
46 { 0x0a, 0x0b, 0x0c, 0x482, 0x082, 0x06, 0x07 },
47 { 0xd4, 0xd6, 0xd8, 0x000, 0x000, 0xc0, 0xc2 },
48 { 0xd4, 0xd6, 0xd8, 0x48b, 0x08b, 0xc4, 0xc6 },
49 { 0xd4, 0xd6, 0xd8, 0x489, 0x089, 0xc8, 0xca },
50 { 0xd4, 0xd6, 0xd8, 0x48a, 0x08a, 0xcc, 0xce }
53 static int isa_get_dma_residue(dmach_t channel, dma_t *dma)
55 unsigned int io_port = isa_dma_port[channel][ISA_DMA_COUNT];
58 count = 1 + inb(io_port);
59 count |= inb(io_port) << 8;
61 return channel < 4 ? count : (count << 1);
64 static void isa_enable_dma(dmach_t channel, dma_t *dma)
67 unsigned long address, length;
68 unsigned int mode, direction;
71 switch (dma->dma_mode & DMA_MODE_MASK) {
73 mode |= ISA_DMA_MODE_READ;
74 direction = PCI_DMA_FROMDEVICE;
78 mode |= ISA_DMA_MODE_WRITE;
79 direction = PCI_DMA_TODEVICE;
82 case DMA_MODE_CASCADE:
83 mode |= ISA_DMA_MODE_CASCADE;
84 direction = PCI_DMA_BIDIRECTIONAL;
88 direction = PCI_DMA_NONE;
94 * Cope with ISA-style drivers which expect cache
97 dma->buf.dma_address = pci_map_single(NULL,
98 dma->buf.__address, dma->buf.length,
102 address = dma->buf.dma_address;
103 length = dma->buf.length - 1;
105 outb(address >> 16, isa_dma_port[channel][ISA_DMA_PGLO]);
106 outb(address >> 24, isa_dma_port[channel][ISA_DMA_PGHI]);
113 outb(0, isa_dma_port[channel][ISA_DMA_CLRFF]);
115 outb(address, isa_dma_port[channel][ISA_DMA_ADDR]);
116 outb(address >> 8, isa_dma_port[channel][ISA_DMA_ADDR]);
118 outb(length, isa_dma_port[channel][ISA_DMA_COUNT]);
119 outb(length >> 8, isa_dma_port[channel][ISA_DMA_COUNT]);
121 if (dma->dma_mode & DMA_AUTOINIT)
122 mode |= ISA_DMA_AUTOINIT;
124 outb(mode, isa_dma_port[channel][ISA_DMA_MODE]);
127 outb(channel & 3, isa_dma_port[channel][ISA_DMA_MASK]);
130 static void isa_disable_dma(dmach_t channel, dma_t *dma)
132 outb(channel | 4, isa_dma_port[channel][ISA_DMA_MASK]);
135 static struct dma_ops isa_dma_ops = {
137 .enable = isa_enable_dma,
138 .disable = isa_disable_dma,
139 .residue = isa_get_dma_residue,
142 static struct resource dma_resources[] = {
143 { "dma1", 0x0000, 0x000f },
144 { "dma low page", 0x0080, 0x008f },
145 { "dma2", 0x00c0, 0x00df },
146 { "dma high page", 0x0480, 0x048f }
149 void __init isa_init_dma(dma_t *dma)
152 * Try to autodetect presence of an ISA DMA controller.
153 * We do some minimal initialisation, and check that
154 * channel 0's DMA address registers are writeable.
160 * Write high and low address, and then read them back
166 if (inb(0) == 0x55 && inb(0) == 0xaa) {
169 for (channel = 0; channel < 8; channel++) {
170 dma[channel].d_ops = &isa_dma_ops;
171 isa_disable_dma(channel, NULL);
190 * Is this correct? According to my documentation, it
191 * doesn't appear to be. It should be:
192 * outb(0x3f, 0x40b); outb(0x3f, 0x4d6);
202 request_dma(DMA_ISA_CASCADE, "cascade");
204 for (i = 0; i < sizeof(dma_resources) / sizeof(dma_resources[0]); i++)
205 request_resource(&ioport_resource, dma_resources + i);