2 * Alpha specific irq code.
5 #include <linux/init.h>
6 #include <linux/sched.h>
8 #include <linux/kernel_stat.h>
10 #include <asm/machvec.h>
16 /* Hack minimum IPL during interrupt processing for broken hardware. */
17 #ifdef CONFIG_ALPHA_BROKEN_IRQ_MASK
22 * Performance counter hook. A module can override this to
23 * do something useful.
26 dummy_perf(unsigned long vector, struct pt_regs *regs)
29 printk(KERN_CRIT "Performance counter interrupt!\n");
32 void (*perf_irq)(unsigned long, struct pt_regs *) = dummy_perf;
35 * The main interrupt entry point.
39 do_entInt(unsigned long type, unsigned long vector,
40 unsigned long la_ptr, struct pt_regs *regs)
42 struct pt_regs *old_regs;
50 printk(KERN_CRIT "Interprocessor interrupt? "
51 "You must be kidding!\n");
55 old_regs = set_irq_regs(regs);
61 smp_percpu_timer_interrupt(regs);
62 cpu = smp_processor_id();
63 if (cpu != boot_cpuid) {
64 kstat_cpu(cpu).irqs[RTC_IRQ]++;
72 set_irq_regs(old_regs);
75 old_regs = set_irq_regs(regs);
76 alpha_mv.machine_check(vector, la_ptr);
77 set_irq_regs(old_regs);
80 old_regs = set_irq_regs(regs);
81 alpha_mv.device_interrupt(vector);
82 set_irq_regs(old_regs);
85 perf_irq(la_ptr, regs);
88 printk(KERN_CRIT "Hardware intr %ld %lx? Huh?\n",
91 printk(KERN_CRIT "PC = %016lx PS=%04lx\n", regs->pc, regs->ps);
95 common_init_isa_dma(void)
97 outb(0, DMA1_RESET_REG);
98 outb(0, DMA2_RESET_REG);
99 outb(0, DMA1_CLR_MASK_REG);
100 outb(0, DMA2_CLR_MASK_REG);
106 /* Just in case the platform init_irq() causes interrupts/mchecks
107 (as is the case with RAWHIDE, at least). */
114 * machine error checks
116 #define MCHK_K_TPERR 0x0080
117 #define MCHK_K_TCPERR 0x0082
118 #define MCHK_K_HERR 0x0084
119 #define MCHK_K_ECC_C 0x0086
120 #define MCHK_K_ECC_NC 0x0088
121 #define MCHK_K_OS_BUGCHECK 0x008A
122 #define MCHK_K_PAL_BUGCHECK 0x0090
125 struct mcheck_info __mcheck_info;
129 process_mcheck_info(unsigned long vector, unsigned long la_ptr,
130 const char *machine, int expected)
132 struct el_common *mchk_header;
136 * See if the machine check is due to a badaddr() and if so,
140 #ifdef CONFIG_VERBOSE_MCHECK
141 if (alpha_verbose_mcheck > 1) {
142 printk(KERN_CRIT "%s machine check %s\n", machine,
143 expected ? "expected." : "NOT expected!!!");
148 int cpu = smp_processor_id();
149 mcheck_expected(cpu) = 0;
150 mcheck_taken(cpu) = 1;
154 mchk_header = (struct el_common *)la_ptr;
156 printk(KERN_CRIT "%s machine check: vector=0x%lx pc=0x%lx code=0x%x\n",
157 machine, vector, get_irq_regs()->pc, mchk_header->code);
159 switch (mchk_header->code) {
160 /* Machine check reasons. Defined according to PALcode sources. */
161 case 0x80: reason = "tag parity error"; break;
162 case 0x82: reason = "tag control parity error"; break;
163 case 0x84: reason = "generic hard error"; break;
164 case 0x86: reason = "correctable ECC error"; break;
165 case 0x88: reason = "uncorrectable ECC error"; break;
166 case 0x8A: reason = "OS-specific PAL bugcheck"; break;
167 case 0x90: reason = "callsys in kernel mode"; break;
168 case 0x96: reason = "i-cache read retryable error"; break;
169 case 0x98: reason = "processor detected hard error"; break;
171 /* System specific (these are for Alcor, at least): */
172 case 0x202: reason = "system detected hard error"; break;
173 case 0x203: reason = "system detected uncorrectable ECC error"; break;
174 case 0x204: reason = "SIO SERR occurred on PCI bus"; break;
175 case 0x205: reason = "parity error detected by core logic"; break;
176 case 0x206: reason = "SIO IOCHK occurred on ISA bus"; break;
177 case 0x207: reason = "non-existent memory error"; break;
178 case 0x208: reason = "MCHK_K_DCSR"; break;
179 case 0x209: reason = "PCI SERR detected"; break;
180 case 0x20b: reason = "PCI data parity error detected"; break;
181 case 0x20d: reason = "PCI address parity error detected"; break;
182 case 0x20f: reason = "PCI master abort error"; break;
183 case 0x211: reason = "PCI target abort error"; break;
184 case 0x213: reason = "scatter/gather PTE invalid error"; break;
185 case 0x215: reason = "flash ROM write error"; break;
186 case 0x217: reason = "IOA timeout detected"; break;
187 case 0x219: reason = "IOCHK#, EISA add-in board parity or other catastrophic error"; break;
188 case 0x21b: reason = "EISA fail-safe timer timeout"; break;
189 case 0x21d: reason = "EISA bus time-out"; break;
190 case 0x21f: reason = "EISA software generated NMI"; break;
191 case 0x221: reason = "unexpected ev5 IRQ[3] interrupt"; break;
192 default: reason = "unknown"; break;
195 printk(KERN_CRIT "machine check type: %s%s\n",
196 reason, mchk_header->retry ? " (retryable)" : "");
198 dik_show_regs(get_irq_regs(), NULL);
200 #ifdef CONFIG_VERBOSE_MCHECK
201 if (alpha_verbose_mcheck > 1) {
202 /* Dump the logout area to give all info. */
203 unsigned long *ptr = (unsigned long *)la_ptr;
205 for (i = 0; i < mchk_header->size / sizeof(long); i += 2) {
206 printk(KERN_CRIT " +%8lx %016lx %016lx\n",
207 i*sizeof(long), ptr[i], ptr[i+1]);
210 #endif /* CONFIG_VERBOSE_MCHECK */
214 * The special RTC interrupt type. The interrupt itself was
215 * processed by PALcode, and comes in via entInt vector 1.
218 static void rtc_enable_disable(unsigned int irq) { }
219 static unsigned int rtc_startup(unsigned int irq) { return 0; }
221 struct irqaction timer_irqaction = {
222 .handler = timer_interrupt,
223 .flags = IRQF_DISABLED,
227 static struct hw_interrupt_type rtc_irq_type = {
229 .startup = rtc_startup,
230 .shutdown = rtc_enable_disable,
231 .enable = rtc_enable_disable,
232 .disable = rtc_enable_disable,
233 .ack = rtc_enable_disable,
234 .end = rtc_enable_disable,
240 irq_desc[RTC_IRQ].status = IRQ_DISABLED;
241 irq_desc[RTC_IRQ].chip = &rtc_irq_type;
242 setup_irq(RTC_IRQ, &timer_irqaction);
245 /* Dummy irqactions. */
246 struct irqaction isa_cascade_irqaction = {
247 .handler = no_action,
248 .name = "isa-cascade"
251 struct irqaction timer_cascade_irqaction = {
252 .handler = no_action,
253 .name = "timer-cascade"
256 struct irqaction halt_switch_irqaction = {
257 .handler = no_action,
258 .name = "halt-switch"