1 Booting the Linux/ppc kernel without Open Firmware
2 --------------------------------------------------
4 (c) 2005 Benjamin Herrenschmidt <benh at kernel.crashing.org>,
6 (c) 2005 Becky Bruce <becky.bruce at freescale.com>,
7 Freescale Semiconductor, FSL SOC and 32-bit additions
8 (c) 2006 MontaVista Software, Inc.
9 Flash chip node definition
15 1) Entry point for arch/powerpc
18 II - The DT block format
20 2) Device tree generalities
21 3) Device tree "structure" block
22 4) Device tree "strings" block
24 III - Required content of the device tree
25 1) Note about cells and address representation
26 2) Note about "compatible" properties
27 3) Note about "name" properties
28 4) Note about node and property names and character set
29 5) Required nodes and properties
33 d) the /memory node(s)
35 f) the /soc<SOCname> node
37 IV - "dtc", the device tree compiler
39 V - Recommendations for a bootloader
41 VI - System-on-a-chip devices and nodes
42 1) Defining child nodes of an SOC
43 2) Representing devices without a current OF specification
45 b) Gianfar-compatible ethernet nodes
47 d) Interrupt controllers
49 f) Freescale SOC USB controllers
50 g) Freescale SOC SEC Security Engines
51 h) Board Control and Status (BCSR)
52 i) Freescale QUICC Engine module (QE)
53 j) CFI or JEDEC memory-mapped NOR flash
54 k) Global Utilities Block
55 l) Freescale Communications Processor Module
56 m) Chipselect/Local Bus
57 n) 4xx/Axon EMAC ethernet nodes
60 VII - Specifying interrupt information for devices
61 1) interrupts property
62 2) interrupt-parent property
63 3) OpenPIC Interrupt Controllers
64 4) ISA Interrupt Controllers
66 Appendix A - Sample SOC node for MPC8540
72 May 18, 2005: Rev 0.1 - Initial draft, no chapter III yet.
74 May 19, 2005: Rev 0.2 - Add chapter III and bits & pieces here or
75 clarifies the fact that a lot of things are
76 optional, the kernel only requires a very
77 small device tree, though it is encouraged
78 to provide an as complete one as possible.
80 May 24, 2005: Rev 0.3 - Precise that DT block has to be in RAM
82 - Define version 3 and new format version 16
83 for the DT block (version 16 needs kernel
84 patches, will be fwd separately).
85 String block now has a size, and full path
86 is replaced by unit name for more
88 linux,phandle is made optional, only nodes
89 that are referenced by other nodes need it.
90 "name" property is now automatically
91 deduced from the unit name
93 June 1, 2005: Rev 0.4 - Correct confusion between OF_DT_END and
94 OF_DT_END_NODE in structure definition.
95 - Change version 16 format to always align
96 property data to 4 bytes. Since tokens are
97 already aligned, that means no specific
98 required alignment between property size
99 and property data. The old style variable
100 alignment would make it impossible to do
101 "simple" insertion of properties using
102 memmove (thanks Milton for
103 noticing). Updated kernel patch as well
104 - Correct a few more alignment constraints
105 - Add a chapter about the device-tree
106 compiler and the textural representation of
107 the tree that can be "compiled" by dtc.
109 November 21, 2005: Rev 0.5
110 - Additions/generalizations for 32-bit
111 - Changed to reflect the new arch/powerpc
117 - Add some definitions of interrupt tree (simple/complex)
118 - Add some definitions for PCI host bridges
119 - Add some common address format examples
120 - Add definitions for standard properties and "compatible"
121 names for cells that are not already defined by the existing
123 - Compare FSL SOC use of PCI to standard and make sure no new
124 node definition required.
125 - Add more information about node definitions for SOC devices
126 that currently have no standard, like the FSL CPM.
132 During the recent development of the Linux/ppc64 kernel, and more
133 specifically, the addition of new platform types outside of the old
134 IBM pSeries/iSeries pair, it was decided to enforce some strict rules
135 regarding the kernel entry and bootloader <-> kernel interfaces, in
136 order to avoid the degeneration that had become the ppc32 kernel entry
137 point and the way a new platform should be added to the kernel. The
138 legacy iSeries platform breaks those rules as it predates this scheme,
139 but no new board support will be accepted in the main tree that
140 doesn't follows them properly. In addition, since the advent of the
141 arch/powerpc merged architecture for ppc32 and ppc64, new 32-bit
142 platforms and 32-bit platforms which move into arch/powerpc will be
143 required to use these rules as well.
145 The main requirement that will be defined in more detail below is
146 the presence of a device-tree whose format is defined after Open
147 Firmware specification. However, in order to make life easier
148 to embedded board vendors, the kernel doesn't require the device-tree
149 to represent every device in the system and only requires some nodes
150 and properties to be present. This will be described in detail in
151 section III, but, for example, the kernel does not require you to
152 create a node for every PCI device in the system. It is a requirement
153 to have a node for PCI host bridges in order to provide interrupt
154 routing informations and memory/IO ranges, among others. It is also
155 recommended to define nodes for on chip devices and other busses that
156 don't specifically fit in an existing OF specification. This creates a
157 great flexibility in the way the kernel can then probe those and match
158 drivers to device, without having to hard code all sorts of tables. It
159 also makes it more flexible for board vendors to do minor hardware
160 upgrades without significantly impacting the kernel code or cluttering
161 it with special cases.
164 1) Entry point for arch/powerpc
165 -------------------------------
167 There is one and one single entry point to the kernel, at the start
168 of the kernel image. That entry point supports two calling
171 a) Boot from Open Firmware. If your firmware is compatible
172 with Open Firmware (IEEE 1275) or provides an OF compatible
173 client interface API (support for "interpret" callback of
174 forth words isn't required), you can enter the kernel with:
176 r5 : OF callback pointer as defined by IEEE 1275
177 bindings to powerpc. Only the 32-bit client interface
178 is currently supported
180 r3, r4 : address & length of an initrd if any or 0
182 The MMU is either on or off; the kernel will run the
183 trampoline located in arch/powerpc/kernel/prom_init.c to
184 extract the device-tree and other information from open
185 firmware and build a flattened device-tree as described
186 in b). prom_init() will then re-enter the kernel using
187 the second method. This trampoline code runs in the
188 context of the firmware, which is supposed to handle all
189 exceptions during that time.
191 b) Direct entry with a flattened device-tree block. This entry
192 point is called by a) after the OF trampoline and can also be
193 called directly by a bootloader that does not support the Open
194 Firmware client interface. It is also used by "kexec" to
195 implement "hot" booting of a new kernel from a previous
196 running one. This method is what I will describe in more
197 details in this document, as method a) is simply standard Open
198 Firmware, and thus should be implemented according to the
199 various standard documents defining it and its binding to the
200 PowerPC platform. The entry point definition then becomes:
202 r3 : physical pointer to the device-tree block
203 (defined in chapter II) in RAM
205 r4 : physical pointer to the kernel itself. This is
206 used by the assembly code to properly disable the MMU
207 in case you are entering the kernel with MMU enabled
208 and a non-1:1 mapping.
210 r5 : NULL (as to differentiate with method a)
212 Note about SMP entry: Either your firmware puts your other
213 CPUs in some sleep loop or spin loop in ROM where you can get
214 them out via a soft reset or some other means, in which case
215 you don't need to care, or you'll have to enter the kernel
216 with all CPUs. The way to do that with method b) will be
217 described in a later revision of this document.
225 Board supports (platforms) are not exclusive config options. An
226 arbitrary set of board supports can be built in a single kernel
227 image. The kernel will "know" what set of functions to use for a
228 given platform based on the content of the device-tree. Thus, you
231 a) add your platform support as a _boolean_ option in
232 arch/powerpc/Kconfig, following the example of PPC_PSERIES,
233 PPC_PMAC and PPC_MAPLE. The later is probably a good
234 example of a board support to start from.
236 b) create your main platform file as
237 "arch/powerpc/platforms/myplatform/myboard_setup.c" and add it
238 to the Makefile under the condition of your CONFIG_
239 option. This file will define a structure of type "ppc_md"
240 containing the various callbacks that the generic code will
241 use to get to your platform specific code
243 c) Add a reference to your "ppc_md" structure in the
244 "machines" table in arch/powerpc/kernel/setup_64.c if you are
247 d) request and get assigned a platform number (see PLATFORM_*
248 constants in include/asm-powerpc/processor.h
250 32-bit embedded kernels:
252 Currently, board support is essentially an exclusive config option.
253 The kernel is configured for a single platform. Part of the reason
254 for this is to keep kernels on embedded systems small and efficient;
255 part of this is due to the fact the code is already that way. In the
256 future, a kernel may support multiple platforms, but only if the
257 platforms feature the same core architecture. A single kernel build
258 cannot support both configurations with Book E and configurations
259 with classic Powerpc architectures.
261 32-bit embedded platforms that are moved into arch/powerpc using a
262 flattened device tree should adopt the merged tree practice of
263 setting ppc_md up dynamically, even though the kernel is currently
264 built with support for only a single platform at a time. This allows
265 unification of the setup code, and will make it easier to go to a
266 multiple-platform-support model in the future.
268 NOTE: I believe the above will be true once Ben's done with the merge
269 of the boot sequences.... someone speak up if this is wrong!
271 To add a 32-bit embedded platform support, follow the instructions
272 for 64-bit platforms above, with the exception that the Kconfig
273 option should be set up such that the kernel builds exclusively for
274 the platform selected. The processor type for the platform should
275 enable another config option to select the specific board
278 NOTE: If Ben doesn't merge the setup files, may need to change this to
282 I will describe later the boot process and various callbacks that
283 your platform should implement.
286 II - The DT block format
287 ========================
290 This chapter defines the actual format of the flattened device-tree
291 passed to the kernel. The actual content of it and kernel requirements
292 are described later. You can find example of code manipulating that
293 format in various places, including arch/powerpc/kernel/prom_init.c
294 which will generate a flattened device-tree from the Open Firmware
295 representation, or the fs2dt utility which is part of the kexec tools
296 which will generate one from a filesystem representation. It is
297 expected that a bootloader like uboot provides a bit more support,
298 that will be discussed later as well.
300 Note: The block has to be in main memory. It has to be accessible in
301 both real mode and virtual mode with no mapping other than main
302 memory. If you are writing a simple flash bootloader, it should copy
303 the block to RAM before passing it to the kernel.
309 The kernel is entered with r3 pointing to an area of memory that is
310 roughly described in include/asm-powerpc/prom.h by the structure
313 struct boot_param_header {
314 u32 magic; /* magic word OF_DT_HEADER */
315 u32 totalsize; /* total size of DT block */
316 u32 off_dt_struct; /* offset to structure */
317 u32 off_dt_strings; /* offset to strings */
318 u32 off_mem_rsvmap; /* offset to memory reserve map
320 u32 version; /* format version */
321 u32 last_comp_version; /* last compatible version */
323 /* version 2 fields below */
324 u32 boot_cpuid_phys; /* Which physical CPU id we're
326 /* version 3 fields below */
327 u32 size_dt_strings; /* size of the strings block */
329 /* version 17 fields below */
330 u32 size_dt_struct; /* size of the DT structure block */
333 Along with the constants:
335 /* Definitions used by the flattened device tree */
336 #define OF_DT_HEADER 0xd00dfeed /* 4: version,
338 #define OF_DT_BEGIN_NODE 0x1 /* Start node: full name
340 #define OF_DT_END_NODE 0x2 /* End node */
341 #define OF_DT_PROP 0x3 /* Property: name off,
343 #define OF_DT_END 0x9
345 All values in this header are in big endian format, the various
346 fields in this header are defined more precisely below. All
347 "offset" values are in bytes from the start of the header; that is
348 from the value of r3.
352 This is a magic value that "marks" the beginning of the
353 device-tree block header. It contains the value 0xd00dfeed and is
354 defined by the constant OF_DT_HEADER
358 This is the total size of the DT block including the header. The
359 "DT" block should enclose all data structures defined in this
360 chapter (who are pointed to by offsets in this header). That is,
361 the device-tree structure, strings, and the memory reserve map.
365 This is an offset from the beginning of the header to the start
366 of the "structure" part the device tree. (see 2) device tree)
370 This is an offset from the beginning of the header to the start
371 of the "strings" part of the device-tree
375 This is an offset from the beginning of the header to the start
376 of the reserved memory map. This map is a list of pairs of 64-
377 bit integers. Each pair is a physical address and a size. The
378 list is terminated by an entry of size 0. This map provides the
379 kernel with a list of physical memory areas that are "reserved"
380 and thus not to be used for memory allocations, especially during
381 early initialization. The kernel needs to allocate memory during
382 boot for things like un-flattening the device-tree, allocating an
383 MMU hash table, etc... Those allocations must be done in such a
384 way to avoid overriding critical things like, on Open Firmware
385 capable machines, the RTAS instance, or on some pSeries, the TCE
386 tables used for the iommu. Typically, the reserve map should
387 contain _at least_ this DT block itself (header,total_size). If
388 you are passing an initrd to the kernel, you should reserve it as
389 well. You do not need to reserve the kernel image itself. The map
390 should be 64-bit aligned.
394 This is the version of this structure. Version 1 stops
395 here. Version 2 adds an additional field boot_cpuid_phys.
396 Version 3 adds the size of the strings block, allowing the kernel
397 to reallocate it easily at boot and free up the unused flattened
398 structure after expansion. Version 16 introduces a new more
399 "compact" format for the tree itself that is however not backward
400 compatible. Version 17 adds an additional field, size_dt_struct,
401 allowing it to be reallocated or moved more easily (this is
402 particularly useful for bootloaders which need to make
403 adjustments to a device tree based on probed information). You
404 should always generate a structure of the highest version defined
405 at the time of your implementation. Currently that is version 17,
406 unless you explicitly aim at being backward compatible.
410 Last compatible version. This indicates down to what version of
411 the DT block you are backward compatible. For example, version 2
412 is backward compatible with version 1 (that is, a kernel build
413 for version 1 will be able to boot with a version 2 format). You
414 should put a 1 in this field if you generate a device tree of
415 version 1 to 3, or 16 if you generate a tree of version 16 or 17
416 using the new unit name format.
420 This field only exist on version 2 headers. It indicate which
421 physical CPU ID is calling the kernel entry point. This is used,
422 among others, by kexec. If you are on an SMP system, this value
423 should match the content of the "reg" property of the CPU node in
424 the device-tree corresponding to the CPU calling the kernel entry
425 point (see further chapters for more informations on the required
426 device-tree contents)
430 This field only exists on version 3 and later headers. It
431 gives the size of the "strings" section of the device tree (which
432 starts at the offset given by off_dt_strings).
436 This field only exists on version 17 and later headers. It gives
437 the size of the "structure" section of the device tree (which
438 starts at the offset given by off_dt_struct).
440 So the typical layout of a DT block (though the various parts don't
441 need to be in that order) looks like this (addresses go from top to
445 ------------------------------
446 r3 -> | struct boot_param_header |
447 ------------------------------
448 | (alignment gap) (*) |
449 ------------------------------
450 | memory reserve map |
451 ------------------------------
453 ------------------------------
455 | device-tree structure |
457 ------------------------------
459 ------------------------------
461 | device-tree strings |
463 -----> ------------------------------
468 (*) The alignment gaps are not necessarily present; their presence
469 and size are dependent on the various alignment requirements of
470 the individual data blocks.
473 2) Device tree generalities
474 ---------------------------
476 This device-tree itself is separated in two different blocks, a
477 structure block and a strings block. Both need to be aligned to a 4
480 First, let's quickly describe the device-tree concept before detailing
481 the storage format. This chapter does _not_ describe the detail of the
482 required types of nodes & properties for the kernel, this is done
483 later in chapter III.
485 The device-tree layout is strongly inherited from the definition of
486 the Open Firmware IEEE 1275 device-tree. It's basically a tree of
487 nodes, each node having two or more named properties. A property can
490 It is a tree, so each node has one and only one parent except for the
491 root node who has no parent.
493 A node has 2 names. The actual node name is generally contained in a
494 property of type "name" in the node property list whose value is a
495 zero terminated string and is mandatory for version 1 to 3 of the
496 format definition (as it is in Open Firmware). Version 16 makes it
497 optional as it can generate it from the unit name defined below.
499 There is also a "unit name" that is used to differentiate nodes with
500 the same name at the same level, it is usually made of the node
501 names, the "@" sign, and a "unit address", which definition is
502 specific to the bus type the node sits on.
504 The unit name doesn't exist as a property per-se but is included in
505 the device-tree structure. It is typically used to represent "path" in
506 the device-tree. More details about the actual format of these will be
509 The kernel powerpc generic code does not make any formal use of the
510 unit address (though some board support code may do) so the only real
511 requirement here for the unit address is to ensure uniqueness of
512 the node unit name at a given level of the tree. Nodes with no notion
513 of address and no possible sibling of the same name (like /memory or
514 /cpus) may omit the unit address in the context of this specification,
515 or use the "@0" default unit address. The unit name is used to define
516 a node "full path", which is the concatenation of all parent node
517 unit names separated with "/".
519 The root node doesn't have a defined name, and isn't required to have
520 a name property either if you are using version 3 or earlier of the
521 format. It also has no unit address (no @ symbol followed by a unit
522 address). The root node unit name is thus an empty string. The full
523 path to the root node is "/".
525 Every node which actually represents an actual device (that is, a node
526 which isn't only a virtual "container" for more nodes, like "/cpus"
527 is) is also required to have a "device_type" property indicating the
530 Finally, every node that can be referenced from a property in another
531 node is required to have a "linux,phandle" property. Real open
532 firmware implementations provide a unique "phandle" value for every
533 node that the "prom_init()" trampoline code turns into
534 "linux,phandle" properties. However, this is made optional if the
535 flattened device tree is used directly. An example of a node
536 referencing another node via "phandle" is when laying out the
537 interrupt tree which will be described in a further version of this
540 This "linux, phandle" property is a 32-bit value that uniquely
541 identifies a node. You are free to use whatever values or system of
542 values, internal pointers, or whatever to generate these, the only
543 requirement is that every node for which you provide that property has
544 a unique value for it.
546 Here is an example of a simple device-tree. In this example, an "o"
547 designates a node followed by the node unit name. Properties are
548 presented with their name followed by their content. "content"
549 represents an ASCII string (zero terminated) value, while <content>
550 represents a 32-bit hexadecimal value. The various nodes in this
551 example will be discussed in a later chapter. At this point, it is
552 only meant to give you a idea of what a device-tree looks like. I have
553 purposefully kept the "name" and "linux,phandle" properties which
554 aren't necessary in order to give you a better idea of what the tree
555 looks like in practice.
558 |- name = "device-tree"
559 |- model = "MyBoardName"
560 |- compatible = "MyBoardFamilyName"
561 |- #address-cells = <2>
563 |- linux,phandle = <0>
567 | | - linux,phandle = <1>
568 | | - #address-cells = <1>
569 | | - #size-cells = <0>
572 | |- name = "PowerPC,970"
573 | |- device_type = "cpu"
575 | |- clock-frequency = <5f5e1000>
577 | |- linux,phandle = <2>
581 | |- device_type = "memory"
582 | |- reg = <00000000 00000000 00000000 20000000>
583 | |- linux,phandle = <3>
587 |- bootargs = "root=/dev/sda2"
588 |- linux,phandle = <4>
590 This tree is almost a minimal tree. It pretty much contains the
591 minimal set of required nodes and properties to boot a linux kernel;
592 that is, some basic model informations at the root, the CPUs, and the
593 physical memory layout. It also includes misc information passed
594 through /chosen, like in this example, the platform type (mandatory)
595 and the kernel command line arguments (optional).
597 The /cpus/PowerPC,970@0/64-bit property is an example of a
598 property without a value. All other properties have a value. The
599 significance of the #address-cells and #size-cells properties will be
600 explained in chapter IV which defines precisely the required nodes and
601 properties and their content.
604 3) Device tree "structure" block
606 The structure of the device tree is a linearized tree structure. The
607 "OF_DT_BEGIN_NODE" token starts a new node, and the "OF_DT_END_NODE"
608 ends that node definition. Child nodes are simply defined before
609 "OF_DT_END_NODE" (that is nodes within the node). A 'token' is a 32
610 bit value. The tree has to be "finished" with a OF_DT_END token
612 Here's the basic structure of a single node:
614 * token OF_DT_BEGIN_NODE (that is 0x00000001)
615 * for version 1 to 3, this is the node full path as a zero
616 terminated string, starting with "/". For version 16 and later,
617 this is the node unit name only (or an empty string for the
619 * [align gap to next 4 bytes boundary]
621 * token OF_DT_PROP (that is 0x00000003)
622 * 32-bit value of property value size in bytes (or 0 if no
624 * 32-bit value of offset in string block of property name
625 * property value data if any
626 * [align gap to next 4 bytes boundary]
627 * [child nodes if any]
628 * token OF_DT_END_NODE (that is 0x00000002)
630 So the node content can be summarized as a start token, a full path,
631 a list of properties, a list of child nodes, and an end token. Every
632 child node is a full node structure itself as defined above.
634 NOTE: The above definition requires that all property definitions for
635 a particular node MUST precede any subnode definitions for that node.
636 Although the structure would not be ambiguous if properties and
637 subnodes were intermingled, the kernel parser requires that the
638 properties come first (up until at least 2.6.22). Any tools
639 manipulating a flattened tree must take care to preserve this
642 4) Device tree "strings" block
644 In order to save space, property names, which are generally redundant,
645 are stored separately in the "strings" block. This block is simply the
646 whole bunch of zero terminated strings for all property names
647 concatenated together. The device-tree property definitions in the
648 structure block will contain offset values from the beginning of the
652 III - Required content of the device tree
653 =========================================
655 WARNING: All "linux,*" properties defined in this document apply only
656 to a flattened device-tree. If your platform uses a real
657 implementation of Open Firmware or an implementation compatible with
658 the Open Firmware client interface, those properties will be created
659 by the trampoline code in the kernel's prom_init() file. For example,
660 that's where you'll have to add code to detect your board model and
661 set the platform number. However, when using the flattened device-tree
662 entry point, there is no prom_init() pass, and thus you have to
663 provide those properties yourself.
666 1) Note about cells and address representation
667 ----------------------------------------------
669 The general rule is documented in the various Open Firmware
670 documentations. If you choose to describe a bus with the device-tree
671 and there exist an OF bus binding, then you should follow the
672 specification. However, the kernel does not require every single
673 device or bus to be described by the device tree.
675 In general, the format of an address for a device is defined by the
676 parent bus type, based on the #address-cells and #size-cells
677 properties. Note that the parent's parent definitions of #address-cells
678 and #size-cells are not inhereted so every node with children must specify
679 them. The kernel requires the root node to have those properties defining
680 addresses format for devices directly mapped on the processor bus.
682 Those 2 properties define 'cells' for representing an address and a
683 size. A "cell" is a 32-bit number. For example, if both contain 2
684 like the example tree given above, then an address and a size are both
685 composed of 2 cells, and each is a 64-bit number (cells are
686 concatenated and expected to be in big endian format). Another example
687 is the way Apple firmware defines them, with 2 cells for an address
688 and one cell for a size. Most 32-bit implementations should define
689 #address-cells and #size-cells to 1, which represents a 32-bit value.
690 Some 32-bit processors allow for physical addresses greater than 32
691 bits; these processors should define #address-cells as 2.
693 "reg" properties are always a tuple of the type "address size" where
694 the number of cells of address and size is specified by the bus
695 #address-cells and #size-cells. When a bus supports various address
696 spaces and other flags relative to a given address allocation (like
697 prefetchable, etc...) those flags are usually added to the top level
698 bits of the physical address. For example, a PCI physical address is
699 made of 3 cells, the bottom two containing the actual address itself
700 while the top cell contains address space indication, flags, and pci
701 bus & device numbers.
703 For busses that support dynamic allocation, it's the accepted practice
704 to then not provide the address in "reg" (keep it 0) though while
705 providing a flag indicating the address is dynamically allocated, and
706 then, to provide a separate "assigned-addresses" property that
707 contains the fully allocated addresses. See the PCI OF bindings for
710 In general, a simple bus with no address space bits and no dynamic
711 allocation is preferred if it reflects your hardware, as the existing
712 kernel address parsing functions will work out of the box. If you
713 define a bus type with a more complex address format, including things
714 like address space bits, you'll have to add a bus translator to the
715 prom_parse.c file of the recent kernels for your bus type.
717 The "reg" property only defines addresses and sizes (if #size-cells is
718 non-0) within a given bus. In order to translate addresses upward
719 (that is into parent bus addresses, and possibly into CPU physical
720 addresses), all busses must contain a "ranges" property. If the
721 "ranges" property is missing at a given level, it's assumed that
722 translation isn't possible, i.e., the registers are not visible on the
723 parent bus. The format of the "ranges" property for a bus is a list
726 bus address, parent bus address, size
728 "bus address" is in the format of the bus this bus node is defining,
729 that is, for a PCI bridge, it would be a PCI address. Thus, (bus
730 address, size) defines a range of addresses for child devices. "parent
731 bus address" is in the format of the parent bus of this bus. For
732 example, for a PCI host controller, that would be a CPU address. For a
733 PCI<->ISA bridge, that would be a PCI address. It defines the base
734 address in the parent bus where the beginning of that range is mapped.
736 For a new 64-bit powerpc board, I recommend either the 2/2 format or
737 Apple's 2/1 format which is slightly more compact since sizes usually
738 fit in a single 32-bit word. New 32-bit powerpc boards should use a
739 1/1 format, unless the processor supports physical addresses greater
740 than 32-bits, in which case a 2/1 format is recommended.
742 Alternatively, the "ranges" property may be empty, indicating that the
743 registers are visible on the parent bus using an identity mapping
744 translation. In other words, the parent bus address space is the same
745 as the child bus address space.
747 2) Note about "compatible" properties
748 -------------------------------------
750 These properties are optional, but recommended in devices and the root
751 node. The format of a "compatible" property is a list of concatenated
752 zero terminated strings. They allow a device to express its
753 compatibility with a family of similar devices, in some cases,
754 allowing a single driver to match against several devices regardless
755 of their actual names.
757 3) Note about "name" properties
758 -------------------------------
760 While earlier users of Open Firmware like OldWorld macintoshes tended
761 to use the actual device name for the "name" property, it's nowadays
762 considered a good practice to use a name that is closer to the device
763 class (often equal to device_type). For example, nowadays, ethernet
764 controllers are named "ethernet", an additional "model" property
765 defining precisely the chip type/model, and "compatible" property
766 defining the family in case a single driver can driver more than one
767 of these chips. However, the kernel doesn't generally put any
768 restriction on the "name" property; it is simply considered good
769 practice to follow the standard and its evolutions as closely as
772 Note also that the new format version 16 makes the "name" property
773 optional. If it's absent for a node, then the node's unit name is then
774 used to reconstruct the name. That is, the part of the unit name
775 before the "@" sign is used (or the entire unit name if no "@" sign
778 4) Note about node and property names and character set
779 -------------------------------------------------------
781 While open firmware provides more flexible usage of 8859-1, this
782 specification enforces more strict rules. Nodes and properties should
783 be comprised only of ASCII characters 'a' to 'z', '0' to
784 '9', ',', '.', '_', '+', '#', '?', and '-'. Node names additionally
785 allow uppercase characters 'A' to 'Z' (property names should be
786 lowercase. The fact that vendors like Apple don't respect this rule is
787 irrelevant here). Additionally, node and property names should always
788 begin with a character in the range 'a' to 'z' (or 'A' to 'Z' for node
791 The maximum number of characters for both nodes and property names
792 is 31. In the case of node names, this is only the leftmost part of
793 a unit name (the pure "name" property), it doesn't include the unit
794 address which can extend beyond that limit.
797 5) Required nodes and properties
798 --------------------------------
799 These are all that are currently required. However, it is strongly
800 recommended that you expose PCI host bridges as documented in the
801 PCI binding to open firmware, and your interrupt tree as documented
802 in OF interrupt tree specification.
806 The root node requires some properties to be present:
808 - model : this is your board name/model
809 - #address-cells : address representation for "root" devices
810 - #size-cells: the size representation for "root" devices
811 - device_type : This property shouldn't be necessary. However, if
812 you decide to create a device_type for your root node, make sure it
813 is _not_ "chrp" unless your platform is a pSeries or PAPR compliant
814 one for 64-bit, or a CHRP-type machine for 32-bit as this will
815 matched by the kernel this way.
817 Additionally, some recommended properties are:
819 - compatible : the board "family" generally finds its way here,
820 for example, if you have 2 board models with a similar layout,
821 that typically get driven by the same platform code in the
822 kernel, you would use a different "model" property but put a
823 value in "compatible". The kernel doesn't directly use that
824 value but it is generally useful.
826 The root node is also generally where you add additional properties
827 specific to your board like the serial number if any, that sort of
828 thing. It is recommended that if you add any "custom" property whose
829 name may clash with standard defined ones, you prefix them with your
830 vendor name and a comma.
834 This node is the parent of all individual CPU nodes. It doesn't
835 have any specific requirements, though it's generally good practice
838 #address-cells = <00000001>
839 #size-cells = <00000000>
841 This defines that the "address" for a CPU is a single cell, and has
842 no meaningful size. This is not necessary but the kernel will assume
843 that format when reading the "reg" properties of a CPU node, see
848 So under /cpus, you are supposed to create a node for every CPU on
849 the machine. There is no specific restriction on the name of the
850 CPU, though It's common practice to call it PowerPC,<name>. For
851 example, Apple uses PowerPC,G5 while IBM uses PowerPC,970FX.
855 - device_type : has to be "cpu"
856 - reg : This is the physical CPU number, it's a single 32-bit cell
857 and is also used as-is as the unit number for constructing the
858 unit name in the full path. For example, with 2 CPUs, you would
860 /cpus/PowerPC,970FX@0
861 /cpus/PowerPC,970FX@1
862 (unit addresses do not require leading zeroes)
863 - d-cache-block-size : one cell, L1 data cache block size in bytes (*)
864 - i-cache-block-size : one cell, L1 instruction cache block size in
866 - d-cache-size : one cell, size of L1 data cache in bytes
867 - i-cache-size : one cell, size of L1 instruction cache in bytes
869 (*) The cache "block" size is the size on which the cache management
870 instructions operate. Historically, this document used the cache
871 "line" size here which is incorrect. The kernel will prefer the cache
872 block size and will fallback to cache line size for backward
875 Recommended properties:
877 - timebase-frequency : a cell indicating the frequency of the
878 timebase in Hz. This is not directly used by the generic code,
879 but you are welcome to copy/paste the pSeries code for setting
880 the kernel timebase/decrementer calibration based on this
882 - clock-frequency : a cell indicating the CPU core clock frequency
883 in Hz. A new property will be defined for 64-bit values, but if
884 your frequency is < 4Ghz, one cell is enough. Here as well as
885 for the above, the common code doesn't use that property, but
886 you are welcome to re-use the pSeries or Maple one. A future
887 kernel version might provide a common function for this.
888 - d-cache-line-size : one cell, L1 data cache line size in bytes
889 if different from the block size
890 - i-cache-line-size : one cell, L1 instruction cache line size in
891 bytes if different from the block size
893 You are welcome to add any property you find relevant to your board,
894 like some information about the mechanism used to soft-reset the
895 CPUs. For example, Apple puts the GPIO number for CPU soft reset
896 lines in there as a "soft-reset" property since they start secondary
897 CPUs by soft-resetting them.
900 d) the /memory node(s)
902 To define the physical memory layout of your board, you should
903 create one or more memory node(s). You can either create a single
904 node with all memory ranges in its reg property, or you can create
905 several nodes, as you wish. The unit address (@ part) used for the
906 full path is the address of the first range of memory defined by a
907 given node. If you use a single memory node, this will typically be
912 - device_type : has to be "memory"
913 - reg : This property contains all the physical memory ranges of
914 your board. It's a list of addresses/sizes concatenated
915 together, with the number of cells of each defined by the
916 #address-cells and #size-cells of the root node. For example,
917 with both of these properties being 2 like in the example given
918 earlier, a 970 based machine with 6Gb of RAM could typically
919 have a "reg" property here that looks like:
921 00000000 00000000 00000000 80000000
922 00000001 00000000 00000001 00000000
924 That is a range starting at 0 of 0x80000000 bytes and a range
925 starting at 0x100000000 and of 0x100000000 bytes. You can see
926 that there is no memory covering the IO hole between 2Gb and
927 4Gb. Some vendors prefer splitting those ranges into smaller
928 segments, but the kernel doesn't care.
932 This node is a bit "special". Normally, that's where open firmware
933 puts some variable environment information, like the arguments, or
934 the default input/output devices.
936 This specification makes a few of these mandatory, but also defines
937 some linux-specific properties that would be normally constructed by
938 the prom_init() trampoline when booting with an OF client interface,
939 but that you have to provide yourself when using the flattened format.
941 Recommended properties:
943 - bootargs : This zero-terminated string is passed as the kernel
945 - linux,stdout-path : This is the full path to your standard
946 console device if any. Typically, if you have serial devices on
947 your board, you may want to put the full path to the one set as
948 the default console in the firmware here, for the kernel to pick
949 it up as its own default console. If you look at the function
950 set_preferred_console() in arch/ppc64/kernel/setup.c, you'll see
951 that the kernel tries to find out the default console and has
952 knowledge of various types like 8250 serial ports. You may want
953 to extend this function to add your own.
955 Note that u-boot creates and fills in the chosen node for platforms
958 (Note: a practice that is now obsolete was to include a property
959 under /chosen called interrupt-controller which had a phandle value
960 that pointed to the main interrupt controller)
962 f) the /soc<SOCname> node
964 This node is used to represent a system-on-a-chip (SOC) and must be
965 present if the processor is a SOC. The top-level soc node contains
966 information that is global to all devices on the SOC. The node name
967 should contain a unit address for the SOC, which is the base address
968 of the memory-mapped register set for the SOC. The name of an soc
969 node should start with "soc", and the remainder of the name should
970 represent the part number for the soc. For example, the MPC8540's
971 soc node would be called "soc8540".
975 - device_type : Should be "soc"
976 - ranges : Should be defined as specified in 1) to describe the
977 translation of SOC addresses for memory mapped SOC registers.
978 - bus-frequency: Contains the bus frequency for the SOC node.
979 Typically, the value of this field is filled in by the boot
983 Recommended properties:
985 - reg : This property defines the address and size of the
986 memory-mapped registers that are used for the SOC node itself.
987 It does not include the child device registers - these will be
988 defined inside each child node. The address specified in the
989 "reg" property should match the unit address of the SOC node.
990 - #address-cells : Address representation for "soc" devices. The
991 format of this field may vary depending on whether or not the
992 device registers are memory mapped. For memory mapped
993 registers, this field represents the number of cells needed to
994 represent the address of the registers. For SOCs that do not
995 use MMIO, a special address format should be defined that
996 contains enough cells to represent the required information.
997 See 1) above for more details on defining #address-cells.
998 - #size-cells : Size representation for "soc" devices
999 - #interrupt-cells : Defines the width of cells used to represent
1000 interrupts. Typically this value is <2>, which includes a
1001 32-bit number that represents the interrupt number, and a
1002 32-bit number that represents the interrupt sense and level.
1003 This field is only needed if the SOC contains an interrupt
1006 The SOC node may contain child nodes for each SOC device that the
1007 platform uses. Nodes should not be created for devices which exist
1008 on the SOC but are not used by a particular platform. See chapter VI
1009 for more information on how to specify devices that are part of a SOC.
1011 Example SOC node for the MPC8540:
1014 #address-cells = <1>;
1016 #interrupt-cells = <2>;
1017 device_type = "soc";
1018 ranges = <00000000 e0000000 00100000>
1019 reg = <e0000000 00003000>;
1020 bus-frequency = <0>;
1025 IV - "dtc", the device tree compiler
1026 ====================================
1029 dtc source code can be found at
1030 <http://ozlabs.org/~dgibson/dtc/dtc.tar.gz>
1032 WARNING: This version is still in early development stage; the
1033 resulting device-tree "blobs" have not yet been validated with the
1034 kernel. The current generated bloc lacks a useful reserve map (it will
1035 be fixed to generate an empty one, it's up to the bootloader to fill
1036 it up) among others. The error handling needs work, bugs are lurking,
1039 dtc basically takes a device-tree in a given format and outputs a
1040 device-tree in another format. The currently supported formats are:
1045 - "dtb": "blob" format, that is a flattened device-tree block
1047 header all in a binary blob.
1048 - "dts": "source" format. This is a text file containing a
1049 "source" for a device-tree. The format is defined later in this
1051 - "fs" format. This is a representation equivalent to the
1052 output of /proc/device-tree, that is nodes are directories and
1053 properties are files
1058 - "dtb": "blob" format
1059 - "dts": "source" format
1060 - "asm": assembly language file. This is a file that can be
1061 sourced by gas to generate a device-tree "blob". That file can
1062 then simply be added to your Makefile. Additionally, the
1063 assembly file exports some symbols that can be used.
1066 The syntax of the dtc tool is
1068 dtc [-I <input-format>] [-O <output-format>]
1069 [-o output-filename] [-V output_version] input_filename
1072 The "output_version" defines what version of the "blob" format will be
1073 generated. Supported versions are 1,2,3 and 16. The default is
1074 currently version 3 but that may change in the future to version 16.
1076 Additionally, dtc performs various sanity checks on the tree, like the
1077 uniqueness of linux, phandle properties, validity of strings, etc...
1079 The format of the .dts "source" file is "C" like, supports C and C++
1085 The above is the "device-tree" definition. It's the only statement
1086 supported currently at the toplevel.
1089 property1 = "string_value"; /* define a property containing a 0
1093 property2 = <1234abcd>; /* define a property containing a
1094 * numerical 32-bit value (hexadecimal)
1097 property3 = <12345678 12345678 deadbeef>;
1098 /* define a property containing 3
1099 * numerical 32-bit values (cells) in
1102 property4 = [0a 0b 0c 0d de ea ad be ef];
1103 /* define a property whose content is
1104 * an arbitrary array of bytes
1107 childnode@addresss { /* define a child node named "childnode"
1108 * whose unit name is "childnode at
1112 childprop = "hello\n"; /* define a property "childprop" of
1113 * childnode (in this case, a string)
1118 Nodes can contain other nodes etc... thus defining the hierarchical
1119 structure of the tree.
1121 Strings support common escape sequences from C: "\n", "\t", "\r",
1122 "\(octal value)", "\x(hex value)".
1124 It is also suggested that you pipe your source file through cpp (gcc
1125 preprocessor) so you can use #include's, #define for constants, etc...
1127 Finally, various options are planned but not yet implemented, like
1128 automatic generation of phandles, labels (exported to the asm file so
1129 you can point to a property content and change it easily from whatever
1130 you link the device-tree with), label or path instead of numeric value
1131 in some cells to "point" to a node (replaced by a phandle at compile
1132 time), export of reserve map address to the asm file, ability to
1133 specify reserve map content at compile time, etc...
1135 We may provide a .h include file with common definitions of that
1136 proves useful for some properties (like building PCI properties or
1137 interrupt maps) though it may be better to add a notion of struct
1138 definitions to the compiler...
1141 V - Recommendations for a bootloader
1142 ====================================
1145 Here are some various ideas/recommendations that have been proposed
1146 while all this has been defined and implemented.
1148 - The bootloader may want to be able to use the device-tree itself
1149 and may want to manipulate it (to add/edit some properties,
1150 like physical memory size or kernel arguments). At this point, 2
1151 choices can be made. Either the bootloader works directly on the
1152 flattened format, or the bootloader has its own internal tree
1153 representation with pointers (similar to the kernel one) and
1154 re-flattens the tree when booting the kernel. The former is a bit
1155 more difficult to edit/modify, the later requires probably a bit
1156 more code to handle the tree structure. Note that the structure
1157 format has been designed so it's relatively easy to "insert"
1158 properties or nodes or delete them by just memmoving things
1159 around. It contains no internal offsets or pointers for this
1162 - An example of code for iterating nodes & retrieving properties
1163 directly from the flattened tree format can be found in the kernel
1164 file arch/ppc64/kernel/prom.c, look at scan_flat_dt() function,
1165 its usage in early_init_devtree(), and the corresponding various
1166 early_init_dt_scan_*() callbacks. That code can be re-used in a
1167 GPL bootloader, and as the author of that code, I would be happy
1168 to discuss possible free licensing to any vendor who wishes to
1169 integrate all or part of this code into a non-GPL bootloader.
1173 VI - System-on-a-chip devices and nodes
1174 =======================================
1176 Many companies are now starting to develop system-on-a-chip
1177 processors, where the processor core (CPU) and many peripheral devices
1178 exist on a single piece of silicon. For these SOCs, an SOC node
1179 should be used that defines child nodes for the devices that make
1180 up the SOC. While platforms are not required to use this model in
1181 order to boot the kernel, it is highly encouraged that all SOC
1182 implementations define as complete a flat-device-tree as possible to
1183 describe the devices on the SOC. This will allow for the
1184 genericization of much of the kernel code.
1187 1) Defining child nodes of an SOC
1188 ---------------------------------
1190 Each device that is part of an SOC may have its own node entry inside
1191 the SOC node. For each device that is included in the SOC, the unit
1192 address property represents the address offset for this device's
1193 memory-mapped registers in the parent's address space. The parent's
1194 address space is defined by the "ranges" property in the top-level soc
1195 node. The "reg" property for each node that exists directly under the
1196 SOC node should contain the address mapping from the child address space
1197 to the parent SOC address space and the size of the device's
1198 memory-mapped register file.
1200 For many devices that may exist inside an SOC, there are predefined
1201 specifications for the format of the device tree node. All SOC child
1202 nodes should follow these specifications, except where noted in this
1205 See appendix A for an example partial SOC node definition for the
1209 2) Representing devices without a current OF specification
1210 ----------------------------------------------------------
1212 Currently, there are many devices on SOCs that do not have a standard
1213 representation pre-defined as part of the open firmware
1214 specifications, mainly because the boards that contain these SOCs are
1215 not currently booted using open firmware. This section contains
1216 descriptions for the SOC devices for which new nodes have been
1217 defined; this list will expand as more and more SOC-containing
1218 platforms are moved over to use the flattened-device-tree model.
1222 The MDIO is a bus to which the PHY devices are connected. For each
1223 device that exists on this bus, a child node should be created. See
1224 the definition of the PHY node below for an example of how to define
1227 Required properties:
1228 - reg : Offset and length of the register set for the device
1229 - compatible : Should define the compatible device type for the
1230 mdio. Currently, this is most likely to be "fsl,gianfar-mdio"
1236 compatible = "fsl,gianfar-mdio";
1244 b) Gianfar-compatible ethernet nodes
1246 Required properties:
1248 - device_type : Should be "network"
1249 - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
1250 - compatible : Should be "gianfar"
1251 - reg : Offset and length of the register set for the device
1252 - mac-address : List of bytes representing the ethernet address of
1254 - interrupts : <a b> where a is the interrupt number and b is a
1255 field that represents an encoding of the sense and level
1256 information for the interrupt. This should be encoded based on
1257 the information in section 2) depending on the type of interrupt
1258 controller you have.
1259 - interrupt-parent : the phandle for the interrupt controller that
1260 services interrupts for this device.
1261 - phy-handle : The phandle for the PHY connected to this ethernet
1263 - fixed-link : <a b c d e> where a is emulated phy id - choose any,
1264 but unique to the all specified fixed-links, b is duplex - 0 half,
1265 1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no
1266 pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause.
1268 Recommended properties:
1270 - linux,network-index : This is the intended "index" of this
1271 network device. This is used by the bootwrapper to interpret
1272 MAC addresses passed by the firmware when no information other
1273 than indices is available to associate an address with a device.
1274 - phy-connection-type : a string naming the controller/PHY interface type,
1275 i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii",
1276 "tbi", or "rtbi". This property is only really needed if the connection
1277 is of type "rgmii-id", as all other connection types are detected by
1285 device_type = "network";
1287 compatible = "gianfar";
1289 mac-address = [ 00 E0 0C 00 73 00 ];
1290 interrupts = <d 3 e 3 12 3>;
1291 interrupt-parent = <40000>;
1292 phy-handle = <2452000>
1299 Required properties:
1301 - device_type : Should be "ethernet-phy"
1302 - interrupts : <a b> where a is the interrupt number and b is a
1303 field that represents an encoding of the sense and level
1304 information for the interrupt. This should be encoded based on
1305 the information in section 2) depending on the type of interrupt
1306 controller you have.
1307 - interrupt-parent : the phandle for the interrupt controller that
1308 services interrupts for this device.
1309 - reg : The ID number for the phy, usually a small integer
1310 - linux,phandle : phandle for this node; likely referenced by an
1311 ethernet controller node.
1317 linux,phandle = <2452000>
1318 interrupt-parent = <40000>;
1319 interrupts = <35 1>;
1321 device_type = "ethernet-phy";
1325 d) Interrupt controllers
1327 Some SOC devices contain interrupt controllers that are different
1328 from the standard Open PIC specification. The SOC device nodes for
1329 these types of controllers should be specified just like a standard
1330 OpenPIC controller. Sense and level information should be encoded
1331 as specified in section 2) of this chapter for each device that
1332 specifies an interrupt.
1337 linux,phandle = <40000>;
1338 clock-frequency = <0>;
1339 interrupt-controller;
1340 #address-cells = <0>;
1341 reg = <40000 40000>;
1343 compatible = "chrp,open-pic";
1344 device_type = "open-pic";
1351 Required properties :
1353 - device_type : Should be "i2c"
1354 - reg : Offset and length of the register set for the device
1356 Recommended properties :
1358 - compatible : Should be "fsl-i2c" for parts compatible with
1359 Freescale I2C specifications.
1360 - interrupts : <a b> where a is the interrupt number and b is a
1361 field that represents an encoding of the sense and level
1362 information for the interrupt. This should be encoded based on
1363 the information in section 2) depending on the type of interrupt
1364 controller you have.
1365 - interrupt-parent : the phandle for the interrupt controller that
1366 services interrupts for this device.
1367 - dfsrr : boolean; if defined, indicates that this I2C device has
1368 a digital filter sampling rate register
1369 - fsl5200-clocking : boolean; if defined, indicated that this device
1370 uses the FSL 5200 clocking mechanism.
1375 interrupt-parent = <40000>;
1376 interrupts = <1b 3>;
1378 device_type = "i2c";
1379 compatible = "fsl-i2c";
1384 f) Freescale SOC USB controllers
1386 The device node for a USB controller that is part of a Freescale
1387 SOC is as described in the document "Open Firmware Recommended
1388 Practice : Universal Serial Bus" with the following modifications
1391 Required properties :
1392 - compatible : Should be "fsl-usb2-mph" for multi port host USB
1393 controllers, or "fsl-usb2-dr" for dual role USB controllers
1394 - phy_type : For multi port host USB controllers, should be one of
1395 "ulpi", or "serial". For dual role USB controllers, should be
1396 one of "ulpi", "utmi", "utmi_wide", or "serial".
1397 - reg : Offset and length of the register set for the device
1398 - port0 : boolean; if defined, indicates port0 is connected for
1399 fsl-usb2-mph compatible controllers. Either this property or
1400 "port1" (or both) must be defined for "fsl-usb2-mph" compatible
1402 - port1 : boolean; if defined, indicates port1 is connected for
1403 fsl-usb2-mph compatible controllers. Either this property or
1404 "port0" (or both) must be defined for "fsl-usb2-mph" compatible
1406 - dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
1407 controllers. Can be "host", "peripheral", or "otg". Default to
1408 "host" if not defined for backward compatibility.
1410 Recommended properties :
1411 - interrupts : <a b> where a is the interrupt number and b is a
1412 field that represents an encoding of the sense and level
1413 information for the interrupt. This should be encoded based on
1414 the information in section 2) depending on the type of interrupt
1415 controller you have.
1416 - interrupt-parent : the phandle for the interrupt controller that
1417 services interrupts for this device.
1419 Example multi port host USB controller device node :
1421 compatible = "fsl-usb2-mph";
1423 #address-cells = <1>;
1425 interrupt-parent = <700>;
1426 interrupts = <27 1>;
1432 Example dual role USB controller device node :
1434 compatible = "fsl-usb2-dr";
1436 #address-cells = <1>;
1438 interrupt-parent = <700>;
1439 interrupts = <26 1>;
1445 g) Freescale SOC SEC Security Engines
1447 Required properties:
1449 - device_type : Should be "crypto"
1450 - model : Model of the device. Should be "SEC1" or "SEC2"
1451 - compatible : Should be "talitos"
1452 - reg : Offset and length of the register set for the device
1453 - interrupts : <a b> where a is the interrupt number and b is a
1454 field that represents an encoding of the sense and level
1455 information for the interrupt. This should be encoded based on
1456 the information in section 2) depending on the type of interrupt
1457 controller you have.
1458 - interrupt-parent : the phandle for the interrupt controller that
1459 services interrupts for this device.
1460 - num-channels : An integer representing the number of channels
1462 - channel-fifo-len : An integer representing the number of
1463 descriptor pointers each channel fetch fifo can hold.
1464 - exec-units-mask : The bitmask representing what execution units
1465 (EUs) are available. It's a single 32-bit cell. EU information
1466 should be encoded following the SEC's Descriptor Header Dword
1467 EU_SEL0 field documentation, i.e. as follows:
1469 bit 0 = reserved - should be 0
1470 bit 1 = set if SEC has the ARC4 EU (AFEU)
1471 bit 2 = set if SEC has the DES/3DES EU (DEU)
1472 bit 3 = set if SEC has the message digest EU (MDEU)
1473 bit 4 = set if SEC has the random number generator EU (RNG)
1474 bit 5 = set if SEC has the public key EU (PKEU)
1475 bit 6 = set if SEC has the AES EU (AESU)
1476 bit 7 = set if SEC has the Kasumi EU (KEU)
1478 bits 8 through 31 are reserved for future SEC EUs.
1480 - descriptor-types-mask : The bitmask representing what descriptors
1481 are available. It's a single 32-bit cell. Descriptor type
1482 information should be encoded following the SEC's Descriptor
1483 Header Dword DESC_TYPE field documentation, i.e. as follows:
1485 bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
1486 bit 1 = set if SEC supports the ipsec_esp descriptor type
1487 bit 2 = set if SEC supports the common_nonsnoop desc. type
1488 bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
1489 bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
1490 bit 5 = set if SEC supports the srtp descriptor type
1491 bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
1492 bit 7 = set if SEC supports the pkeu_assemble descriptor type
1493 bit 8 = set if SEC supports the aesu_key_expand_output desc.type
1494 bit 9 = set if SEC supports the pkeu_ptmul descriptor type
1495 bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
1496 bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
1498 ..and so on and so forth.
1504 device_type = "crypto";
1506 compatible = "talitos";
1507 reg = <30000 10000>;
1508 interrupts = <1d 3>;
1509 interrupt-parent = <40000>;
1511 channel-fifo-len = <18>;
1512 exec-units-mask = <000000fe>;
1513 descriptor-types-mask = <012b0ebf>;
1516 h) Board Control and Status (BCSR)
1518 Required properties:
1520 - device_type : Should be "board-control"
1521 - reg : Offset and length of the register set for the device
1526 device_type = "board-control";
1527 reg = <f8000000 8000>;
1530 i) Freescale QUICC Engine module (QE)
1531 This represents qe module that is installed on PowerQUICC II Pro.
1533 NOTE: This is an interim binding; it should be updated to fit
1534 in with the CPM binding later in this document.
1536 Basically, it is a bus of devices, that could act more or less
1537 as a complete entity (UCC, USB etc ). All of them should be siblings on
1538 the "root" qe node, using the common properties from there.
1539 The description below applies to the qe of MPC8360 and
1540 more nodes and properties would be extended in the future.
1544 Required properties:
1545 - device_type : should be "qe";
1546 - model : precise model of the QE, Can be "QE", "CPM", or "CPM2"
1547 - reg : offset and length of the device registers.
1548 - bus-frequency : the clock frequency for QUICC Engine.
1550 Recommended properties
1551 - brg-frequency : the internal clock source frequency for baud-rate
1556 #address-cells = <1>;
1558 #interrupt-cells = <2>;
1561 ranges = <0 e0100000 00100000>;
1562 reg = <e0100000 480>;
1563 brg-frequency = <0>;
1564 bus-frequency = <179A7B00>;
1568 ii) SPI (Serial Peripheral Interface)
1570 Required properties:
1571 - device_type : should be "spi".
1572 - compatible : should be "fsl_spi".
1573 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
1574 - reg : Offset and length of the register set for the device
1575 - interrupts : <a b> where a is the interrupt number and b is a
1576 field that represents an encoding of the sense and level
1577 information for the interrupt. This should be encoded based on
1578 the information in section 2) depending on the type of interrupt
1579 controller you have.
1580 - interrupt-parent : the phandle for the interrupt controller that
1581 services interrupts for this device.
1585 device_type = "spi";
1586 compatible = "fsl_spi";
1588 interrupts = <82 0>;
1589 interrupt-parent = <700>;
1594 iii) USB (Universal Serial Bus Controller)
1596 Required properties:
1597 - compatible : could be "qe_udc" or "fhci-hcd".
1598 - mode : the could be "host" or "slave".
1599 - reg : Offset and length of the register set for the device
1600 - interrupts : <a b> where a is the interrupt number and b is a
1601 field that represents an encoding of the sense and level
1602 information for the interrupt. This should be encoded based on
1603 the information in section 2) depending on the type of interrupt
1604 controller you have.
1605 - interrupt-parent : the phandle for the interrupt controller that
1606 services interrupts for this device.
1610 compatible = "qe_udc";
1612 interrupts = <8b 0>;
1613 interrupt-parent = <700>;
1618 iv) UCC (Unified Communications Controllers)
1620 Required properties:
1621 - device_type : should be "network", "hldc", "uart", "transparent"
1623 - compatible : could be "ucc_geth" or "fsl_atm" and so on.
1624 - model : should be "UCC".
1625 - device-id : the ucc number(1-8), corresponding to UCCx in UM.
1626 - reg : Offset and length of the register set for the device
1627 - interrupts : <a b> where a is the interrupt number and b is a
1628 field that represents an encoding of the sense and level
1629 information for the interrupt. This should be encoded based on
1630 the information in section 2) depending on the type of interrupt
1631 controller you have.
1632 - interrupt-parent : the phandle for the interrupt controller that
1633 services interrupts for this device.
1634 - pio-handle : The phandle for the Parallel I/O port configuration.
1635 - rx-clock-name: the UCC receive clock source
1636 "none": clock source is disabled
1637 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
1638 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
1639 - tx-clock-name: the UCC transmit clock source
1640 "none": clock source is disabled
1641 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
1642 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
1643 The following two properties are deprecated. rx-clock has been replaced
1644 with rx-clock-name, and tx-clock has been replaced with tx-clock-name.
1645 Drivers that currently use the deprecated properties should continue to
1646 do so, in order to support older device trees, but they should be updated
1647 to check for the new properties first.
1648 - rx-clock : represents the UCC receive clock source.
1649 0x00 : clock source is disabled;
1650 0x1~0x10 : clock source is BRG1~BRG16 respectively;
1651 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
1652 - tx-clock: represents the UCC transmit clock source;
1653 0x00 : clock source is disabled;
1654 0x1~0x10 : clock source is BRG1~BRG16 respectively;
1655 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
1657 Required properties for network device_type:
1658 - mac-address : list of bytes representing the ethernet address.
1659 - phy-handle : The phandle for the PHY connected to this controller.
1661 Recommended properties:
1662 - linux,network-index : This is the intended "index" of this
1663 network device. This is used by the bootwrapper to interpret
1664 MAC addresses passed by the firmware when no information other
1665 than indices is available to associate an address with a device.
1666 - phy-connection-type : a string naming the controller/PHY interface type,
1667 i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
1668 Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
1673 device_type = "network";
1674 compatible = "ucc_geth";
1678 interrupts = <a0 0>;
1679 interrupt-parent = <700>;
1680 mac-address = [ 00 04 9f 00 23 23 ];
1683 phy-handle = <212000>;
1684 phy-connection-type = "gmii";
1685 pio-handle = <140001>;
1689 v) Parallel I/O Ports
1691 This node configures Parallel I/O ports for CPUs with QE support.
1692 The node should reside in the "soc" node of the tree. For each
1693 device that using parallel I/O ports, a child node should be created.
1694 See the definition of the Pin configuration nodes below for more
1697 Required properties:
1698 - device_type : should be "par_io".
1699 - reg : offset to the register set and its length.
1700 - num-ports : number of Parallel I/O ports
1705 #address-cells = <1>;
1707 device_type = "par_io";
1714 vi) Pin configuration nodes
1716 Required properties:
1717 - linux,phandle : phandle of this node; likely referenced by a QE
1719 - pio-map : array of pin configurations. Each pin is defined by 6
1720 integers. The six numbers are respectively: port, pin, dir,
1721 open_drain, assignment, has_irq.
1722 - port : port number of the pin; 0-6 represent port A-G in UM.
1723 - pin : pin number in the port.
1724 - dir : direction of the pin, should encode as follows:
1726 0 = The pin is disabled
1727 1 = The pin is an output
1728 2 = The pin is an input
1731 - open_drain : indicates the pin is normal or wired-OR:
1733 0 = The pin is actively driven as an output
1734 1 = The pin is an open-drain driver. As an output, the pin is
1735 driven active-low, otherwise it is three-stated.
1737 - assignment : function number of the pin according to the Pin Assignment
1738 tables in User Manual. Each pin can have up to 4 possible functions in
1739 QE and two options for CPM.
1740 - has_irq : indicates if the pin is used as source of external
1745 linux,phandle = <140001>;
1747 /* port pin dir open_drain assignment has_irq */
1748 0 3 1 0 1 0 /* TxD0 */
1749 0 4 1 0 1 0 /* TxD1 */
1750 0 5 1 0 1 0 /* TxD2 */
1751 0 6 1 0 1 0 /* TxD3 */
1752 1 6 1 0 3 0 /* TxD4 */
1753 1 7 1 0 1 0 /* TxD5 */
1754 1 9 1 0 2 0 /* TxD6 */
1755 1 a 1 0 2 0 /* TxD7 */
1756 0 9 2 0 1 0 /* RxD0 */
1757 0 a 2 0 1 0 /* RxD1 */
1758 0 b 2 0 1 0 /* RxD2 */
1759 0 c 2 0 1 0 /* RxD3 */
1760 0 d 2 0 1 0 /* RxD4 */
1761 1 1 2 0 2 0 /* RxD5 */
1762 1 0 2 0 2 0 /* RxD6 */
1763 1 4 2 0 2 0 /* RxD7 */
1764 0 7 1 0 1 0 /* TX_EN */
1765 0 8 1 0 1 0 /* TX_ER */
1766 0 f 2 0 1 0 /* RX_DV */
1767 0 10 2 0 1 0 /* RX_ER */
1768 0 0 2 0 1 0 /* RX_CLK */
1769 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
1770 2 8 2 0 1 0>; /* GTX125 - CLK9 */
1773 vii) Multi-User RAM (MURAM)
1775 Required properties:
1776 - device_type : should be "muram".
1777 - mode : the could be "host" or "slave".
1778 - ranges : Should be defined as specified in 1) to describe the
1779 translation of MURAM addresses.
1780 - data-only : sub-node which defines the address area under MURAM
1781 bus that can be allocated as data/parameter
1786 device_type = "muram";
1787 ranges = <0 00010000 0000c000>;
1794 viii) Uploaded QE firmware
1796 If a new firwmare has been uploaded to the QE (usually by the
1797 boot loader), then a 'firmware' child node should be added to the QE
1798 node. This node provides information on the uploaded firmware that
1799 device drivers may need.
1801 Required properties:
1802 - id: The string name of the firmware. This is taken from the 'id'
1803 member of the qe_firmware structure of the uploaded firmware.
1804 Device drivers can search this string to determine if the
1805 firmware they want is already present.
1806 - extended-modes: The Extended Modes bitfield, taken from the
1807 firmware binary. It is a 64-bit number represented
1808 as an array of two 32-bit numbers.
1809 - virtual-traps: The virtual traps, taken from the firmware binary.
1810 It is an array of 8 32-bit numbers.
1816 extended-modes = <0 0>;
1817 virtual-traps = <0 0 0 0 0 0 0 0>;
1820 j) CFI or JEDEC memory-mapped NOR flash
1822 Flash chips (Memory Technology Devices) are often used for solid state
1823 file systems on embedded devices.
1825 - compatible : should contain the specific model of flash chip(s)
1826 used, if known, followed by either "cfi-flash" or "jedec-flash"
1827 - reg : Address range of the flash chip
1828 - bank-width : Width (in bytes) of the flash bank. Equal to the
1829 device width times the number of interleaved chips.
1830 - device-width : (optional) Width of a single flash chip. If
1831 omitted, assumed to be equal to 'bank-width'.
1832 - #address-cells, #size-cells : Must be present if the flash has
1833 sub-nodes representing partitions (see below). In this case
1834 both #address-cells and #size-cells must be equal to 1.
1836 For JEDEC compatible devices, the following additional properties
1839 - vendor-id : Contains the flash chip's vendor id (1 byte).
1840 - device-id : Contains the flash chip's device id (1 byte).
1842 In addition to the information on the flash bank itself, the
1843 device tree may optionally contain additional information
1844 describing partitions of the flash address space. This can be
1845 used on platforms which have strong conventions about which
1846 portions of the flash are used for what purposes, but which don't
1847 use an on-flash partition table such as RedBoot.
1849 Each partition is represented as a sub-node of the flash device.
1850 Each node's name represents the name of the corresponding
1851 partition of the flash device.
1854 - reg : The partition's offset and size within the flash bank.
1855 - label : (optional) The label / name for this flash partition.
1856 If omitted, the label is taken from the node name (excluding
1858 - read-only : (optional) This parameter, if present, is a hint to
1859 Linux that this flash partition should only be mounted
1860 read-only. This is usually used for flash partitions
1861 containing early-boot firmware images or data which should not
1867 compatible = "amd,am29lv128ml", "cfi-flash";
1868 reg = <ff000000 01000000>;
1871 #address-cells = <1>;
1879 reg = <f80000 80000>;
1884 k) Global Utilities Block
1886 The global utilities block controls power management, I/O device
1887 enabling, power-on-reset configuration monitoring, general-purpose
1888 I/O signal configuration, alternate function selection for multiplexed
1889 signals, and clock control.
1891 Required properties:
1893 - compatible : Should define the compatible device type for
1895 - reg : Offset and length of the register set for the device.
1897 Recommended properties:
1899 - fsl,has-rstcr : Indicates that the global utilities register set
1900 contains a functioning "reset control register" (i.e. the board
1901 is wired to reset upon setting the HRESET_REQ bit in this register).
1905 global-utilities@e0000 { /* global utilities block */
1906 compatible = "fsl,mpc8548-guts";
1911 l) Freescale Communications Processor Module
1913 NOTE: This is an interim binding, and will likely change slightly,
1914 as more devices are supported. The QE bindings especially are
1920 - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
1921 - reg : A 48-byte region beginning with CPCR.
1925 #address-cells = <1>;
1927 #interrupt-cells = <2>;
1928 compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
1932 ii) Properties common to mulitple CPM/QE devices
1934 - fsl,cpm-command : This value is ORed with the opcode and command flag
1935 to specify the device on which a CPM command operates.
1937 - fsl,cpm-brg : Indicates which baud rate generator the device
1938 is associated with. If absent, an unused BRG
1939 should be dynamically allocated. If zero, the
1940 device uses an external clock rather than a BRG.
1942 - reg : Unless otherwise specified, the first resource represents the
1943 scc/fcc/ucc registers, and the second represents the device's
1944 parameter RAM region (if it has one).
1948 Currently defined compatibles:
1958 device_type = "serial";
1959 compatible = "fsl,mpc8272-scc-uart",
1960 "fsl,cpm2-scc-uart";
1961 reg = <11a00 20 8000 100>;
1962 interrupts = <28 8>;
1963 interrupt-parent = <&PIC>;
1965 fsl,cpm-command = <00800000>;
1970 Currently defined compatibles:
1974 - fsl,cpm2-fcc-enet (third resource is GFEMR)
1980 device_type = "network";
1981 compatible = "fsl,mpc8272-fcc-enet",
1982 "fsl,cpm2-fcc-enet";
1983 reg = <11300 20 8400 100 11390 1>;
1984 local-mac-address = [ 00 00 00 00 00 00 ];
1985 interrupts = <20 8>;
1986 interrupt-parent = <&PIC>;
1987 phy-handle = <&PHY0>;
1988 linux,network-index = <0>;
1989 fsl,cpm-command = <12000300>;
1994 Currently defined compatibles:
1995 fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
1996 fsl,cpm2-mdio-bitbang (reg is port C registers)
1998 Properties for fsl,cpm2-mdio-bitbang:
1999 fsl,mdio-pin : pin of port C controlling mdio data
2000 fsl,mdc-pin : pin of port C controlling mdio clock
2005 device_type = "mdio";
2006 compatible = "fsl,mpc8272ads-mdio-bitbang",
2007 "fsl,mpc8272-mdio-bitbang",
2008 "fsl,cpm2-mdio-bitbang";
2010 #address-cells = <1>;
2012 fsl,mdio-pin = <12>;
2016 v) Baud Rate Generators
2018 Currently defined compatibles:
2024 - reg : There may be an arbitrary number of reg resources; BRG
2025 numbers are assigned to these in order.
2026 - clock-frequency : Specifies the base frequency driving
2032 compatible = "fsl,mpc8272-brg",
2035 reg = <119f0 10 115f0 10>;
2036 clock-frequency = <d#25000000>;
2039 vi) Interrupt Controllers
2041 Currently defined compatibles:
2043 - only one interrupt cell
2046 - second interrupt cell is level/sense:
2052 interrupt-controller@10c00 {
2053 #interrupt-cells = <2>;
2054 interrupt-controller;
2056 compatible = "mpc8272-pic", "fsl,cpm2-pic";
2059 vii) USB (Universal Serial Bus Controller)
2062 - compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb"
2066 #address-cells = <1>;
2068 compatible = "fsl,cpm2-usb";
2069 reg = <11b60 18 8b00 100>;
2071 interrupt-parent = <&PIC>;
2072 fsl,cpm-command = <2e600000>;
2075 viii) Multi-User RAM (MURAM)
2077 The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
2079 Ranges must be set up subject to the following restrictions:
2081 - Children's reg nodes must be offsets from the start of all muram, even
2082 if the user-data area does not begin at zero.
2083 - If multiple range entries are used, the difference between the parent
2084 address and the child address must be the same in all, so that a single
2085 mapping can cover them all while maintaining the ability to determine
2086 CPM-side offsets with pointer subtraction. It is recommended that
2087 multiple range entries not be used.
2088 - A child address of zero must be translatable, even if no reg resources
2091 A child "data" node must exist, compatible with "fsl,cpm-muram-data", to
2092 indicate the portion of muram that is usable by the OS for arbitrary
2093 purposes. The data node may have an arbitrary number of reg resources,
2094 all of which contribute to the allocatable muram pool.
2096 Example, based on mpc8272:
2099 #address-cells = <1>;
2101 ranges = <0 0 10000>;
2104 compatible = "fsl,cpm-muram-data";
2105 reg = <0 2000 9800 800>;
2109 m) Chipselect/Local Bus
2112 - name : Should be localbus
2113 - #address-cells : Should be either two or three. The first cell is the
2114 chipselect number, and the remaining cells are the
2115 offset into the chipselect.
2116 - #size-cells : Either one or two, depending on how large each chipselect
2118 - ranges : Each range corresponds to a single chipselect, and cover
2119 the entire access window as configured.
2123 compatible = "fsl,mpc8272-localbus",
2125 #address-cells = <2>;
2127 reg = <f0010100 40>;
2129 ranges = <0 0 fe000000 02000000
2130 1 0 f4500000 00008000>;
2133 compatible = "jedec-flash";
2134 reg = <0 0 2000000>;
2141 compatible = "fsl,mpc8272ads-bcsr";
2146 n) 4xx/Axon EMAC ethernet nodes
2148 The EMAC ethernet controller in IBM and AMCC 4xx chips, and also
2149 the Axon bridge. To operate this needs to interact with a ths
2150 special McMAL DMA controller, and sometimes an RGMII or ZMII
2151 interface. In addition to the nodes and properties described
2152 below, the node for the OPB bus on which the EMAC sits must have a
2153 correct clock-frequency property.
2155 i) The EMAC node itself
2157 Required properties:
2158 - device_type : "network"
2160 - compatible : compatible list, contains 2 entries, first is
2161 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
2162 405gp, Axon) and second is either "ibm,emac" or
2163 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
2165 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
2166 - interrupt-parent : optional, if needed for interrupt mapping
2167 - reg : <registers mapping>
2168 - local-mac-address : 6 bytes, MAC address
2169 - mal-device : phandle of the associated McMAL node
2170 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
2172 - mal-rx-channel : 1 cell, index of the rx channel on McMAL associated
2174 - cell-index : 1 cell, hardware index of the EMAC cell on a given
2175 ASIC (typically 0x0 and 0x1 for EMAC0 and EMAC1 on
2177 - max-frame-size : 1 cell, maximum frame size supported in bytes
2178 - rx-fifo-size : 1 cell, Rx fifo size in bytes for 10 and 100 Mb/sec
2181 - tx-fifo-size : 1 cell, Tx fifo size in bytes for 10 and 100 Mb/sec
2184 - fifo-entry-size : 1 cell, size of a fifo entry (used to calculate
2186 For Axon, 0x00000010
2187 - mal-burst-size : 1 cell, MAL burst size (used to calculate thresholds)
2189 For Axon, 0x00000100 (I think ...)
2190 - phy-mode : string, mode of operations of the PHY interface.
2191 Supported values are: "mii", "rmii", "smii", "rgmii",
2192 "tbi", "gmii", rtbi", "sgmii".
2193 For Axon on CAB, it is "rgmii"
2194 - mdio-device : 1 cell, required iff using shared MDIO registers
2195 (440EP). phandle of the EMAC to use to drive the
2196 MDIO lines for the PHY used by this EMAC.
2197 - zmii-device : 1 cell, required iff connected to a ZMII. phandle of
2198 the ZMII device node
2199 - zmii-channel : 1 cell, required iff connected to a ZMII. Which ZMII
2200 channel or 0xffffffff if ZMII is only used for MDIO.
2201 - rgmii-device : 1 cell, required iff connected to an RGMII. phandle
2202 of the RGMII device node.
2203 For Axon: phandle of plb5/plb4/opb/rgmii
2204 - rgmii-channel : 1 cell, required iff connected to an RGMII. Which
2205 RGMII channel is used by this EMAC.
2206 Fox Axon: present, whatever value is appropriate for each
2207 EMAC, that is the content of the current (bogus) "phy-port"
2210 Recommended properties:
2211 - linux,network-index : This is the intended "index" of this
2212 network device. This is used by the bootwrapper to interpret
2213 MAC addresses passed by the firmware when no information other
2214 than indices is available to associate an address with a device.
2216 Optional properties:
2217 - phy-address : 1 cell, optional, MDIO address of the PHY. If absent,
2218 a search is performed.
2219 - phy-map : 1 cell, optional, bitmap of addresses to probe the PHY
2220 for, used if phy-address is absent. bit 0x00000001 is
2222 For Axon it can be absent, thouugh my current driver
2223 doesn't handle phy-address yet so for now, keep
2225 - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec
2226 operations (if absent the value is the same as
2227 rx-fifo-size). For Axon, either absent or 2048.
2228 - tx-fifo-size-gige : 1 cell, Tx fifo size in bytes for 1000 Mb/sec
2229 operations (if absent the value is the same as
2230 tx-fifo-size). For Axon, either absent or 2048.
2231 - tah-device : 1 cell, optional. If connected to a TAH engine for
2232 offload, phandle of the TAH device node.
2233 - tah-channel : 1 cell, optional. If appropriate, channel used on the
2238 EMAC0: ethernet@40000800 {
2239 linux,network-index = <0>;
2240 device_type = "network";
2241 compatible = "ibm,emac-440gp", "ibm,emac";
2242 interrupt-parent = <&UIC1>;
2243 interrupts = <1c 4 1d 4>;
2244 reg = <40000800 70>;
2245 local-mac-address = [00 04 AC E3 1B 1E];
2246 mal-device = <&MAL0>;
2247 mal-tx-channel = <0 1>;
2248 mal-rx-channel = <0>;
2250 max-frame-size = <5dc>;
2251 rx-fifo-size = <1000>;
2252 tx-fifo-size = <800>;
2254 phy-map = <00000001>;
2255 zmii-device = <&ZMII0>;
2261 Required properties:
2262 - device_type : "dma-controller"
2263 - compatible : compatible list, containing 2 entries, first is
2264 "ibm,mcmal-CHIP" where CHIP is the host ASIC (like
2265 emac) and the second is either "ibm,mcmal" or
2267 For Axon, "ibm,mcmal-axon","ibm,mcmal2"
2268 - interrupts : <interrupt mapping for the MAL interrupts sources:
2269 5 sources: tx_eob, rx_eob, serr, txde, rxde>.
2270 For Axon: This is _different_ from the current
2271 firmware. We use the "delayed" interrupts for txeob
2272 and rxeob. Thus we end up with mapping those 5 MPIC
2273 interrupts, all level positive sensitive: 10, 11, 32,
2275 - dcr-reg : < DCR registers range >
2276 - dcr-parent : if needed for dcr-reg
2277 - num-tx-chans : 1 cell, number of Tx channels
2278 - num-rx-chans : 1 cell, number of Rx channels
2282 Required properties:
2283 - compatible : compatible list, containing 2 entries, first is
2284 "ibm,zmii-CHIP" where CHIP is the host ASIC (like
2285 EMAC) and the second is "ibm,zmii".
2286 For Axon, there is no ZMII node.
2287 - reg : <registers mapping>
2291 Required properties:
2292 - compatible : compatible list, containing 2 entries, first is
2293 "ibm,rgmii-CHIP" where CHIP is the host ASIC (like
2294 EMAC) and the second is "ibm,rgmii".
2295 For Axon, "ibm,rgmii-axon","ibm,rgmii"
2296 - reg : <registers mapping>
2297 - revision : as provided by the RGMII new version register if
2299 For Axon: 0x0000012a
2303 The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
2304 in Xilinx Spartan and Virtex FPGAs. The devices cover the whole range
2305 of standard device types (network, serial, etc.) and miscellanious
2306 devices (gpio, LCD, spi, etc). Also, since these devices are
2307 implemented within the fpga fabric every instance of the device can be
2308 synthesised with different options that change the behaviour.
2310 Each IP-core has a set of parameters which the FPGA designer can use to
2311 control how the core is synthesized. Historically, the EDK tool would
2312 extract the device parameters relevant to device drivers and copy them
2313 into an 'xparameters.h' in the form of #define symbols. This tells the
2314 device drivers how the IP cores are configured, but it requres the kernel
2315 to be recompiled every time the FPGA bitstream is resynthesized.
2317 The new approach is to export the parameters into the device tree and
2318 generate a new device tree each time the FPGA bitstream changes. The
2319 parameters which used to be exported as #defines will now become
2320 properties of the device node. In general, device nodes for IP-cores
2321 will take the following form:
2323 (name): (generic-name)@(base-address) {
2324 compatible = "xlnx,(ip-core-name)-(HW_VER)"
2325 [, (list of compatible devices), ...];
2326 reg = <(baseaddr) (size)>;
2327 interrupt-parent = <&interrupt-controller-phandle>;
2328 interrupts = < ... >;
2329 xlnx,(parameter1) = "(string-value)";
2330 xlnx,(parameter2) = <(int-value)>;
2333 (generic-name): an open firmware-style name that describes the
2334 generic class of device. Preferably, this is one word, such
2335 as 'serial' or 'ethernet'.
2336 (ip-core-name): the name of the ip block (given after the BEGIN
2337 directive in system.mhs). Should be in lowercase
2338 and all underscores '_' converted to dashes '-'.
2339 (name): is derived from the "PARAMETER INSTANCE" value.
2340 (parameter#): C_* parameters from system.mhs. The C_ prefix is
2341 dropped from the parameter name, the name is converted
2342 to lowercase and all underscore '_' characters are
2343 converted to dashes '-'.
2344 (baseaddr): the baseaddr parameter value (often named C_BASEADDR).
2345 (HW_VER): from the HW_VER parameter.
2346 (size): the address range size (often C_HIGHADDR - C_BASEADDR + 1).
2348 Typically, the compatible list will include the exact IP core version
2349 followed by an older IP core version which implements the same
2350 interface or any other device with the same interface.
2352 'reg', 'interrupt-parent' and 'interrupts' are all optional properties.
2354 For example, the following block from system.mhs:
2357 PARAMETER INSTANCE = opb_uartlite_0
2358 PARAMETER HW_VER = 1.00.b
2359 PARAMETER C_BAUDRATE = 115200
2360 PARAMETER C_DATA_BITS = 8
2361 PARAMETER C_ODD_PARITY = 0
2362 PARAMETER C_USE_PARITY = 0
2363 PARAMETER C_CLK_FREQ = 50000000
2364 PARAMETER C_BASEADDR = 0xEC100000
2365 PARAMETER C_HIGHADDR = 0xEC10FFFF
2366 BUS_INTERFACE SOPB = opb_7
2367 PORT OPB_Clk = CLK_50MHz
2368 PORT Interrupt = opb_uartlite_0_Interrupt
2369 PORT RX = opb_uartlite_0_RX
2370 PORT TX = opb_uartlite_0_TX
2371 PORT OPB_Rst = sys_bus_reset_0
2374 becomes the following device tree node:
2376 opb_uartlite_0: serial@ec100000 {
2377 device_type = "serial";
2378 compatible = "xlnx,opb-uartlite-1.00.b";
2379 reg = <ec100000 10000>;
2380 interrupt-parent = <&opb_intc_0>;
2381 interrupts = <1 0>; // got this from the opb_intc parameters
2382 current-speed = <d#115200>; // standard serial device prop
2383 clock-frequency = <d#50000000>; // standard serial device prop
2384 xlnx,data-bits = <8>;
2385 xlnx,odd-parity = <0>;
2386 xlnx,use-parity = <0>;
2389 Some IP cores actually implement 2 or more logical devices. In
2390 this case, the device should still describe the whole IP core with
2391 a single node and add a child node for each logical device. The
2392 ranges property can be used to translate from parent IP-core to the
2393 registers of each device. In addition, the parent node should be
2394 compatible with the bus type 'xlnx,compound', and should contain
2395 #address-cells and #size-cells, as with any other bus. (Note: this
2396 makes the assumption that both logical devices have the same bus
2397 binding. If this is not true, then separate nodes should be used
2398 for each logical device). The 'cell-index' property can be used to
2399 enumerate logical devices within an IP core. For example, the
2400 following is the system.mhs entry for the dual ps2 controller found
2401 on the ml403 reference design.
2403 BEGIN opb_ps2_dual_ref
2404 PARAMETER INSTANCE = opb_ps2_dual_ref_0
2405 PARAMETER HW_VER = 1.00.a
2406 PARAMETER C_BASEADDR = 0xA9000000
2407 PARAMETER C_HIGHADDR = 0xA9001FFF
2408 BUS_INTERFACE SOPB = opb_v20_0
2409 PORT Sys_Intr1 = ps2_1_intr
2410 PORT Sys_Intr2 = ps2_2_intr
2411 PORT Clkin1 = ps2_clk_rx_1
2412 PORT Clkin2 = ps2_clk_rx_2
2413 PORT Clkpd1 = ps2_clk_tx_1
2414 PORT Clkpd2 = ps2_clk_tx_2
2415 PORT Rx1 = ps2_d_rx_1
2416 PORT Rx2 = ps2_d_rx_2
2417 PORT Txpd1 = ps2_d_tx_1
2418 PORT Txpd2 = ps2_d_tx_2
2421 It would result in the following device tree nodes:
2423 opb_ps2_dual_ref_0: opb-ps2-dual-ref@a9000000 {
2424 #address-cells = <1>;
2426 compatible = "xlnx,compound";
2427 ranges = <0 a9000000 2000>;
2428 // If this device had extra parameters, then they would
2431 compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
2433 interrupt-parent = <&opb_intc_0>;
2438 compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
2440 interrupt-parent = <&opb_intc_0>;
2446 Also, the system.mhs file defines bus attachments from the processor
2447 to the devices. The device tree structure should reflect the bus
2448 attachments. Again an example; this system.mhs fragment:
2450 BEGIN ppc405_virtex4
2451 PARAMETER INSTANCE = ppc405_0
2452 PARAMETER HW_VER = 1.01.a
2453 BUS_INTERFACE DPLB = plb_v34_0
2454 BUS_INTERFACE IPLB = plb_v34_0
2458 PARAMETER INSTANCE = opb_intc_0
2459 PARAMETER HW_VER = 1.00.c
2460 PARAMETER C_BASEADDR = 0xD1000FC0
2461 PARAMETER C_HIGHADDR = 0xD1000FDF
2462 BUS_INTERFACE SOPB = opb_v20_0
2466 PARAMETER INSTANCE = opb_uart16550_0
2467 PARAMETER HW_VER = 1.00.d
2468 PARAMETER C_BASEADDR = 0xa0000000
2469 PARAMETER C_HIGHADDR = 0xa0001FFF
2470 BUS_INTERFACE SOPB = opb_v20_0
2474 PARAMETER INSTANCE = plb_v34_0
2475 PARAMETER HW_VER = 1.02.a
2478 BEGIN plb_bram_if_cntlr
2479 PARAMETER INSTANCE = plb_bram_if_cntlr_0
2480 PARAMETER HW_VER = 1.00.b
2481 PARAMETER C_BASEADDR = 0xFFFF0000
2482 PARAMETER C_HIGHADDR = 0xFFFFFFFF
2483 BUS_INTERFACE SPLB = plb_v34_0
2486 BEGIN plb2opb_bridge
2487 PARAMETER INSTANCE = plb2opb_bridge_0
2488 PARAMETER HW_VER = 1.01.a
2489 PARAMETER C_RNG0_BASEADDR = 0x20000000
2490 PARAMETER C_RNG0_HIGHADDR = 0x3FFFFFFF
2491 PARAMETER C_RNG1_BASEADDR = 0x60000000
2492 PARAMETER C_RNG1_HIGHADDR = 0x7FFFFFFF
2493 PARAMETER C_RNG2_BASEADDR = 0x80000000
2494 PARAMETER C_RNG2_HIGHADDR = 0xBFFFFFFF
2495 PARAMETER C_RNG3_BASEADDR = 0xC0000000
2496 PARAMETER C_RNG3_HIGHADDR = 0xDFFFFFFF
2497 BUS_INTERFACE SPLB = plb_v34_0
2498 BUS_INTERFACE MOPB = opb_v20_0
2501 Gives this device tree (some properties removed for clarity):
2504 #address-cells = <1>;
2506 compatible = "xlnx,plb-v34-1.02.a";
2507 device_type = "ibm,plb";
2508 ranges; // 1:1 translation
2510 plb_bram_if_cntrl_0: bram@ffff0000 {
2511 reg = <ffff0000 10000>;
2515 #address-cells = <1>;
2517 ranges = <20000000 20000000 20000000
2518 60000000 60000000 20000000
2519 80000000 80000000 40000000
2520 c0000000 c0000000 20000000>;
2522 opb_uart16550_0: serial@a0000000 {
2523 reg = <a00000000 2000>;
2526 opb_intc_0: interrupt-controller@d1000fc0 {
2527 reg = <d1000fc0 20>;
2532 That covers the general approach to binding xilinx IP cores into the
2533 device tree. The following are bindings for specific devices:
2535 i) Xilinx ML300 Framebuffer
2537 Simple framebuffer device from the ML300 reference design (also on the
2538 ML403 reference design as well as others).
2540 Optional properties:
2541 - resolution = <xres yres> : pixel resolution of framebuffer. Some
2542 implementations use a different resolution.
2543 Default is <d#640 d#480>
2544 - virt-resolution = <xvirt yvirt> : Size of framebuffer in memory.
2545 Default is <d#1024 d#480>.
2546 - rotate-display (empty) : rotate display 180 degrees.
2548 ii) Xilinx SystemACE
2550 The Xilinx SystemACE device is used to program FPGAs from an FPGA
2551 bitstream stored on a CF card. It can also be used as a generic CF
2554 Optional properties:
2555 - 8-bit (empty) : Set this property for SystemACE in 8 bit mode
2557 iii) Xilinx EMAC and Xilinx TEMAC
2559 Xilinx Ethernet devices. In addition to general xilinx properties
2560 listed above, nodes for these devices should include a phy-handle
2561 property, and may include other common network device properties
2562 like local-mac-address.
2566 Xilinx uartlite devices are simple fixed speed serial ports.
2569 - current-speed : Baud rate of uartlite
2571 More devices will be defined as this spec matures.
2573 VII - Specifying interrupt information for devices
2574 ===================================================
2576 The device tree represents the busses and devices of a hardware
2577 system in a form similar to the physical bus topology of the
2580 In addition, a logical 'interrupt tree' exists which represents the
2581 hierarchy and routing of interrupts in the hardware.
2583 The interrupt tree model is fully described in the
2584 document "Open Firmware Recommended Practice: Interrupt
2585 Mapping Version 0.9". The document is available at:
2586 <http://playground.sun.com/1275/practice>.
2588 1) interrupts property
2589 ----------------------
2591 Devices that generate interrupts to a single interrupt controller
2592 should use the conventional OF representation described in the
2593 OF interrupt mapping documentation.
2595 Each device which generates interrupts must have an 'interrupt'
2596 property. The interrupt property value is an arbitrary number of
2597 of 'interrupt specifier' values which describe the interrupt or
2598 interrupts for the device.
2600 The encoding of an interrupt specifier is determined by the
2601 interrupt domain in which the device is located in the
2602 interrupt tree. The root of an interrupt domain specifies in
2603 its #interrupt-cells property the number of 32-bit cells
2604 required to encode an interrupt specifier. See the OF interrupt
2605 mapping documentation for a detailed description of domains.
2607 For example, the binding for the OpenPIC interrupt controller
2608 specifies an #interrupt-cells value of 2 to encode the interrupt
2609 number and level/sense information. All interrupt children in an
2610 OpenPIC interrupt domain use 2 cells per interrupt in their interrupts
2613 The PCI bus binding specifies a #interrupt-cell value of 1 to encode
2614 which interrupt pin (INTA,INTB,INTC,INTD) is used.
2616 2) interrupt-parent property
2617 ----------------------------
2619 The interrupt-parent property is specified to define an explicit
2620 link between a device node and its interrupt parent in
2621 the interrupt tree. The value of interrupt-parent is the
2622 phandle of the parent node.
2624 If the interrupt-parent property is not defined for a node, it's
2625 interrupt parent is assumed to be an ancestor in the node's
2626 _device tree_ hierarchy.
2628 3) OpenPIC Interrupt Controllers
2629 --------------------------------
2631 OpenPIC interrupt controllers require 2 cells to encode
2632 interrupt information. The first cell defines the interrupt
2633 number. The second cell defines the sense and level
2636 Sense and level information should be encoded as follows:
2638 0 = low to high edge sensitive type enabled
2639 1 = active low level sensitive type enabled
2640 2 = active high level sensitive type enabled
2641 3 = high to low edge sensitive type enabled
2643 4) ISA Interrupt Controllers
2644 ----------------------------
2646 ISA PIC interrupt controllers require 2 cells to encode
2647 interrupt information. The first cell defines the interrupt
2648 number. The second cell defines the sense and level
2651 ISA PIC interrupt controllers should adhere to the ISA PIC
2652 encodings listed below:
2654 0 = active low level sensitive type enabled
2655 1 = active high level sensitive type enabled
2656 2 = high to low edge sensitive type enabled
2657 3 = low to high edge sensitive type enabled
2660 Appendix A - Sample SOC node for MPC8540
2661 ========================================
2663 Note that the #address-cells and #size-cells for the SoC node
2664 in this example have been explicitly listed; these are likely
2665 not necessary as they are usually the same as the root node.
2668 #address-cells = <1>;
2670 #interrupt-cells = <2>;
2671 device_type = "soc";
2672 ranges = <00000000 e0000000 00100000>
2673 reg = <e0000000 00003000>;
2674 bus-frequency = <0>;
2678 device_type = "mdio";
2679 compatible = "gianfar";
2682 linux,phandle = <2452000>
2683 interrupt-parent = <40000>;
2684 interrupts = <35 1>;
2686 device_type = "ethernet-phy";
2690 linux,phandle = <2452001>
2691 interrupt-parent = <40000>;
2692 interrupts = <35 1>;
2694 device_type = "ethernet-phy";
2698 linux,phandle = <2452002>
2699 interrupt-parent = <40000>;
2700 interrupts = <35 1>;
2702 device_type = "ethernet-phy";
2709 device_type = "network";
2711 compatible = "gianfar";
2713 mac-address = [ 00 E0 0C 00 73 00 ];
2714 interrupts = <d 3 e 3 12 3>;
2715 interrupt-parent = <40000>;
2716 phy-handle = <2452000>;
2720 #address-cells = <1>;
2722 device_type = "network";
2724 compatible = "gianfar";
2726 mac-address = [ 00 E0 0C 00 73 01 ];
2727 interrupts = <13 3 14 3 18 3>;
2728 interrupt-parent = <40000>;
2729 phy-handle = <2452001>;
2733 #address-cells = <1>;
2735 device_type = "network";
2737 compatible = "gianfar";
2739 mac-address = [ 00 E0 0C 00 73 02 ];
2740 interrupts = <19 3>;
2741 interrupt-parent = <40000>;
2742 phy-handle = <2452002>;
2746 device_type = "serial";
2747 compatible = "ns16550";
2749 clock-frequency = <0>;
2750 interrupts = <1a 3>;
2751 interrupt-parent = <40000>;
2755 linux,phandle = <40000>;
2756 clock-frequency = <0>;
2757 interrupt-controller;
2758 #address-cells = <0>;
2759 reg = <40000 40000>;
2761 compatible = "chrp,open-pic";
2762 device_type = "open-pic";
2767 interrupt-parent = <40000>;
2768 interrupts = <1b 3>;
2770 device_type = "i2c";
2771 compatible = "fsl-i2c";